coreboot-gerrit May 2021

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Change in coreboot[master]: soc/mediatek/mt8195: add pmif/spmi/pmic driver
by Rex-BC Chen (Code Review) 04 May '21

04 May '21

Attention is currently required from: Xi Chen, Hung-Te Lin, Rex-BC Chen, Paul Menzel, Yidi Lin. Hello Xi Chen, Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, Yidi Lin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52668 to look at the new patch set (#13). Change subject: soc/mediatek/mt8195: add pmif/spmi/pmic driver ...................................................................... soc/mediatek/mt8195: add pmif/spmi/pmic driver MT8195 also uses mt6359p so we can reuse most drivers. The only differences are IO configuaration, clock setting, and PMIC internal setting related to soc. Reference datasheet: MT6315 datasheet v1.4.2.pdf, RH-D-2019-0616. Reference datasheet: MT6359_PMIC_Data_Sheet_V1.5.docx, RH-D-2018-0205. Change-Id: I73f9c9bf92837f262c15758f16dacf52261dd3a3 Signed-off-by: Henry Chen <henryc.chen(a)mediatek.com> Signed-off-by: Yidi Lin <yidi.lin(a)mediatek.com> Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> --- A src/soc/mediatek/common/include/soc/pmif_clk_common.h M src/soc/mediatek/common/include/soc/pmif_spmi.h M src/soc/mediatek/common/include/soc/pmif_sw.h A src/soc/mediatek/common/pmif_clk.c M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/pmif_clk.c M src/soc/mediatek/mt8195/Makefile.inc M src/soc/mediatek/mt8195/include/soc/addressmap.h A src/soc/mediatek/mt8195/include/soc/iocfg.h A src/soc/mediatek/mt8195/include/soc/pmif.h A src/soc/mediatek/mt8195/mt6315.c A src/soc/mediatek/mt8195/mt6359p.c A src/soc/mediatek/mt8195/pmif_clk.c A src/soc/mediatek/mt8195/pmif_spi.c A src/soc/mediatek/mt8195/pmif_spmi.c 15 files changed, 946 insertions(+), 44 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/52668/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/52668 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73f9c9bf92837f262c15758f16dacf52261dd3a3 Gerrit-Change-Number: 52668 Gerrit-PatchSet: 13 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8195: add pmif/spmi/pmic driver
by Yu-Ping Wu (Code Review) 04 May '21

04 May '21

Attention is currently required from: Xi Chen, Hung-Te Lin, Rex-BC Chen, Paul Menzel, Yidi Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52668 ) Change subject: soc/mediatek/mt8195: add pmif/spmi/pmic driver ...................................................................... Patch Set 12: Code-Review+1 (1 comment) File src/soc/mediatek/common/pmif_clk.c: https://review.coreboot.org/c/coreboot/+/52668/comment/fbe01b67_5f5e017d PS12, Line 2: #include <commonlib/helpers.h> One blank line after SPDX header. -- To view, visit https://review.coreboot.org/c/coreboot/+/52668 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73f9c9bf92837f262c15758f16dacf52261dd3a3 Gerrit-Change-Number: 52668 Gerrit-PatchSet: 12 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 04 May 2021 10:41:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/shadowmountain: Enable early EC Software Sync
by Maulik V Vaghela (Code Review) 04 May '21

04 May '21

Attention is currently required from: Sridhar Siricilla, Usha P. Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52416 ) Change subject: mb/intel/shadowmountain: Enable early EC Software Sync ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52416 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8648db685d9c63ed1f2b3e599ca951d6648b7baf Gerrit-Change-Number: 52416 Gerrit-PatchSet: 3 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: Usha P <usha.p(a)intel.corp-partner.google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Comment-Date: Tue, 04 May 2021 10:35:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/shadowmountain: Enable early EC Software Sync
by Balaji Manigandan (Code Review) 04 May '21

04 May '21

Attention is currently required from: Maulik V Vaghela, Sridhar Siricilla, Usha P. Balaji Manigandan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52416 ) Change subject: mb/intel/shadowmountain: Enable early EC Software Sync ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/52416 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8648db685d9c63ed1f2b3e599ca951d6648b7baf Gerrit-Change-Number: 52416 Gerrit-PatchSet: 3 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: Usha P <usha.p(a)intel.corp-partner.google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Comment-Date: Tue, 04 May 2021 10:31:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede: Create pirika variant
by Kirk Wang (Code Review) 04 May '21

04 May '21

Attention is currently required from: Paul Fagerburg, Paul2 Huang, Kirk Wang, Shou-Chieh Hsu, Karthik Ramasubramanian. Kirk Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52626 ) Change subject: mb/google/dedede: Create pirika variant ...................................................................... Patch Set 2: Code-Review+1 (1 comment) File src/mainboard/google/dedede/Kconfig.name: https://review.coreboot.org/c/coreboot/+/52626/comment/57ac1738_2139a9b4 PS1, Line 138: bool "-> Pirika" > Is it based on CR50 or TPM2. Please enable the config accordingly. […] We upload the setting for CR50. -- To view, visit https://review.coreboot.org/c/coreboot/+/52626 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I57bf33deeadacc88800f9ce1d3d54385ba56c798 Gerrit-Change-Number: 52626 Gerrit-PatchSet: 2 Gerrit-Owner: Kirk Wang Gerrit-Reviewer: Alex1 Kao <alex1_kao(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kirk Wang <kirk_wang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ariel Chang <ariel_chang(a)pegatron.corp-partner.google.com> Gerrit-CC: Hao Chou <hao_chou(a)pegatron.corp-partner.google.com> Gerrit-CC: Wayne3 Wang <wayne3_wang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Attention: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Kirk Wang Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 04 May 2021 10:23:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: [TEST]: x86/smm: Increase SMM code segment size
by Maulik V Vaghela (Code Review) 04 May '21

04 May '21

Maulik V Vaghela has removed Sowmya V from this change. ( https://review.coreboot.org/c/coreboot/+/52886 ) Change subject: [TEST]: x86/smm: Increase SMM code segment size ...................................................................... Removed reviewer Sowmya V. -- To view, visit https://review.coreboot.org/c/coreboot/+/52886 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idd6676a95ab74d76d44dbbb4220eb52060a860c2 Gerrit-Change-Number: 52886 Gerrit-PatchSet: 1 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-MessageType: deleteReviewer

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Change in coreboot[master]: mb/google/dedede: Create pirika variant
by Kirk Wang (Code Review) 04 May '21

04 May '21

Attention is currently required from: Paul Fagerburg, Paul2 Huang, Kirk Wang, Shou-Chieh Hsu. Kirk Wang has uploaded a new patch set (#2) to the change originally created by Kirk Wang. ( https://review.coreboot.org/c/coreboot/+/52626 ) Change subject: mb/google/dedede: Create pirika variant ...................................................................... mb/google/dedede: Create pirika variant Create the pirika variant of the waddledee reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:184157747 BRANCH=None TEST=util/abuild/abuild -p none -t google/dedede -x -a make sure the build includes GOOGLE_PIRIKA Signed-off-by: kirk_wang <kirk_wang(a)pegatron.corp-partner.google.com> Change-Id: I57bf33deeadacc88800f9ce1d3d54385ba56c798 --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Kconfig.name A src/mainboard/google/dedede/variants/pirika/include/variant/ec.h A src/mainboard/google/dedede/variants/pirika/include/variant/gpio.h A src/mainboard/google/dedede/variants/pirika/memory/Makefile.inc A src/mainboard/google/dedede/variants/pirika/memory/dram_id.generated.txt A src/mainboard/google/dedede/variants/pirika/memory/mem_parts_used.txt A src/mainboard/google/dedede/variants/pirika/overridetree.cb 8 files changed, 82 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/52626/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52626 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I57bf33deeadacc88800f9ce1d3d54385ba56c798 Gerrit-Change-Number: 52626 Gerrit-PatchSet: 2 Gerrit-Owner: Kirk Wang Gerrit-Reviewer: Alex1 Kao <alex1_kao(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kirk Wang <kirk_wang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ariel Chang <ariel_chang(a)pegatron.corp-partner.google.com> Gerrit-CC: Hao Chou <hao_chou(a)pegatron.corp-partner.google.com> Gerrit-CC: Wayne3 Wang <wayne3_wang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Attention: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Kirk Wang Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: x86/exception: Print the offset within the stage that caused the fault
by Angel Pons (Code Review) 04 May '21

04 May '21

Attention is currently required from: Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52861 ) Change subject: x86/exception: Print the offset within the stage that caused the fault ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/52861 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c44e4ee773ccf4bdd25b551949e02d754681417 Gerrit-Change-Number: 52861 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 04 May 2021 10:10:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/prodrive/hermes: Rename EEPROM access functions
by Angel Pons (Code Review) 04 May '21

04 May '21

Attention is currently required from: Nico Huber, Patrick Rudolph, Christian Walter. Hello Nico Huber, Patrick Rudolph, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/52885 to review the following change. Change subject: mb/prodrive/hermes: Rename EEPROM access functions ...................................................................... mb/prodrive/hermes: Rename EEPROM access functions Change-Id: I84b9ef080f1ac91ea6f7273457b882677abf70d3 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/prodrive/hermes/eeprom.c M src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h 2 files changed, 10 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/52885/1 diff --git a/src/mainboard/prodrive/hermes/eeprom.c b/src/mainboard/prodrive/hermes/eeprom.c index 614f069..cdea67d 100644 --- a/src/mainboard/prodrive/hermes/eeprom.c +++ b/src/mainboard/prodrive/hermes/eeprom.c @@ -21,7 +21,7 @@ { u8 blob[8] = {0}; - if (!read_write_config(blob, offset, ARRAY_SIZE(blob))) { + if (!eeprom_read_buffer(blob, offset, ARRAY_SIZE(blob))) { /* Check signature */ if (*(uint64_t *)blob == signature) { printk(BIOS_DEBUG, "CFG EEPROM: Signature valid.\n"); @@ -41,7 +41,7 @@ { const size_t board_settings_offset = offsetof(struct eeprom_layout, BoardSettings); - if (read_write_config(board_cfg, board_settings_offset, sizeof(*board_cfg))) { + if (eeprom_read_buffer(board_cfg, board_settings_offset, sizeof(*board_cfg))) { printk(BIOS_ERR, "CFG EEPROM: Failed to read board settings\n"); return false; } @@ -79,7 +79,7 @@ static int valid = 0; if (valid == 0) { - if (read_write_config(&bmc_cfg, bmc_settings_offset, sizeof(bmc_cfg))) { + if (eeprom_read_buffer(&bmc_cfg, bmc_settings_offset, sizeof(bmc_cfg))) { printk(BIOS_ERR, "CFG EEPROM: Failed to read BMC settings\n"); return NULL; } @@ -99,8 +99,8 @@ return hsi; } -/* Read data from offset and write it to offset in UPD */ -bool read_write_config(void *blob, size_t read_offset, size_t size) +/* Read data from an EEPROM on SMBus and write it to a buffer */ +bool eeprom_read_buffer(void *blob, size_t read_offset, size_t size) { int ret = 0; @@ -141,7 +141,7 @@ * Write a single byte into the EEPROM at specified offset. * Returns true on error, false on success. */ -static bool write_byte_eeprom(const uint8_t data, const uint16_t write_offset) +static bool eeprom_write_byte(const uint8_t data, const uint16_t write_offset) { int ret = 0; @@ -188,7 +188,7 @@ bool changed = false; /* Read old settings */ - if (read_write_config(&old_layout, off, sizeof(old_layout))) { + if (eeprom_read_buffer(&old_layout, off, sizeof(old_layout))) { printk(BIOS_ERR, "CFG EEPROM: Read operation failed\n"); return true; } @@ -201,7 +201,7 @@ for (size_t i = 0; i < sizeof(old_layout); i++) { if (old[i] != new[i]) { changed = true; - if (write_byte_eeprom(new[i], off + i)) { + if (eeprom_write_byte(new[i], off + i)) { printk(BIOS_ERR, "CFG EEPROM: Write operation failed\n"); ret = true; break; diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h b/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h index 3a28219..4e6557a 100644 --- a/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h +++ b/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h @@ -91,7 +91,7 @@ _Static_assert(sizeof(FSPS_UPD) <= 0xC00, "FSPS_UPD too big"); _Static_assert(sizeof(struct eeprom_layout) == 0x2000, "EEPROM layout size mismatch"); -bool read_write_config(void *blob, size_t read_offset, size_t size); +bool eeprom_read_buffer(void *blob, size_t read_offset, size_t size); int check_signature(const size_t offset, const uint64_t signature); struct eeprom_board_settings *get_board_settings(void); struct eeprom_bmc_settings *get_bmc_settings(void); @@ -103,7 +103,7 @@ do { \ typeof(dest->opt_name) __tmp; \ size_t __off = offsetof(struct eeprom_layout, section_name); \ - bool ret = read_write_config(&__tmp, \ + bool ret = eeprom_read_buffer(&__tmp, \ __off + offsetof(section_type, opt_name), \ sizeof(__tmp)); \ if (ret) { \ -- To view, visit https://review.coreboot.org/c/coreboot/+/52885 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84b9ef080f1ac91ea6f7273457b882677abf70d3 Gerrit-Change-Number: 52885 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/prodrive/hermes: Simplify `read_write_config` signature
by Angel Pons (Code Review) 04 May '21

04 May '21

Attention is currently required from: Nico Huber, Patrick Rudolph. Hello Nico Huber, Patrick Rudolph, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/52884 to review the following change. Change subject: mb/prodrive/hermes: Simplify `read_write_config` signature ...................................................................... mb/prodrive/hermes: Simplify `read_write_config` signature The `write_offset` parameter is always zero. Remove it. Change-Id: Ib63cb25904ad6c1c7424a9c01d8bf1e84c08453b Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/prodrive/hermes/eeprom.c M src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h 2 files changed, 7 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/52884/1 diff --git a/src/mainboard/prodrive/hermes/eeprom.c b/src/mainboard/prodrive/hermes/eeprom.c index a712156..614f069 100644 --- a/src/mainboard/prodrive/hermes/eeprom.c +++ b/src/mainboard/prodrive/hermes/eeprom.c @@ -21,7 +21,7 @@ { u8 blob[8] = {0}; - if (!read_write_config(blob, offset, 0, ARRAY_SIZE(blob))) { + if (!read_write_config(blob, offset, ARRAY_SIZE(blob))) { /* Check signature */ if (*(uint64_t *)blob == signature) { printk(BIOS_DEBUG, "CFG EEPROM: Signature valid.\n"); @@ -41,7 +41,7 @@ { const size_t board_settings_offset = offsetof(struct eeprom_layout, BoardSettings); - if (read_write_config(board_cfg, board_settings_offset, 0, sizeof(*board_cfg))) { + if (read_write_config(board_cfg, board_settings_offset, sizeof(*board_cfg))) { printk(BIOS_ERR, "CFG EEPROM: Failed to read board settings\n"); return false; } @@ -79,7 +79,7 @@ static int valid = 0; if (valid == 0) { - if (read_write_config(&bmc_cfg, bmc_settings_offset, 0, sizeof(bmc_cfg))) { + if (read_write_config(&bmc_cfg, bmc_settings_offset, sizeof(bmc_cfg))) { printk(BIOS_ERR, "CFG EEPROM: Failed to read BMC settings\n"); return NULL; } @@ -100,7 +100,7 @@ } /* Read data from offset and write it to offset in UPD */ -bool read_write_config(void *blob, size_t read_offset, size_t write_offset, size_t size) +bool read_write_config(void *blob, size_t read_offset, size_t size) { int ret = 0; @@ -120,7 +120,7 @@ break; /* Write to UPD */ - uint8_t *writePointer = (uint8_t *)blob + write_offset + i; + uint8_t *writePointer = (uint8_t *)blob + i; writePointer[0] = tmp[0]; if (size - i > 1) writePointer[1] = tmp[1]; @@ -188,7 +188,7 @@ bool changed = false; /* Read old settings */ - if (read_write_config(&old_layout, off, 0, sizeof(old_layout))) { + if (read_write_config(&old_layout, off, sizeof(old_layout))) { printk(BIOS_ERR, "CFG EEPROM: Read operation failed\n"); return true; } diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h b/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h index 58ecb08..3a28219 100644 --- a/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h +++ b/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h @@ -91,7 +91,7 @@ _Static_assert(sizeof(FSPS_UPD) <= 0xC00, "FSPS_UPD too big"); _Static_assert(sizeof(struct eeprom_layout) == 0x2000, "EEPROM layout size mismatch"); -bool read_write_config(void *blob, size_t read_offset, size_t write_offset, size_t size); +bool read_write_config(void *blob, size_t read_offset, size_t size); int check_signature(const size_t offset, const uint64_t signature); struct eeprom_board_settings *get_board_settings(void); struct eeprom_bmc_settings *get_bmc_settings(void); @@ -105,7 +105,6 @@ size_t __off = offsetof(struct eeprom_layout, section_name); \ bool ret = read_write_config(&__tmp, \ __off + offsetof(section_type, opt_name), \ - 0, \ sizeof(__tmp)); \ if (ret) { \ report_eeprom_error(__off + offsetof(section_type, opt_name)); \ -- To view, visit https://review.coreboot.org/c/coreboot/+/52884 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib63cb25904ad6c1c7424a9c01d8bf1e84c08453b Gerrit-Change-Number: 52884 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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coreboot-gerrit May 2021