coreboot-gerrit May 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: treewide: Kconfig: replace `def_bool n` by `bool`
by Martin Roth (Code Review) 05 May '21

05 May '21

Attention is currently required from: Nico Huber, Michael Niewöhner, Werner Zeh. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52809 ) Change subject: treewide: Kconfig: replace `def_bool n` by `bool` ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > > > It's actually the other way round. […] Types cannot be overridden. The type is only required in a single place, though it's typically included everywhere. For the prompts with defaults, I moved the default to the end of the src/Kconfig file. This is really the only spot where it's critical because the general menu is at the very top, ahead of the mainboard or chipset menus. To me 'dev_bool n' is more than just "I don't care what the default is, so set it to n if nobody else sets it to y. It's a signal saying that n SHOULD be the default option. We lose that signal with this change. Why is this change necessary? You say that the def_bool n isn't needed, but is it hurting anything? My thought is that it doesn't hurt anything, so let's just leave it as it is and not touch files all across the codebase. -- To view, visit https://review.coreboot.org/c/coreboot/+/52809 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27e89c66d18b7b3a5ac425eacea10df8c013814f Gerrit-Change-Number: 52809 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 05 May 2021 19:27:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/gerrit: Document our Gerrit user roles and procedures
by Patrick Georgi (Code Review) 05 May '21

05 May '21

Attention is currently required from: Stefan Reinauer, Angel Pons, Jan Dabros. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52265 ) Change subject: Documentation/gerrit: Document our Gerrit user roles and procedures ...................................................................... Patch Set 6: (1 comment) File Documentation/getting_started/gerrit_guidelines.md: https://review.coreboot.org/c/coreboot/+/52265/comment/9a9094e0_a95e55e8 PS2, Line 347: by themselves or others, : at the regular [coreboot leadership meetings](../community/forums.md) : where a decision is made. > I favor the approach to only tighten things up once there are problems as it saves time. […] We discussed it in today's meeting and everybody there was fine with running a quick "any objections?" type of vote in the meeting when new people are to be added. -- To view, visit https://review.coreboot.org/c/coreboot/+/52265 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib31083f5a07bd89efd13ecd6aaf34a69d438d59d Gerrit-Change-Number: 52265 Gerrit-PatchSet: 6 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jan Dabros <jsd(a)semihalf.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jan Dabros <jsd(a)semihalf.com> Gerrit-Comment-Date: Wed, 05 May 2021 19:26:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/mancomb: Fix EC SCI configuration
by Felix Held (Code Review) 05 May '21

05 May '21

Attention is currently required from: Raul Rangel, Martin Roth, Ivy Jian, chris wang. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52948 ) Change subject: mb/google/mancomb: Fix EC SCI configuration ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: yeah, the enums are quite misleading. would be good if you open a bug to get that fixed. sure it'll cause some pain for non-upstream boards, but having this source of mistakes is probably worse in the long run -- To view, visit https://review.coreboot.org/c/coreboot/+/52948 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac86d2ef5bdd21fbb0a0d4e235efe4fe621023b2 Gerrit-Change-Number: 52948 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: chris wang <Chris.Wang(a)amd.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-Attention: chris wang <Chris.Wang(a)amd.com> Gerrit-Comment-Date: Wed, 05 May 2021 19:13:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/mancomb: Implement tis_plat_irq_status
by Martin Roth (Code Review) 05 May '21

05 May '21

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52950 ) Change subject: mb/google/mancomb: Implement tis_plat_irq_status ...................................................................... mb/google/mancomb: Implement tis_plat_irq_status This patch was implemented on Guybrush at CB:52352 BUG=b:185397933 TEST=Build Signed-off-by: Martin Roth <martinroth(a)chromium.org> Change-Id: I141a504a827f37724fab0aaed7498fd543e471d6 --- M src/mainboard/google/mancomb/variants/baseboard/Makefile.inc A src/mainboard/google/mancomb/variants/baseboard/tpm_tis.c 2 files changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/52950/1 diff --git a/src/mainboard/google/mancomb/variants/baseboard/Makefile.inc b/src/mainboard/google/mancomb/variants/baseboard/Makefile.inc index 3b86b93..88aa1a4 100644 --- a/src/mainboard/google/mancomb/variants/baseboard/Makefile.inc +++ b/src/mainboard/google/mancomb/variants/baseboard/Makefile.inc @@ -1,7 +1,12 @@ bootblock-y += gpio.c +bootblock-y += helpers.c + +romstage-y += tpm_tis.c ramstage-y += gpio.c +ramstage-y += tpm_tis.c verstage-y += gpio.c +verstage-y += tpm_tis.c smm-y += gpio.c diff --git a/src/mainboard/google/mancomb/variants/baseboard/tpm_tis.c b/src/mainboard/google/mancomb/variants/baseboard/tpm_tis.c new file mode 100644 index 0000000..4550728 --- /dev/null +++ b/src/mainboard/google/mancomb/variants/baseboard/tpm_tis.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <security/tpm/tis.h> +#include <soc/gpio.h> + +int tis_plat_irq_status(void) +{ + return gpio_interrupt_status(GPIO_3); +} -- To view, visit https://review.coreboot.org/c/coreboot/+/52950 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I141a504a827f37724fab0aaed7498fd543e471d6 Gerrit-Change-Number: 52950 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/mancomb: Update Kconfig with needed options
by Martin Roth (Code Review) 05 May '21

05 May '21

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52949 ) Change subject: mb/google/mancomb: Update Kconfig with needed options ...................................................................... mb/google/mancomb: Update Kconfig with needed options DISABLE_KEYBOARD_RESET_PIN - This pin goes to a test point and is not used for the reset. DRIVERS_UART_ACPI - Add the UART ACPI code FW_CONFIG - Mancomb uses the firmware config interface PSP_DISABLE_POSTCODES - The PSP is not yet initializing eSPI correctly to send post codes to the EC, so disable them for now. BUG=None Test=Build Signed-off-by: Martin Roth <martinroth(a)chromium.org> Change-Id: I39efcc8d1e0fb1e7ac0b0541a49db0ac0ee56481 --- M src/mainboard/google/mancomb/Kconfig 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/52949/1 diff --git a/src/mainboard/google/mancomb/Kconfig b/src/mainboard/google/mancomb/Kconfig index d114f0e..91ec169 100644 --- a/src/mainboard/google/mancomb/Kconfig +++ b/src/mainboard/google/mancomb/Kconfig @@ -9,20 +9,24 @@ def_bool y select AMD_SOC_CONSOLE_UART select BOARD_ROMSIZE_KB_16384 + select DISABLE_KEYBOARD_RESET_PIN select DISABLE_SPI_FLASH_ROM_SHARING select DRIVERS_I2C_GENERIC select DRIVERS_I2C_HID + select DRIVERS_UART_ACPI select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_BOARDID select EC_GOOGLE_CHROMEEC_ESPI select EC_GOOGLE_CHROMEEC_SKUID select ELOG select ELOG_GSMI + select FW_CONFIG select HAVE_ACPI_RESUME select HAVE_EM100_SUPPORT select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_I2C_TPM_CR50 select MAINBOARD_HAS_TPM2 + select PSP_DISABLE_POSTCODES select SOC_AMD_CEZANNE select SOC_AMD_COMMON_BLOCK_USE_ESPI -- To view, visit https://review.coreboot.org/c/coreboot/+/52949 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I39efcc8d1e0fb1e7ac0b0541a49db0ac0ee56481 Gerrit-Change-Number: 52949 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/mancomb: Fix EC SCI configuration
by Martin Roth (Code Review) 05 May '21

05 May '21

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52948 ) Change subject: mb/google/mancomb: Fix EC SCI configuration ...................................................................... mb/google/mancomb: Fix EC SCI configuration This change fixes two problems: 1) We had the enum values for .direction and .level swapped. The naming is very confusing... 2) ESPI_SYS is not a good event to use for EC SCI. It is a level/low event that is only cleared by reading the eSPI status register 0x9C. Cezanne has added a new event source that directly exposes the SCI bit. This is the correct event source to use for EC SCI. This same patch was added for Guybrush at CB:52673 BUG=b:186045622, b:181139095 TEST=Build Signed-off-by: Martin Roth <martinroth(a)chromium.org> Change-Id: Iac86d2ef5bdd21fbb0a0d4e235efe4fe621023b2 --- M src/mainboard/google/mancomb/ec.c 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/52948/1 diff --git a/src/mainboard/google/mancomb/ec.c b/src/mainboard/google/mancomb/ec.c index 5a0bc1b..67fdda1 100644 --- a/src/mainboard/google/mancomb/ec.c +++ b/src/mainboard/google/mancomb/ec.c @@ -9,10 +9,10 @@ static const struct sci_source espi_sci_sources[] = { { - .scimap = SMITYPE_ESPI_SYS, + .scimap = SMITYPE_ESPI_SCI_B, .gpe = EC_SCI_GPI, - .direction = SMI_SCI_LVL, - .level = SMI_SCI_LVL_HIGH + .direction = SMI_SCI_LVL_HIGH, /* enum smi_sci_lvl */ + .level = SMI_SCI_EDG, /* enum smi_sci_dir */ } }; -- To view, visit https://review.coreboot.org/c/coreboot/+/52948 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac86d2ef5bdd21fbb0a0d4e235efe4fe621023b2 Gerrit-Change-Number: 52948 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/mancomb: Update AMDFW config file
by Martin Roth (Code Review) 05 May '21

05 May '21

Attention is currently required from: Martin Roth, Marshall Dawson. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52900 to look at the new patch set (#2). Change subject: mb/google/mancomb: Update AMDFW config file ...................................................................... mb/google/mancomb: Update AMDFW config file Mancomb uses DDR4 SODIMMs, but the default cezanne configuration is for the LPDDR4 version. This changes to use SODIMMS. Further changes may be needed for platform customization, so I put the config file in variants/baseboard instead of the root mancomb directory. BUG=b:187094481 TEST=Build only Signed-off-by: Martin Roth <martin(a)coreboot.org> Change-Id: Icc4dc8aec2053cb177765f57e57cac7a099508fe --- M src/mainboard/google/mancomb/Kconfig A src/mainboard/google/mancomb/variants/baseboard/amdfw.cfg 2 files changed, 44 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/52900/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52900 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc4dc8aec2053cb177765f57e57cac7a099508fe Gerrit-Change-Number: 52900 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-CC: chris wang <Chris.Wang(a)amd.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: chromeos/Kconfig: Add TPM20_CREATE_FWMP
by Aseda Aboagye (Code Review) 05 May '21

05 May '21

Attention is currently required from: Andrey Pronin, Julius Werner, Aaron Durbin. Aseda Aboagye has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52919 ) Change subject: chromeos/Kconfig: Add TPM20_CREATE_FWMP ...................................................................... Patch Set 5: (6 comments) Patchset: PS5: I added a new API in vboot_reference. How do I ensure that upstream coreboot will pick that up? File src/security/vboot/secdata_tpm.c: https://review.coreboot.org/c/coreboot/+/52919/comment/c78a0d59_9d6e12f6 PS1, Line 111: > Ack Done https://review.coreboot.org/c/coreboot/+/52919/comment/005d18e1_12eed8ca PS1, Line 237: .TPMA_NV_OWNERWRITE = 1, > I recall reading a comment in a doc that we should consider FWMP as frozen. […] Done https://review.coreboot.org/c/coreboot/+/52919/comment/658ea1d1_93ad4263 PS1, Line 243: rv = tlcl_define_space(FWMP_NV_INDEX, VB2_SECDATA_FWMP_MAX_SIZE, > My understanding was that it simply considers the space as missing since the read would be returning […] I'm initializing the space now. https://review.coreboot.org/c/coreboot/+/52919/comment/ae70762d_dead8f3f PS1, Line 244: pcr0_allowed_policy, > Ack Done https://review.coreboot.org/c/coreboot/+/52919/comment/657a85b5_c2be69c0 PS1, Line 246: if (rv == TPM_E_NV_DEFINED) { > Ah, I see what you mean now. Yes, sorry, we want to continue if we're successful. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/52919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1f566e00f11046ff9a9891c65660af50fbb83675 Gerrit-Change-Number: 52919 Gerrit-PatchSet: 5 Gerrit-Owner: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Pronin <apronin(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Andrey Pronin <apronin(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Comment-Date: Wed, 05 May 2021 19:01:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Aseda Aboagye <aaboagye(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede: Select TPM20_CREATE_FWMP for discrete TPM boards
by Aseda Aboagye (Code Review) 05 May '21

05 May '21

Attention is currently required from: Aseda Aboagye. Hello build bot (Jenkins), Aaron Durbin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52920 to look at the new patch set (#5). Change subject: mb/google/dedede: Select TPM20_CREATE_FWMP for discrete TPM boards ...................................................................... mb/google/dedede: Select TPM20_CREATE_FWMP for discrete TPM boards For dedede boards that use a discrete TPM, they will need to create the firmware management parameters TPM space. This commit simply selects that config option for those boards. BUG=b:184677625 BRANCH=None TEST=`emerge-keeby coreboot` Change-Id: I6c49f2018baa17df8c932b7a7d7f1aec28749ff2 Signed-off-by: Aseda Aboagye <aaboagye(a)google.com> --- M src/mainboard/google/dedede/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/52920/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/52920 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6c49f2018baa17df8c932b7a7d7f1aec28749ff2 Gerrit-Change-Number: 52920 Gerrit-PatchSet: 5 Gerrit-Owner: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Aseda Aboagye <aaboagye(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: chromeos/Kconfig: Add TPM20_CREATE_FWMP
by Aseda Aboagye (Code Review) 05 May '21

05 May '21

Attention is currently required from: Andrey Pronin, Julius Werner, Aaron Durbin. Hello build bot (Jenkins), Andrey Pronin, Aaron Durbin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52919 to look at the new patch set (#5). Change subject: chromeos/Kconfig: Add TPM20_CREATE_FWMP ...................................................................... chromeos/Kconfig: Add TPM20_CREATE_FWMP This commit adds a new config option, TPM20_CREATE_FWMP which instructs coreboot to create the Chrome OS Firmware Management Parameters space in the TPM. When selected, coreboot will simply define this space, but not initialize the contents. The space can be written to by the TPM owner from userspace. BUG=b:184677625 BRANCH=None TEST=emerge-keeby coreboot Signed-off-by: Aseda Aboagye <aaboagye(a)google.com> Change-Id: I1f566e00f11046ff9a9891c65660af50fbb83675 --- M src/security/vboot/secdata_tpm.c M src/vendorcode/google/chromeos/Kconfig 2 files changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/52919/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/52919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1f566e00f11046ff9a9891c65660af50fbb83675 Gerrit-Change-Number: 52919 Gerrit-PatchSet: 5 Gerrit-Owner: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Pronin <apronin(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Andrey Pronin <apronin(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit May 2021