coreboot-gerrit May 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/amd/cezanne: Enable GNB IO-APIC _PRT
by Marshall Dawson (Code Review) 09 May '21

09 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53936 ) Change subject: soc/amd/cezanne: Enable GNB IO-APIC _PRT ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/53936 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4df5a4583f14044d2efcde3a9de9dd85e898a11d Gerrit-Change-Number: 53936 Gerrit-PatchSet: 4 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Comment-Date: Sun, 09 May 2021 02:29:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: add GNB IOAPIC support
by Marshall Dawson (Code Review) 09 May '21

09 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Felix Held. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52905 ) Change subject: soc/amd/cezanne: add GNB IOAPIC support ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52905 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e127ce500d052783f0a6e13fb2ad16a8e408b0e Gerrit-Change-Number: 52905 Gerrit-PatchSet: 6 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 09 May 2021 02:29:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Populate PIC IRQ data
by Raul Rangel (Code Review) 09 May '21

09 May '21

Attention is currently required from: Paul Menzel. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52915 ) Change subject: mb/google/guybrush: Populate PIC IRQ data ...................................................................... Patch Set 8: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/52915/comment/019ef385_7a2b0736 PS7, Line 9: setup > Nit: Verb is spelled with a space: set up Done -- To view, visit https://review.coreboot.org/c/coreboot/+/52915 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d66ccd08a86a64242dbc909c57ff9685828f61f Gerrit-Change-Number: 52915 Gerrit-PatchSet: 8 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sun, 09 May 2021 02:20:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Populate PIC IRQ data
by Raul Rangel (Code Review) 09 May '21

09 May '21

Attention is currently required from: Raul Rangel. Hello build bot (Jenkins), Paul Menzel, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52915 to look at the new patch set (#8). Change subject: mb/google/guybrush: Populate PIC IRQ data ...................................................................... mb/google/guybrush: Populate PIC IRQ data The PIC IRQs are required so we can correctly set up the PCI_INT registers. This only matters when booting in PIC mode. We don't need to set the IO-APIC registers since the linux kernel will auto-assign those to reduce conflicts. BUG=b:184766519 TEST=Boot guybrush with `pci=nomsi,noacpi amd_iommu=off noapic` and verify xhci and graphics continue to work. $ cat /proc/interrupts 12: 285064 XT-PIC nvme0q0, nvme0q1, rtw88_pci 13: 100000 XT-PIC xhci-hcd:usb1 14: 4032 XT-PIC amdgpu, xhci-hcd:usb3 Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: I1d66ccd08a86a64242dbc909c57ff9685828f61f --- M src/mainboard/google/guybrush/mainboard.c 1 file changed, 8 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/52915/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/52915 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d66ccd08a86a64242dbc909c57ff9685828f61f Gerrit-Change-Number: 52915 Gerrit-PatchSet: 8 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cpu/intel/socket_p: Increase DCACHE_RAM_SIZE
by Nico Huber (Code Review) 08 May '21

08 May '21

Attention is currently required from: Arthur Heymans, Angel Pons, Alexander Couzens, Patrick Rudolph. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52942 ) Change subject: cpu/intel/socket_p: Increase DCACHE_RAM_SIZE ...................................................................... Patch Set 1: (1 comment) File src/cpu/intel/socket_p/Kconfig: https://review.coreboot.org/c/coreboot/+/52942/comment/8749dfdd_6060fc75 PS1, Line 16: default 0x10000 > Looks like Crestline reference code uses a CodeRegion of 0x20000 and a DataRegion of 0x2000 DCACHE_RAM_SIZE would be the data region. for code, we use the size of the stage. Hmmm, Arthur actually wrote some nice code about it. Size of the code range is limited so that we don't use more than 256KiB total: `src/cpu/x86/mtrr/xip_cache.c` Oh, and `t400/` is the only user of Socket P... romstage and bootblock are about 80KiB together. Don't know about verstage, but I guess the 32KiB extra here won't hurt. Would be nice to test it on any device, though. I could also do that. -- To view, visit https://review.coreboot.org/c/coreboot/+/52942 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d6f7f9151ecd4c9fbbba4ed033dfda8724b6772 Gerrit-Change-Number: 52942 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sat, 08 May 2021 20:48:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: doc/releases/coreboot-4.14: add AMD SoC cleanup and Cezanne addition
by Patrick Georgi (Code Review) 08 May '21

08 May '21

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/53924 ) Change subject: doc/releases/coreboot-4.14: add AMD SoC cleanup and Cezanne addition ...................................................................... doc/releases/coreboot-4.14: add AMD SoC cleanup and Cezanne addition Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I72a9056edfddb4e2cd2e6412cb5ea72cf965f9c6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/53924 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M Documentation/releases/coreboot-4.14-relnotes.md 1 file changed, 9 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved Kyösti Mälkki: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved diff --git a/Documentation/releases/coreboot-4.14-relnotes.md b/Documentation/releases/coreboot-4.14-relnotes.md index e383c2e..6b629f4 100644 --- a/Documentation/releases/coreboot-4.14-relnotes.md +++ b/Documentation/releases/coreboot-4.14-relnotes.md @@ -52,4 +52,13 @@ Significant changes ------------------- +### AMD SoC cleanup and initial Cezanne APU support + +There's initial support for the AMD Cezanne APUs in the tree. This code +hasn't started as a copy of the previous generation, but was based on a +slightly modified version of the example/min86 SoC. During the cleanup +of the existing Picasso SoC code the common parts of the code were +moved to the common AMD SoC code, so that they could be used by the +Cezanne code instead of adding another slightly different copy. + ### Add significant changes here -- To view, visit https://review.coreboot.org/c/coreboot/+/53924 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I72a9056edfddb4e2cd2e6412cb5ea72cf965f9c6 Gerrit-Change-Number: 53924 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: doc/relnotes/4.14: add Intel Xeon-SP support status change
by Patrick Georgi (Code Review) 08 May '21

08 May '21

Attention is currently required from: Marc Jones, Anjaneya "Reddy" Chagam, Jonathan Zhang, Christian Walter, Stefan Reinauer, David Hendricks, Angel Pons, Subrata Banik, ron minnich. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52735 ) Change subject: doc/relnotes/4.14: add Intel Xeon-SP support status change ...................................................................... Patch Set 6: (2 comments) File Documentation/releases/coreboot-4.14-relnotes.md: https://review.coreboot.org/c/coreboot/+/52735/comment/100f79a3_7c407e02 PS2, Line 76: https://www.intel.in/content/www/in/en/products/details/processors/xeon/sca… > Sorry I am not able to find the local neutral URL scheme. […] Ack File Documentation/releases/coreboot-4.14-relnotes.md: https://review.coreboot.org/c/coreboot/+/52735/comment/806ff301_0ef82398 PS6, Line 69: soc sorry, here too -- To view, visit https://review.coreboot.org/c/coreboot/+/52735 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibead1c75bb4e41fedc2799366b5b006d76fc8f4e Gerrit-Change-Number: 52735 Gerrit-PatchSet: 6 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Sat, 08 May 2021 18:57:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Comment-In-Reply-To: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/block/pci: Introduce struct pci_routing_info
by Felix Held (Code Review) 08 May '21

08 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53922 ) Change subject: soc/amd/common/block/pci: Introduce struct pci_routing_info ...................................................................... Patch Set 4: (1 comment) File src/soc/amd/common/block/include/amdblocks/amd_pci_util.h: https://review.coreboot.org/c/coreboot/+/53922/comment/d845b429_5d3cfa41 PS3, Line 47: struct pci_routing_info { > ok, both are valid, so let's keep it like it is now Nico reminded me why having that before the definition is a better approach: when __packed isn't defined, the compiler will treat it as variable name and not just throw an error and that was what i remembered happening some time ago. i'm ok with this being addresses as a follow-up -- To view, visit https://review.coreboot.org/c/coreboot/+/53922 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1a8d988d125f407f0aa7bc1722d432446aa9aff8 Gerrit-Change-Number: 53922 Gerrit-PatchSet: 4 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Comment-Date: Sat, 08 May 2021 18:56:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso: move acpigen_dptc_call_alib to new common alib
by Felix Held (Code Review) 08 May '21

08 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53940 ) Change subject: soc/amd/picasso: move acpigen_dptc_call_alib to new common alib ...................................................................... Patch Set 2: (1 comment) File src/soc/amd/picasso/root_complex.c: https://review.coreboot.org/c/coreboot/+/53940/comment/f2b3450e_3763bef2 PS1, Line 211: acpigen_dptc_call_alib("DEFB", (uint8_t *)(void *)&default_input, sizeof(default_input)); > line over 96 characters done -- To view, visit https://review.coreboot.org/c/coreboot/+/53940 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0f7da12429b6278d1e4bc5d6650c7ee0f3b5209 Gerrit-Change-Number: 53940 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Comment-Date: Sat, 08 May 2021 18:24:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso: move acpigen_dptc_call_alib to new common alib
by Felix Held (Code Review) 08 May '21

08 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/53940 to look at the new patch set (#2). Change subject: soc/amd/picasso: move acpigen_dptc_call_alib to new common alib ...................................................................... soc/amd/picasso: move acpigen_dptc_call_alib to new common alib Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ib0f7da12429b6278d1e4bc5d6650c7ee0f3b5209 --- M src/soc/amd/common/block/acpi/Kconfig M src/soc/amd/common/block/acpi/Makefile.inc A src/soc/amd/common/block/acpi/alib.c M src/soc/amd/common/block/include/amdblocks/alib.h M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/root_complex.c 6 files changed, 27 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/53940/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/53940 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0f7da12429b6278d1e4bc5d6650c7ee0f3b5209 Gerrit-Change-Number: 53940 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit May 2021