coreboot-gerrit May 2021

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Change in coreboot[master]: nb/amd/agesa/family14: Use generic allocation functions for northbridge
by Michał Żygowski (Code Review) 09 May '21

09 May '21

Attention is currently required from: Nico Huber, Kyösti Mälkki. Hello build bot (Jenkins), Nico Huber, Angel Pons, Kyösti Mälkki, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52934 to look at the new patch set (#4). Change subject: nb/amd/agesa/family14: Use generic allocation functions for northbridge ...................................................................... nb/amd/agesa/family14: Use generic allocation functions for northbridge Remove obsolete resource assigning functions. IO and MMIO address registers are currently set by amd_initcpuio to cover whole PCI hole under 4G to MMIO and IO 0x0000-0xFFFF is configured to be routed to southbridge already. Use generic PCI and resource allocation functions wherever possible to set northbridge resources. TEST=boot Debian with Linux 4.14 on apu1 2GB Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I74a0ed1fcbbc9e066c42c4d51d30ab1d7138134a --- M src/northbridge/amd/agesa/family14/northbridge.c 1 file changed, 7 insertions(+), 243 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/52934/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/52934 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I74a0ed1fcbbc9e066c42c4d51d30ab1d7138134a Gerrit-Change-Number: 52934 Gerrit-PatchSet: 4 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: nb/amd/agesa/family14/: Use generic allocation functions for northbridge
by Michał Żygowski (Code Review) 09 May '21

09 May '21

Attention is currently required from: Nico Huber, Kyösti Mälkki. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52934 ) Change subject: nb/amd/agesa/family14/: Use generic allocation functions for northbridge ...................................................................... Patch Set 3: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/52934/comment/a4b683ce_bc211d86 PS2, Line 9: Remove obsolete resource assigning functions. > Why are they obsolete? Elaborated a bit in the commit message attempting to explain it. Patchset: PS2: > Unless I missed something, this is a mess. The commit message > is almost empty. Why can the code be dropped? and if we can drop > the assignments, why do we allocate the resources in the first > place? The generic functions do the resource assignments. Why it can be dropped is explained in the commit message right now. > > It would probably be a good idea to separate NB and domain code > changes into individual commits. And also not to mix cosmetical > changes in. > Split it per your suggestion. Let me know what I can do more to make the review easier for you. I don't see any cosmetical changes right now. File src/northbridge/amd/agesa/family14/northbridge.c: https://review.coreboot.org/c/coreboot/+/52934/comment/059593c7_fb8009fa PS2, Line 448: set_resource(dev, res, nodeid); > If we can drop this, why does the respective code in nb_read_resources() stay? Right, the respective code in nb_read_resources does not do anything meaningful too. Removed. -- To view, visit https://review.coreboot.org/c/coreboot/+/52934 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I74a0ed1fcbbc9e066c42c4d51d30ab1d7138134a Gerrit-Change-Number: 52934 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Sun, 09 May 2021 11:45:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: nb/amd/agesa/family14: Use generic allocation functions for PCI domain
by Michał Żygowski (Code Review) 09 May '21

09 May '21

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/53954 ) Change subject: nb/amd/agesa/family14: Use generic allocation functions for PCI domain ...................................................................... nb/amd/agesa/family14: Use generic allocation functions for PCI domain Move the DRAM reporting to read_resoures function before the resource are being set. Use generic PCI domain resource allocation functions to read and set domain resources. TEST=boot Debian with Linux 4.14 on apu1 2GB oSigned-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: Ie322c7eee443646a5690920c1e06851ee5fdfac3 --- M src/northbridge/amd/agesa/family14/northbridge.c 1 file changed, 5 insertions(+), 59 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/53954/1 diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index f8e9863..ec507f3 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -47,13 +47,6 @@ } } -static u32 f1_read_config32(unsigned int reg) -{ - if (fx_devs == 0) - get_fx_devs(); - return pci_read_config32(__f1_dev[0], reg); -} - static void f1_write_config32(unsigned int reg, u32 value) { int i; @@ -223,48 +216,6 @@ static void domain_read_resources(struct device *dev) { - unsigned int reg; - - printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); - - /* Find the already assigned resource pairs */ - get_fx_devs(); - for (reg = 0x80; reg <= 0xc0; reg += 0x08) { - u32 base, limit; - base = f1_read_config32(reg); - limit = f1_read_config32(reg + 0x04); - /* Is this register allocated? */ - if ((base & 3) != 0) { - unsigned int nodeid, reg_link; - struct device *reg_dev; - if (reg < 0xc0) { // mmio - nodeid = (limit & 0xf) + (base & 0x30); - } else { // io - nodeid = (limit & 0xf) + ((base >> 4) & 0x30); - } - reg_link = (limit >> 4) & 7; - reg_dev = __f0_dev[nodeid]; - if (reg_dev) { - /* Reserve the resource */ - struct resource *res; - res = - new_resource(reg_dev, - IOINDEX(0x1000 + reg, - reg_link)); - if (res) { - res->flags = 1; - } - } - } - } - /* FIXME: do we need to check extend conf space? - I don't believe that much preset value */ - - pci_domain_read_resources(dev); -} - -static void domain_set_resources(struct device *dev) -{ printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); printk(BIOS_DEBUG, " amsr - incoming dev = %p\n", dev); @@ -277,6 +228,8 @@ u32 reset_memhole = 1; #endif + pci_domain_read_resources(dev); + pci_tolm = 0xffffffffUL; for (link = dev->link_list; link; link = link->next) { pci_tolm = my_find_pci_tolm(link, pci_tolm); @@ -361,13 +314,6 @@ printk(BIOS_DEBUG, " adsr - mmio_basek = %lx.\n", mmio_basek); add_uma_resource_below_tolm(dev, 7); - - for (link = dev->link_list; link; link = link->next) { - if (link->children) { - assign_resources(link); - } - } - printk(BIOS_DEBUG, " adsr - leaving this lovely routine.\n"); } static const char *domain_acpi_name(const struct device *dev) @@ -568,9 +514,9 @@ static struct device_operations pci_domain_ops = { .read_resources = domain_read_resources, - .set_resources = domain_set_resources, - .scan_bus = pci_domain_scan_bus, - .acpi_name = domain_acpi_name, + .set_resources = pci_domain_set_resources, + .scan_bus = pci_domain_scan_bus, + .acpi_name = domain_acpi_name, }; static struct device_operations cpu_bus_ops = { -- To view, visit https://review.coreboot.org/c/coreboot/+/53954 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie322c7eee443646a5690920c1e06851ee5fdfac3 Gerrit-Change-Number: 53954 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: nb/amd/agesa/family14/northbridge.c: Report missing resources
by Michał Żygowski (Code Review) 09 May '21

09 May '21

Attention is currently required from: Nico Huber, Angel Pons, Kyösti Mälkki, Felix Held. Hello build bot (Jenkins), Nico Huber, Angel Pons, Kyösti Mälkki, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52935 to look at the new patch set (#3). Change subject: nb/amd/agesa/family14/northbridge.c: Report missing resources ...................................................................... nb/amd/agesa/family14/northbridge.c: Report missing resources Not all resources were being reported, add them. TEST=boot Debian with Linux 4.14 on apu1 2GB Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I0b1b5f585ff6e0c7aecad250a75600e0c76331e1 --- M src/northbridge/amd/agesa/family14/northbridge.c 1 file changed, 48 insertions(+), 44 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/52935/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/52935 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b1b5f585ff6e0c7aecad250a75600e0c76331e1 Gerrit-Change-Number: 52935 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: nb/amd/agesa/family14/: Use generic allocation functions for northbridge
by Michał Żygowski (Code Review) 09 May '21

09 May '21

Attention is currently required from: Michał Żygowski, Kyösti Mälkki. Hello build bot (Jenkins), Nico Huber, Angel Pons, Kyösti Mälkki, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52934 to look at the new patch set (#3). Change subject: nb/amd/agesa/family14/: Use generic allocation functions for northbridge ...................................................................... nb/amd/agesa/family14/: Use generic allocation functions for northbridge Remove obsolete resource assigning functions. IO and MMIO address registers are currently set by amd_initcpuio to cover whole PCI hole under 4G to MMIO and IO 0x0000-0xFFFF is configured to be routed to southbridge already. Use generic PCI and resource allocation functions wherever possible to set northbridge resources. TEST=boot Debian with Linux 4.14 on apu1 2GB Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I74a0ed1fcbbc9e066c42c4d51d30ab1d7138134a --- M src/northbridge/amd/agesa/family14/northbridge.c 1 file changed, 7 insertions(+), 243 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/52934/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/52934 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I74a0ed1fcbbc9e066c42c4d51d30ab1d7138134a Gerrit-Change-Number: 52934 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: nb/amd/agesa/family14/northbridge.c: Report missing resources
by Michał Żygowski (Code Review) 09 May '21

09 May '21

Attention is currently required from: Nico Huber, Angel Pons, Kyösti Mälkki, Felix Held. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52935 ) Change subject: nb/amd/agesa/family14/northbridge.c: Report missing resources ...................................................................... Patch Set 2: (1 comment) File src/northbridge/amd/agesa/family14/northbridge.c: https://review.coreboot.org/c/coreboot/+/52935/comment/8f5fbbd4_60115d39 PS2, Line 382: resource_t > Same as above: mmio_resource() is a wrapper macro for fixed_mem_resource(), which takes arguments of […] Then the fixed_mem_resource is not well designed. For example AMD Trinity has 48 physical address bits, there is no way to hold that much bits in unsigned long (32bit). Additionally CB:52922 is merged which uses resource_t. When basek and sizek is passed to mmio_resource or ram_resource it will be truncated to 32 bits. Yet another mess is the fixed_mem_resource, which casts basek and sizek to resource_t back. So what is the point anyway to use unsigned long arguments if they are cast back to resource_t?? -- To view, visit https://review.coreboot.org/c/coreboot/+/52935 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b1b5f585ff6e0c7aecad250a75600e0c76331e1 Gerrit-Change-Number: 52935 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 09 May 2021 11:36:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC] device: Introduce new method for setting device states
by Angel Pons (Code Review) 09 May '21

09 May '21

Attention is currently required from: Felix Singer, Nico Huber, Raul Rangel, Furquan Shaikh, Matt DeVillier, Michael Niewöhner, Patrick Rudolph, Felix Held. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52493 ) Change subject: [RFC] device: Introduce new method for setting device states ...................................................................... Patch Set 22: (1 comment) File src/soc/intel/skylake/chip.c: https://review.coreboot.org/c/coreboot/+/52493/comment/a5d910f3_a64fe1ed PS13, Line 461: if (!xdci_can_enable()) : params->XdciEnable = 0; > > I would say the name depends on the exact implementation. […] A `hook` is usually a procedure, i.e. a subroutine that does not return anything. For example, the I like `should_enable`. -- To view, visit https://review.coreboot.org/c/coreboot/+/52493 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70fde306c65a8881f565c5f923be20f380ea64d3 Gerrit-Change-Number: 52493 Gerrit-PatchSet: 22 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 09 May 2021 10:21:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC] device: Introduce new method for setting device states
by Felix Singer (Code Review) 09 May '21

09 May '21

Attention is currently required from: Nico Huber, Raul Rangel, Furquan Shaikh, Matt DeVillier, Angel Pons, Michael Niewöhner, Patrick Rudolph, Felix Held. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52493 ) Change subject: [RFC] device: Introduce new method for setting device states ...................................................................... Patch Set 22: (1 comment) File src/soc/intel/skylake/chip.c: https://review.coreboot.org/c/coreboot/+/52493/comment/ddf05d70_d7c3a032 PS13, Line 461: if (!xdci_can_enable()) : params->XdciEnable = 0; > I would say the name depends on the exact implementation. If you decide for a function that is always called to decide the enable state, I'd simply call the pointer `enable`. I wouldn't name this `enable`, because the whole thing is about enabling something and not only this function. We don't need to repeat that in the attibute names. So that would be confusing. It allows hooking up other dependencies, like CMOS options. So why not just ´hook´? -- To view, visit https://review.coreboot.org/c/coreboot/+/52493 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70fde306c65a8881f565c5f923be20f380ea64d3 Gerrit-Change-Number: 52493 Gerrit-PatchSet: 22 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 09 May 2021 09:15:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC] device: Introduce new method for setting device states
by build bot (Jenkins) (Code Review) 09 May '21

09 May '21

Attention is currently required from: Felix Singer, Nico Huber, Raul Rangel, Furquan Shaikh, Matt DeVillier, Michael Niewöhner, Patrick Rudolph, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52493 ) Change subject: [RFC] device: Introduce new method for setting device states ...................................................................... Patch Set 22: (1 comment) File src/device/devenmap.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118823): https://review.coreboot.org/c/coreboot/+/52493/comment/7323d7a7_79e19896 PS22, Line 17: if (devmap[i].hook) { braces {} are not necessary for single statement blocks -- To view, visit https://review.coreboot.org/c/coreboot/+/52493 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70fde306c65a8881f565c5f923be20f380ea64d3 Gerrit-Change-Number: 52493 Gerrit-PatchSet: 22 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 09 May 2021 08:30:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: Generate PCI GPP ACPI names
by Marshall Dawson (Code Review) 09 May '21

09 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52870 ) Change subject: soc/amd/cezanne: Generate PCI GPP ACPI names ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52870 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5134d1dba4fcb9ce8cc4bfad1c619331a95f3b11 Gerrit-Change-Number: 52870 Gerrit-PatchSet: 9 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Comment-Date: Sun, 09 May 2021 02:34:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit May 2021