coreboot-gerrit May 2021

coreboot-gerrit@coreboot.org

1 participants
6048 discussions

Change in coreboot[master]: mb/google/guybrush: Configure wake resource for WiFi
by Karthik Ramasubramanian (Code Review) 11 May '21

11 May '21

Attention is currently required from: Raul Rangel, Furquan Shaikh, Martin Roth, Mathew King. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52908 ) Change subject: mb/google/guybrush: Configure wake resource for WiFi ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/52908/comment/fd7ed953_3bc6fc31 PS1, Line 13: is added to SSDT. > It means that the OSPM is not really setting it correctly. What does `cat /proc/acpi/wakeup` show? cat /proc/acpi/wakeup lists WF00 device > Interesting. It means that the GPE enable bit is somehow not getting set correctly. Do you see the GPE STS bit set correctly in your experiment now? Yes. I also see the concerned bit set in SMI:event_status register in the resume path. -- To view, visit https://review.coreboot.org/c/coreboot/+/52908 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic238d9606aea20c058e9b47093693f10b14e6288 Gerrit-Change-Number: 52908 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mathew King <mathewk(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Mathew King <mathewk(a)chromium.org> Gerrit-Comment-Date: Mon, 10 May 2021 23:58:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/dedede/var/magolor: Select touchscreen based on SSFC in FW_...
by Karthik Ramasubramanian (Code Review) 11 May '21

11 May '21

Attention is currently required from: David Wu, Furquan Shaikh, Henry Sun, Marco Chen. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52851 ) Change subject: mb/google/dedede/var/magolor: Select touchscreen based on SSFC in FW_CONFIG ...................................................................... Patch Set 6: (2 comments) File src/mainboard/google/dedede/variants/magolor/overridetree.cb: https://review.coreboot.org/c/coreboot/+/52851/comment/954795aa_8dbcb96b PS5, Line 2: field CAMERA_WFC 38 40 > I am afraid that the bit usage of SSFC is out of sync with EC side already. […] Different variants have different components and different sources. Hence the scope of SSFC is preferred to be per-variant instead of baseboard. This also means we can keep bit allocations (offset and number of bits) in a per-variant manner. File src/mainboard/google/dedede/variants/magolor/overridetree.cb: https://review.coreboot.org/c/coreboot/+/52851/comment/79a042c3_63491beb PS6, Line 208: 10 Can we not program the touch panel to use a different I2C address to solve this issue? Except for the hardware ID, the entire power sequencing for this 14" panel and ELAN6915 11" panel are identical. The way SSFC is used in this CL is not how it meant to be used. Also we would have already released devices with panel size unprovisioned. This change is going to break the touch panel in those unprovisioned devices. If SSFC still needs to be used, I would prefer to allocate a unique ID for each touchpanel and probe them in the devicetree i.e. fw_config TS_SOURCE 41 44 option TS_UNPROVISIONED 0 option TS_ELAN_6915 1 option TS_ELAN_6918 2 option TS_ELAN_0001 3 option TS_RAYD_0001 4 end -- To view, visit https://review.coreboot.org/c/coreboot/+/52851 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I087ea677a8865fc8c5b3f7c9773bd7f97924dbb3 Gerrit-Change-Number: 52851 Gerrit-PatchSet: 6 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Marco Chen <marcochen(a)google.com> Gerrit-Comment-Date: Mon, 10 May 2021 23:54:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Marco Chen <marcochen(a)google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/intel/adlrvp_m: Enable CR50 TPM support over SPI
by Bora Guvendik (Code Review) 11 May '21

11 May '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Selma Bensaid, Bernardo Perez Priego. Bora Guvendik has uploaded a new patch set (#5) to the change originally created by Thejaswani Putta. ( https://review.coreboot.org/c/coreboot/+/54023 ) Change subject: mb/intel/adlrvp_m: Enable CR50 TPM support over SPI ...................................................................... mb/intel/adlrvp_m: Enable CR50 TPM support over SPI Add Kconfig options and enable TPM device in devicetree BUG=None TEST=Booted the image and checked the successful TPM communication in verstage,romstage & ramstage from coreboot logs. Signed-off-by: Thejaswani Puta thejaswani.putta(a)intel.com <thejaswani.putta(a)intel.com> Change-Id: Icaedf9f17e35e82c35cbabd6d2938c167e42e9e8 --- M src/mainboard/intel/adlrvp/Kconfig M src/mainboard/intel/adlrvp/devicetree_m.cb M src/mainboard/intel/adlrvp/early_gpio_m.c M src/mainboard/intel/adlrvp/gpio_m.c 4 files changed, 46 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/54023/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/54023 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icaedf9f17e35e82c35cbabd6d2938c167e42e9e8 Gerrit-Change-Number: 54023 Gerrit-PatchSet: 5 Gerrit-Owner: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/guybrush: Configure wake resource for WiFi
by Furquan Shaikh (Code Review) 11 May '21

11 May '21

Attention is currently required from: Raul Rangel, Martin Roth, Mathew King, Karthik Ramasubramanian. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52908 ) Change subject: mb/google/guybrush: Configure wake resource for WiFi ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/52908/comment/7c1b8a72_02a507a5 PS1, Line 13: is added to SSDT. > Checked it in the resume path (as part of event log SMI handler and logged in the eventlog). It means that the OSPM is not really setting it correctly. What does `cat /proc/acpi/wakeup` show? > Performed a rogue experiment of setting the bit corresponding to GEVENT_8 in SMI:event_enable register as part of S0ix entry. With that bit set, I was able to wakeup the system using Wake on WLAN disconnect. Interesting. It means that the GPE enable bit is somehow not getting set correctly. Do you see the GPE STS bit set correctly in your experiment now? -- To view, visit https://review.coreboot.org/c/coreboot/+/52908 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic238d9606aea20c058e9b47093693f10b14e6288 Gerrit-Change-Number: 52908 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mathew King <mathewk(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Mathew King <mathewk(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 10 May 2021 23:53:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: [WIP]soc/intel/alderlake: Update meminit code due to upd changes FSP ...
by Furquan Shaikh (Code Review) 11 May '21

11 May '21

Attention is currently required from: Bora Guvendik, Maulik V Vaghela, Selma Bensaid, Tim Wawrzynczak, Patrick Rudolph. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54036 ) Change subject: [WIP]soc/intel/alderlake: Update meminit code due to upd changes FSP 2147 onwards ...................................................................... Patch Set 1: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/54036/comment/9508690c_d07c0d70 PS1, Line 7: WIP Understand that this is still WIP. Provided some early comments. File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/54036/comment/e5983c30_2f6d581d PS1, Line 135: disable_dimm_upds This should be renamed to `disable_channel_upds` and the pointers need update too. https://review.coreboot.org/c/coreboot/+/54036/comment/3f977e96_d0ebcbd8 PS1, Line 164: nit: Instead of disabling all channels individually above, you can use a flag here: bool enable_channel = 0; and do this: if (*spd_ptr) { enable_channel = 1; } and after the `for (dimm = 0...)` loop, you can set: *disable_channel_ptr = !enable_channel; https://review.coreboot.org/c/coreboot/+/54036/comment/ec197a15_7c81041f PS1, Line 168: break; This is wrong. It will not set the SPD pointer for second DIMM in case of DIMM modules where there are multiple DIMMs per channel. -- To view, visit https://review.coreboot.org/c/coreboot/+/54036 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5af11ae99db3bbe3373a9bd4ce36453b58d62fec Gerrit-Change-Number: 54036 Gerrit-PatchSet: 1 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 10 May 2021 23:42:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in gerrit-avatars[master]: Add profile picture for ddaveh
by David Hendricks (Code Review) 11 May '21

11 May '21

David Hendricks has submitted this change. ( https://review.coreboot.org/c/gerrit-avatars/+/54038 ) Change subject: Add profile picture for ddaveh ...................................................................... Add profile picture for ddaveh Change-Id: I2753011a7448048408b6bb38d432389b918f1ddd --- A 1003467.jpg 1 file changed, 0 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified; Looks good to me, approved diff --git a/1003467.jpg b/1003467.jpg new file mode 100644 index 0000000..7b4c5dd --- /dev/null +++ b/1003467.jpg Binary files differ -- To view, visit https://review.coreboot.org/c/gerrit-avatars/+/54038 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: gerrit-avatars Gerrit-Branch: master Gerrit-Change-Id: I2753011a7448048408b6bb38d432389b918f1ddd Gerrit-Change-Number: 54038 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks Gerrit-Reviewer: David Hendricks Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in gerrit-avatars[master]: Add profile picture for ddaveh
by David Hendricks (Code Review) 11 May '21

11 May '21

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/gerrit-avatars/+/54038 ) Change subject: Add profile picture for ddaveh ...................................................................... Add profile picture for ddaveh Change-Id: I2753011a7448048408b6bb38d432389b918f1ddd --- A 1003467.jpg 1 file changed, 0 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/gerrit-avatars refs/changes/38/54038/1 diff --git a/1003467.jpg b/1003467.jpg new file mode 100644 index 0000000..7b4c5dd --- /dev/null +++ b/1003467.jpg Binary files differ -- To view, visit https://review.coreboot.org/c/gerrit-avatars/+/54038 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: gerrit-avatars Gerrit-Branch: master Gerrit-Change-Id: I2753011a7448048408b6bb38d432389b918f1ddd Gerrit-Change-Number: 54038 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: drivers/i2c/cs42l42: Make HS_BIAS_SENSE_EN optional
by Furquan Shaikh (Code Review) 11 May '21

11 May '21

Attention is currently required from: Vitaly Rodionov, Angel Pons, Marco Chen, Karthik Ramasubramanian. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52981 ) Change subject: drivers/i2c/cs42l42: Make HS_BIAS_SENSE_EN optional ...................................................................... Patch Set 5: Code-Review+2 (1 comment) File src/drivers/i2c/cs42l42/chip.h: https://review.coreboot.org/c/coreboot/+/52981/comment/1fde4459_be651af9 PS4, Line 118: Default = > In this case, coreboot will always generate the property, so the kernel default is meaningless. I had made a similar comment on the original CL for this driver. But the author felt it was helpful to have the kernel default in there as well. -- To view, visit https://review.coreboot.org/c/coreboot/+/52981 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87c6f01af1bdb5b1cb8e399191519598d7fbe9ea Gerrit-Change-Number: 52981 Gerrit-PatchSet: 5 Gerrit-Owner: Vitaly Rodionov <vitaly.rodionov(a)cirrus.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-Attention: Vitaly Rodionov <vitaly.rodionov(a)cirrus.corp-partner.google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Marco Chen <marcochen(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 10 May 2021 23:22:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Vitaly Rodionov <vitaly.rodionov(a)cirrus.corp-partner.google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD
by Felix Held (Code Review) 11 May '21

11 May '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/53996 ) Change subject: util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD ...................................................................... util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD Fixes compilation on FreeBSD CURRENT, and possibly other releases. The compiler, clang, complained about: util/cbfstool/cbfstool.c:181:40: error: implicit declaration of function 'memmem' is invalid in C99 [-Werror,-Wimplicit-function-declaration] util/cbfstool/cbfstool.c:181:31: error: incompatible integer to pointer conversion initializing 'struct metadata_hash_anchor *' with an expression of type 'int' [-Werror,-Wint-conversion] Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Change-Id: I45c02a21709160df44fc8da329f6c4a9bad24478 Reviewed-on: https://review.coreboot.org/c/coreboot/+/53996 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M util/cbfstool/Makefile.inc 1 file changed, 4 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/util/cbfstool/Makefile.inc b/util/cbfstool/Makefile.inc index 5b49fe8..47b89e5 100644 --- a/util/cbfstool/Makefile.inc +++ b/util/cbfstool/Makefile.inc @@ -95,7 +95,6 @@ TOOLCFLAGS += -O2 TOOLCPPFLAGS ?= -D_DEFAULT_SOURCE # memccpy() from string.h TOOLCPPFLAGS += -D_BSD_SOURCE -D_SVID_SOURCE # _DEFAULT_SOURCE for older glibc -TOOLCPPFLAGS += -D_XOPEN_SOURCE=700 # strdup() from string.h TOOLCPPFLAGS += -D_GNU_SOURCE # memmem() from string.h TOOLCPPFLAGS += -I$(top)/util/cbfstool/flashmap TOOLCPPFLAGS += -I$(top)/util/cbfstool @@ -113,6 +112,10 @@ TOOLLDFLAGS ?= HOSTCFLAGS += -fms-extensions +ifneq ($(shell uname -o 2>/dev/null), FreeBSD) +TOOLCPPFLAGS += -D_XOPEN_SOURCE=700 # strdup() from string.h +endif + ifeq ($(shell uname -s | cut -c-7 2>/dev/null), MINGW32) TOOLCFLAGS += -mno-ms-bitfields endif -- To view, visit https://review.coreboot.org/c/coreboot/+/53996 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45c02a21709160df44fc8da329f6c4a9bad24478 Gerrit-Change-Number: 53996 Gerrit-PatchSet: 3 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: mb/intel/adlrvp_m: Enable CR50 TPM support over SPI
by Thejaswani Putta (Code Review) 11 May '21

11 May '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Selma Bensaid, Bernardo Perez Priego. Thejaswani Putta has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54023 ) Change subject: mb/intel/adlrvp_m: Enable CR50 TPM support over SPI ...................................................................... Patch Set 4: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/54023/comment/7d1be95a_3cc31977 PS1, Line 14: Coreboot > coreboot logs. Done! Patchset: PS1: > commit message. […] Done! File src/mainboard/intel/adlrvp/Kconfig: https://review.coreboot.org/c/coreboot/+/54023/comment/2553b8f5_bc682ed1 PS1, Line 22: select MAINBOARD_HAS_TPM2 : select MAINBOARD_HAS_SPI_TPM_CR50 : select SPI_TPM : > Are we enabling for ADLRVP_P also? or ADLRVP_M only? We are enabling only for ADLRVP_M. I have updated the required configs in the Kconfig with the condition. -- To view, visit https://review.coreboot.org/c/coreboot/+/54023 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icaedf9f17e35e82c35cbabd6d2938c167e42e9e8 Gerrit-Change-Number: 54023 Gerrit-PatchSet: 4 Gerrit-Owner: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Comment-Date: Mon, 10 May 2021 22:48:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bora Guvendik <bora.guvendik(a)intel.com> Comment-In-Reply-To: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit May 2021