coreboot-gerrit March 2021

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Change in coreboot[master]: vendor: mediatek: Add mediatek mt8192 dram initialization codes
by Xi Chen (Code Review) 02 Mar '21

02 Mar '21

Attention is currently required from: Xi Chen, Hung-Te Lin, Nico Huber, Martin Roth, Yu-Ping Wu. Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, Paul Menzel, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50294 to look at the new patch set (#16). Change subject: vendor: mediatek: Add mediatek mt8192 dram initialization codes ...................................................................... vendor: mediatek: Add mediatek mt8192 dram initialization codes This is the DRAM initialization code from the reference implementation released by Mediatek for MT8192. The DRAM calibration code can be took as an standalone library, used by different boot loaders for initializing DRAM and following a different coding style(coreboot was using Linux Kernel coding style), so we have to put it in vendor code folder. Signed-off-by: Xi Chen <xixi.chen(a)mediatek.com> Change-Id: I3853204578069c6abf52689ea6f5d88841414bd4 --- M MAINTAINERS A src/vendorcode/mediatek/Kconfig A src/vendorcode/mediatek/Makefile.inc A src/vendorcode/mediatek/mt8192/Makefile.inc A src/vendorcode/mediatek/mt8192/dramc/ANA_init_config.c A src/vendorcode/mediatek/mt8192/dramc/DIG_NONSHUF_config.c A src/vendorcode/mediatek/mt8192/dramc/DIG_SHUF_config.c A src/vendorcode/mediatek/mt8192/dramc/DRAMC_SUBSYS_config.c A src/vendorcode/mediatek/mt8192/dramc/DRAM_config_collctioin.c A src/vendorcode/mediatek/mt8192/dramc/Hal_io.c A src/vendorcode/mediatek/mt8192/dramc/LP4_dram_init.c A src/vendorcode/mediatek/mt8192/dramc/Makefile.inc A src/vendorcode/mediatek/mt8192/dramc/dramc_actiming.c A src/vendorcode/mediatek/mt8192/dramc/dramc_dv_freq_related.c A src/vendorcode/mediatek/mt8192/dramc/dramc_dvfs.c A src/vendorcode/mediatek/mt8192/dramc/dramc_lowpower.c A src/vendorcode/mediatek/mt8192/dramc/dramc_pi_basic_api.c A src/vendorcode/mediatek/mt8192/dramc/dramc_pi_calibration_api.c A src/vendorcode/mediatek/mt8192/dramc/dramc_pi_main.c A src/vendorcode/mediatek/mt8192/dramc/dramc_top.c A src/vendorcode/mediatek/mt8192/dramc/dramc_tracking.c A src/vendorcode/mediatek/mt8192/dramc/dramc_utility.c A src/vendorcode/mediatek/mt8192/dramc/emi.c A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DDRPHY_AO.h A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DDRPHY_MD32.h A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DDRPHY_NAO.h A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DRAMC_AO.h A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DRAMC_NAO.h A src/vendorcode/mediatek/mt8192/include/addressmap.h A src/vendorcode/mediatek/mt8192/include/custom_emi.h A src/vendorcode/mediatek/mt8192/include/ddrphy_nao_reg.h A src/vendorcode/mediatek/mt8192/include/ddrphy_pll_reg.h A src/vendorcode/mediatek/mt8192/include/ddrphy_wo_pll_reg.h A src/vendorcode/mediatek/mt8192/include/dramc_actiming.h A src/vendorcode/mediatek/mt8192/include/dramc_ch0_nao_reg.h A src/vendorcode/mediatek/mt8192/include/dramc_ch0_reg.h A src/vendorcode/mediatek/mt8192/include/dramc_common.h A src/vendorcode/mediatek/mt8192/include/dramc_dv_init.h A src/vendorcode/mediatek/mt8192/include/dramc_int_global.h A src/vendorcode/mediatek/mt8192/include/dramc_int_slt.h A src/vendorcode/mediatek/mt8192/include/dramc_pi_api.h A src/vendorcode/mediatek/mt8192/include/dramc_reg_base_addr.h A src/vendorcode/mediatek/mt8192/include/dramc_register.h A src/vendorcode/mediatek/mt8192/include/dramc_top.h A src/vendorcode/mediatek/mt8192/include/dramc_typedefs.h A src/vendorcode/mediatek/mt8192/include/emi.h A src/vendorcode/mediatek/mt8192/include/emi_hw.h A src/vendorcode/mediatek/mt8192/include/emi_mpu_mt.h A src/vendorcode/mediatek/mt8192/include/emi_mpu_v1.h A src/vendorcode/mediatek/mt8192/include/memory.h A src/vendorcode/mediatek/mt8192/include/print.h A src/vendorcode/mediatek/mt8192/include/reg.h A src/vendorcode/mediatek/mt8192/include/sv_c_data_traffic.h A src/vendorcode/mediatek/mt8192/include/x_hal_io.h A src/vendorcode/mediatek/mt8192/lib/Makefile.inc A src/vendorcode/mediatek/mt8192/lib/print.c 56 files changed, 85,609 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/50294/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/50294 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3853204578069c6abf52689ea6f5d88841414bd4 Gerrit-Change-Number: 50294 Gerrit-PatchSet: 16 Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Cindy Ching <cindy.ching(a)mediatek.corp-partner.google.com> Gerrit-CC: Joel Kitching <kitching(a)google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Stefan Reinauer <reinauer(a)chromium.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-CC: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-CC: Yidi Lin <yidi.lin(a)mediatek.corp-partner.google.com> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/mediatek/mt8192: use Mediatek mt8192 vendor code (CB:50294)
by Xi Chen (Code Review) 02 Mar '21

02 Mar '21

Attention is currently required from: Hung-Te Lin, Martin Roth, Paul Menzel. Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51125 to look at the new patch set (#6). Change subject: src/mediatek/mt8192: use Mediatek mt8192 vendor code (CB:50294) ...................................................................... src/mediatek/mt8192: use Mediatek mt8192 vendor code (CB:50294) Mediatek maintains the DRAM initialization code, the coding style is different from coreboot, when CB:50294 is ready, soc/mediatek/mt8192 will not be used. Signed-off-by: Xi Chen <xixi.chen(a)mediatek.com> Change-Id: I2b2f41d774c6b85f106867144fb0b29a4a1bdfcf --- R src/soc/mediatek/common/dpm.c A src/soc/mediatek/common/dram_init.c R src/soc/mediatek/common/dramc_param.c R src/soc/mediatek/common/include/soc/dpm.h R src/soc/mediatek/common/include/soc/dramc_param.h A src/soc/mediatek/common/include/soc/emi.h R src/soc/mediatek/common/memory.c M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc D src/soc/mediatek/mt8192/dramc_ana_init_config.c D src/soc/mediatek/mt8192/dramc_dig_config.c D src/soc/mediatek/mt8192/dramc_dvfs.c D src/soc/mediatek/mt8192/dramc_pi_basic_api.c D src/soc/mediatek/mt8192/dramc_pi_calibration_api.c D src/soc/mediatek/mt8192/dramc_pi_main.c D src/soc/mediatek/mt8192/dramc_power.c D src/soc/mediatek/mt8192/dramc_subsys_config.c D src/soc/mediatek/mt8192/dramc_tracking.c D src/soc/mediatek/mt8192/dramc_utility.c D src/soc/mediatek/mt8192/emi.c D src/soc/mediatek/mt8192/include/soc/dramc_ac_timing.h D src/soc/mediatek/mt8192/include/soc/dramc_common_mt8192.h D src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h D src/soc/mediatek/mt8192/include/soc/dramc_power.h D src/soc/mediatek/mt8192/include/soc/dramc_register.h D src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h A src/soc/mediatek/mt8192/include/soc/dramc_soc.h D src/soc/mediatek/mt8192/include/soc/emi.h M src/vendorcode/Makefile.inc 29 files changed, 174 insertions(+), 19,571 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/51125/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/51125 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b2f41d774c6b85f106867144fb0b29a4a1bdfcf Gerrit-Change-Number: 51125 Gerrit-PatchSet: 6 Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: vendor: mediatek: Add mediatek mt8192 dram initialization codes
by Xi Chen (Code Review) 02 Mar '21

02 Mar '21

Attention is currently required from: Xi Chen, Hung-Te Lin, Nico Huber, Martin Roth, Yu-Ping Wu. Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth, Paul Menzel, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50294 to look at the new patch set (#15). Change subject: vendor: mediatek: Add mediatek mt8192 dram initialization codes ...................................................................... vendor: mediatek: Add mediatek mt8192 dram initialization codes This is the DRAM initialization code from the reference implementation released by Mediatek for MT8192. The DRAM calibration code can be took as an standalone library, used by different boot loaders for initializing DRAM and following a different coding style(coreboot was using Linux Kernel coding style), so we have to put it in vendor code folder. Signed-off-by: Xi Chen <xixi.chen(a)mediatek.com> Change-Id: I3853204578069c6abf52689ea6f5d88841414bd4 --- M MAINTAINERS A src/vendorcode/mediatek/Kconfig A src/vendorcode/mediatek/Makefile.inc A src/vendorcode/mediatek/mt8192/Makefile.inc A src/vendorcode/mediatek/mt8192/dramc/ANA_init_config.c A src/vendorcode/mediatek/mt8192/dramc/DIG_NONSHUF_config.c A src/vendorcode/mediatek/mt8192/dramc/DIG_SHUF_config.c A src/vendorcode/mediatek/mt8192/dramc/DRAMC_SUBSYS_config.c A src/vendorcode/mediatek/mt8192/dramc/DRAM_config_collctioin.c A src/vendorcode/mediatek/mt8192/dramc/Hal_io.c A src/vendorcode/mediatek/mt8192/dramc/LP4_dram_init.c A src/vendorcode/mediatek/mt8192/dramc/Makefile.inc A src/vendorcode/mediatek/mt8192/dramc/dramc_actiming.c A src/vendorcode/mediatek/mt8192/dramc/dramc_dv_freq_related.c A src/vendorcode/mediatek/mt8192/dramc/dramc_dvfs.c A src/vendorcode/mediatek/mt8192/dramc/dramc_lowpower.c A src/vendorcode/mediatek/mt8192/dramc/dramc_pi_basic_api.c A src/vendorcode/mediatek/mt8192/dramc/dramc_pi_calibration_api.c A src/vendorcode/mediatek/mt8192/dramc/dramc_pi_main.c A src/vendorcode/mediatek/mt8192/dramc/dramc_top.c A src/vendorcode/mediatek/mt8192/dramc/dramc_tracking.c A src/vendorcode/mediatek/mt8192/dramc/dramc_utility.c A src/vendorcode/mediatek/mt8192/dramc/emi.c A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DDRPHY_AO.h A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DDRPHY_MD32.h A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DDRPHY_NAO.h A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DRAMC_AO.h A src/vendorcode/mediatek/mt8192/include/Margaux_Register_DRAMC_NAO.h A src/vendorcode/mediatek/mt8192/include/addressmap.h A src/vendorcode/mediatek/mt8192/include/custom_emi.h A src/vendorcode/mediatek/mt8192/include/ddrphy_nao_reg.h A src/vendorcode/mediatek/mt8192/include/ddrphy_pll_reg.h A src/vendorcode/mediatek/mt8192/include/ddrphy_wo_pll_reg.h A src/vendorcode/mediatek/mt8192/include/dramc_actiming.h A src/vendorcode/mediatek/mt8192/include/dramc_ch0_nao_reg.h A src/vendorcode/mediatek/mt8192/include/dramc_ch0_reg.h A src/vendorcode/mediatek/mt8192/include/dramc_common.h A src/vendorcode/mediatek/mt8192/include/dramc_dv_init.h A src/vendorcode/mediatek/mt8192/include/dramc_int_global.h A src/vendorcode/mediatek/mt8192/include/dramc_int_slt.h A src/vendorcode/mediatek/mt8192/include/dramc_pi_api.h A src/vendorcode/mediatek/mt8192/include/dramc_reg_base_addr.h A src/vendorcode/mediatek/mt8192/include/dramc_register.h A src/vendorcode/mediatek/mt8192/include/dramc_top.h A src/vendorcode/mediatek/mt8192/include/dramc_typedefs.h A src/vendorcode/mediatek/mt8192/include/emi.h A src/vendorcode/mediatek/mt8192/include/emi_hw.h A src/vendorcode/mediatek/mt8192/include/emi_mpu_mt.h A src/vendorcode/mediatek/mt8192/include/emi_mpu_v1.h A src/vendorcode/mediatek/mt8192/include/memory.h A src/vendorcode/mediatek/mt8192/include/print.h A src/vendorcode/mediatek/mt8192/include/reg.h A src/vendorcode/mediatek/mt8192/include/sv_c_data_traffic.h A src/vendorcode/mediatek/mt8192/include/x_hal_io.h A src/vendorcode/mediatek/mt8192/lib/Makefile.inc A src/vendorcode/mediatek/mt8192/lib/print.c 56 files changed, 85,617 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/50294/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/50294 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3853204578069c6abf52689ea6f5d88841414bd4 Gerrit-Change-Number: 50294 Gerrit-PatchSet: 15 Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Cindy Ching <cindy.ching(a)mediatek.corp-partner.google.com> Gerrit-CC: Joel Kitching <kitching(a)google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Stefan Reinauer <reinauer(a)chromium.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-CC: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-CC: Yidi Lin <yidi.lin(a)mediatek.corp-partner.google.com> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya: Add DRAM support for Micron MT53E1G32D2NP-046 and MT5...
by Amanda Hwang (Code Review) 02 Mar '21

02 Mar '21

Amanda Hwang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51170 ) Change subject: mb/google/brya: Add DRAM support for Micron MT53E1G32D2NP-046 and MT53E2G32D4NQ-046 ...................................................................... mb/google/brya: Add DRAM support for Micron MT53E1G32D2NP-046 and MT53E2G32D4NQ-046 BUG=b:181378727 TEST=none Change-Id: I413e35cdb7c34388c3e159f8f9584fae2d21a355 Signed-off-by: Amanda Huang <amanda_hwang(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/variants/brya0/memory/Makefile.inc M src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt M src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt 3 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/51170/1 diff --git a/src/mainboard/google/brya/variants/brya0/memory/Makefile.inc b/src/mainboard/google/brya/variants/brya0/memory/Makefile.inc index b8229c4..79605c2 100644 --- a/src/mainboard/google/brya/variants/brya0/memory/Makefile.inc +++ b/src/mainboard/google/brya/variants/brya0/memory/Makefile.inc @@ -3,3 +3,5 @@ SPD_SOURCES = SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:F, H9HCNNNBKMMLXR-NEE +SPD_SOURCES += lp4x-spd-4.hex # ID = 1(0b0001) Parts = MT53E1G32D2NP-046 WT:A +SPD_SOURCES += lp4x-spd-7.hex # ID = 2(0b0010) Parts = MT53E2G32D4NQ-046 WT:A diff --git a/src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt index 45b69ae..d926626 100644 --- a/src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt @@ -1,3 +1,5 @@ DRAM Part Name ID to assign MT53E512M32D2NP-046 WT:F 0 (0000) H9HCNNNBKMMLXR-NEE 0 (0000) +MT53E1G32D2NP-046 WT:A 1 (0001) +MT53E2G32D4NQ-046 WT:A 2 (0010) diff --git a/src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt b/src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt index 5f83732..178c17d 100644 --- a/src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt +++ b/src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt @@ -1,2 +1,4 @@ MT53E512M32D2NP-046 WT:F H9HCNNNBKMMLXR-NEE +MT53E1G32D2NP-046 WT:A +MT53E2G32D4NQ-046 WT:A -- To view, visit https://review.coreboot.org/c/coreboot/+/51170 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I413e35cdb7c34388c3e159f8f9584fae2d21a355 Gerrit-Change-Number: 51170 Gerrit-PatchSet: 1 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: cpu/x86/smm_module_loaderv2: Pass SMM log level via module parameter
by Arthur Heymans (Code Review) 02 Mar '21

02 Mar '21

Attention is currently required from: Marc Jones, Patrick Rudolph, Jonathan Zhang, Johnny Lin, Rocky Phagura, Jingle Hsu, Morgan Jang. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49460 ) Change subject: cpu/x86/smm_module_loaderv2: Pass SMM log level via module parameter ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: https://review.coreboot.org/c/coreboot/+/50764/1 moves things from the stub to the relocatable parameters of the handler. That would be a better solution here too. I think adding an entry to set the console loglevel here would be a good idea (like Marc, says it's not a good idea to redefine the interface) -- To view, visit https://review.coreboot.org/c/coreboot/+/49460 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81722a4f1bf75ec942cc06e403ad702dfe938e71 Gerrit-Change-Number: 49460 Gerrit-PatchSet: 3 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Rocky Phagura <rphagura(a)fb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Rocky Phagura <rphagura(a)fb.com> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Comment-Date: Tue, 02 Mar 2021 08:34:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/storo: Add camera support
by Andy Yeh (Code Review) 02 Mar '21

02 Mar '21

Attention is currently required from: Martin Roth, Henry Sun, zanxi chen, Paul Menzel, Weimin Wu, Andy Yeh, Karthik Ramasubramanian, ShawnX Tu. Andy Yeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50995 ) Change subject: mb/google/dedede/var/storo: Add camera support ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > If a second source is introduced at a later point in time, we need to differentiate identify unprovi […] Hi Karthik, We have requested module vendor to program the module id in EEPROM (KC 0x0001 OV 0x8856) in order to sustain future additional source. So I think we can add the logic to provision EEPROM when add'l module source is requested later, do you think so? -- To view, visit https://review.coreboot.org/c/coreboot/+/50995 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I98d5708d1955406c2e46db972903057bb3d12dcc Gerrit-Change-Number: 50995 Gerrit-PatchSet: 2 Gerrit-Owner: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Andy Yeh <andy.yeh(a)intel.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-Reviewer: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Andy Yeh <andy.yeh(a)intel.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-Comment-Date: Tue, 02 Mar 2021 08:34:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Henry Sun <henrysun(a)google.com> Comment-In-Reply-To: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Comment-In-Reply-To: Andy Yeh <andy.yeh(a)intel.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/generic/max98357a: Use depends HAVE_ACPI_TABLES
by Paul Menzel (Code Review) 02 Mar '21

02 Mar '21

Attention is currently required from: Tim Wawrzynczak, EricR Lai. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51166 ) Change subject: drivers/generic/max98357a: Use depends HAVE_ACPI_TABLES ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/51166 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie6ebfde49f0f3c205e174c5113feb75444dedba8 Gerrit-Change-Number: 51166 Gerrit-PatchSet: 1 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 02 Mar 2021 08:27:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/smm_module_loaderv2: Pass SMM log level via module parameter
by Johnny Lin (Code Review) 02 Mar '21

02 Mar '21

Attention is currently required from: Marc Jones, Patrick Rudolph, Jonathan Zhang, Johnny Lin, Rocky Phagura, Jingle Hsu, Arthur Heymans, Morgan Jang. Hello build bot (Jenkins), Marc Jones, Patrick Rudolph, Jonathan Zhang, Rocky Phagura, Jingle Hsu, Angel Pons, Arthur Heymans, Morgan Jang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/49460 to look at the new patch set (#3). Change subject: cpu/x86/smm_module_loaderv2: Pass SMM log level via module parameter ...................................................................... cpu/x86/smm_module_loaderv2: Pass SMM log level via module parameter When CONSOLE_OVERRIDE_LOGLEVEL is selected, ramstage can pass SMM console log level via module parameter and to be referenced in SMM get_console_loglevel() override function. The purpose is that getting the log level may spend too much time such as searching for the key-value from flash VPD, which is not ideal for SMM. Change-Id: I81722a4f1bf75ec942cc06e403ad702dfe938e71 Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> --- M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/smm/smm_module_loaderv2.c M src/include/console/console.h 3 files changed, 21 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/49460/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/49460 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81722a4f1bf75ec942cc06e403ad702dfe938e71 Gerrit-Change-Number: 49460 Gerrit-PatchSet: 3 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Rocky Phagura <rphagura(a)fb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Rocky Phagura <rphagura(a)fb.com> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede/var/storo: Support LTE module
by Karthik Ramasubramanian (Code Review) 02 Mar '21

02 Mar '21

Attention is currently required from: Martin Roth, zanxi chen, Henry Sun, Paul Menzel, Tao Xia, Weimin Wu. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51017 ) Change subject: mb/google/dedede/var/storo: Support LTE module ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/51017 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9aff9608e08eae00ab5ac8547f63bc83b62fea78 Gerrit-Change-Number: 51017 Gerrit-PatchSet: 5 Gerrit-Owner: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Tue, 02 Mar 2021 08:22:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/storo:Add P-sensor for storo
by Paul Menzel (Code Review) 02 Mar '21

02 Mar '21

Attention is currently required from: Martin Roth, zanxi chen, Henry Sun, Weimin Wu. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51016 ) Change subject: mb/google/dedede/var/storo:Add P-sensor for storo ...................................................................... Patch Set 5: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/51016/comment/be581336_e5edf254 PS2, Line 8: Add P-sensor into devicetree for storo. > Done It seems to be there again. -- To view, visit https://review.coreboot.org/c/coreboot/+/51016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iced4ab7d94b38ef8b1807955cbb887454accb1e8 Gerrit-Change-Number: 51016 Gerrit-PatchSet: 5 Gerrit-Owner: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Tue, 02 Mar 2021 08:22:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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coreboot-gerrit March 2021