coreboot-gerrit February 2021

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Change in coreboot[4.11_branch]: cpu/x86/smm: Add overflow check
by Jay Talbott (Code Review) 11 Feb '21

11 Feb '21

Attention is currently required from: Marc Jones, Nico Huber. Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50311 ) Change subject: cpu/x86/smm: Add overflow check ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/50311 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: 4.11_branch Gerrit-Change-Id: I28e10d8836ab80c6fec9d3414c795c5e6ff312e8 Gerrit-Change-Number: 50311 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Jay Talbott <JayTalbott(a)sysproconsulting.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Fri, 12 Feb 2021 01:57:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[4.11_branch]: cpu/x86/smm: Add smm_size to relocatable smmstub
by Jay Talbott (Code Review) 11 Feb '21

11 Feb '21

Attention is currently required from: Marc Jones, Arthur Heymans. Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50310 ) Change subject: cpu/x86/smm: Add smm_size to relocatable smmstub ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/50310 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: 4.11_branch Gerrit-Change-Id: I4948639a513b196382eb38616fe872b72bb7e59e Gerrit-Change-Number: 50310 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jay Talbott <JayTalbott(a)sysproconsulting.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 12 Feb 2021 01:55:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[4.11_branch]: security/intel/stm: Check for processor STM support
by Jay Talbott (Code Review) 11 Feb '21

11 Feb '21

Attention is currently required from: Marc Jones. Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50309 ) Change subject: security/intel/stm: Check for processor STM support ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/50309 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: 4.11_branch Gerrit-Change-Id: I312570ca28329490006283251f69dd83ef64af40 Gerrit-Change-Number: 50309 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Jay Talbott <JayTalbott(a)sysproconsulting.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Comment-Date: Fri, 12 Feb 2021 01:53:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[4.11_branch]: security/intel/stm: Add STM support
by Jay Talbott (Code Review) 11 Feb '21

11 Feb '21

Attention is currently required from: Marc Jones, Martin Roth. Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50308 ) Change subject: security/intel/stm: Add STM support ...................................................................... Patch Set 1: (2 comments) File configs/config.stm: https://review.coreboot.org/c/coreboot/+/50308/comment/b1dea3aa_71e8b9ea PS1, Line 1: CONFIG_VENDOR_PURISM=y : CONFIG_BOARD_PURISM_LIBREM15_V4=y This seems specific to a particular vendor and mainboard as opposed to generalized STM support. File src/cpu/x86/mp_init.c: https://review.coreboot.org/c/coreboot/+/50308/comment/5f760795_f4cf09e5 PS1, Line 1051: In the future, this will need to handle newer x86 processors : * that require alignment of the save state on 32K boundaries. Do we know for what generation of processors this will be required? -- To view, visit https://review.coreboot.org/c/coreboot/+/50308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: 4.11_branch Gerrit-Change-Id: Ic0131fcada9f43c9817c8a0a942d0419c7023130 Gerrit-Change-Number: 50308 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Jay Talbott <JayTalbott(a)sysproconsulting.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Fri, 12 Feb 2021 01:50:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[4.11_branch]: 3rdparty/intel-microcode: Update to 20200616 release
by Jay Talbott (Code Review) 11 Feb '21

11 Feb '21

Attention is currently required from: Marc Jones. Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50553 ) Change subject: 3rdparty/intel-microcode: Update to 20200616 release ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/50553 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: 4.11_branch Gerrit-Change-Id: Ic010594a59b692b18eb40656c283c080c34c4d2c Gerrit-Change-Number: 50553 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Jay Talbott <JayTalbott(a)sysproconsulting.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Comment-Date: Fri, 12 Feb 2021 01:17:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[4.11_branch]: mainboard/ocp/monolake: Remove ACPI PNP0C0C device
by Jay Talbott (Code Review) 11 Feb '21

11 Feb '21

Attention is currently required from: Marc Jones, Stefan Reinauer. Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50569 ) Change subject: mainboard/ocp/monolake: Remove ACPI PNP0C0C device ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/50569 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: 4.11_branch Gerrit-Change-Id: Idd8c3588694b913b52ca6509332603e3525117b7 Gerrit-Change-Number: 50569 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Jay Talbott <JayTalbott(a)sysproconsulting.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Fri, 12 Feb 2021 01:16:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/ioapic: clear full upper byte when writing ID register
by Marshall Dawson (Code Review) 11 Feb '21

11 Feb '21

Attention is currently required from: Raul Rangel, Nico Huber, Martin Roth, Angel Pons, Arthur Heymans, Kyösti Mälkki, Felix Held. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50574 ) Change subject: arch/x86/ioapic: clear full upper byte when writing ID register ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/50574/comment/191a0a67_a2168eca PS1, Line 15: bit's nit, no apostrophe Patchset: PS1: I don't see a problem with the extra nibble though. -- To view, visit https://review.coreboot.org/c/coreboot/+/50574 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id730ed0abbe69d4679ec07910230cae1881c6c9a Gerrit-Change-Number: 50574 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 12 Feb 2021 00:55:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: vc/amd/fsp/picasso: increase FSPS UPD block size from 0x152 to 0x202
by Nikolai Vyssotski (Code Review) 11 Feb '21

11 Feb '21

Attention is currently required from: Jason Glenesk, Paul Menzel. Hello Jason Glenesk, build bot (Jenkins), Raul Rangel, Marshall Dawson, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50552 to look at the new patch set (#4). Change subject: vc/amd/fsp/picasso: increase FSPS UPD block size from 0x152 to 0x202 ...................................................................... vc/amd/fsp/picasso: increase FSPS UPD block size from 0x152 to 0x202 We will need more FSPS UPD space for PEI GOP changes coming. BUG=b:171234996 BRANCH=Zork Cq-Depend: chrome-internal:3609213, chromium:50576 Change-Id: I35d0bb0ee30e04f66882b6103acd9d673d040c07 Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> --- M src/vendorcode/amd/fsp/picasso/FspsUpd.h 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/50552/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/50552 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I35d0bb0ee30e04f66882b6103acd9d673d040c07 Gerrit-Change-Number: 50552 Gerrit-PatchSet: 4 Gerrit-Owner: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/*/Kconfig: remove redundant SMM_TSEG condition
by Felix Held (Code Review) 11 Feb '21

11 Feb '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50498 ) Change subject: soc/amd/*/Kconfig: remove redundant SMM_TSEG condition ...................................................................... soc/amd/*/Kconfig: remove redundant SMM_TSEG condition Since SMM is in TSEG on the platforms which is the default, drop the SMM_TSEG condition for the default of SMM_TSEG_SIZE. Change-Id: I7bd965c0794efa12ea4886a55522cc5193a1d3ac Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50498 Reviewed-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/amd/cezanne/Kconfig M src/soc/amd/picasso/Kconfig M src/soc/amd/stoneyridge/Kconfig 3 files changed, 3 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index cfdf6ff..cc2fd9f 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -160,7 +160,7 @@ config SMM_TSEG_SIZE hex - default 0x800000 if SMM_TSEG && HAVE_SMI_HANDLER + default 0x800000 if HAVE_SMI_HANDLER default 0x0 config SMM_RESERVED_SIZE diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index f504d09..2a71681 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -274,7 +274,7 @@ config SMM_TSEG_SIZE hex - default 0x800000 if SMM_TSEG && HAVE_SMI_HANDLER + default 0x800000 if HAVE_SMI_HANDLER default 0x0 config SMM_RESERVED_SIZE diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 728e063..a1b109e 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -258,7 +258,7 @@ config SMM_TSEG_SIZE hex - default 0x800000 if SMM_TSEG && HAVE_SMI_HANDLER + default 0x800000 if HAVE_SMI_HANDLER default 0x0 config SMM_RESERVED_SIZE -- To view, visit https://review.coreboot.org/c/coreboot/+/50498 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7bd965c0794efa12ea4886a55522cc5193a1d3ac Gerrit-Change-Number: 50498 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

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Change in coreboot[master]: vc/amd/fsp/picasso: increase FSPS UPD block size from 0x152 to 0x202
by Nikolai Vyssotski (Code Review) 11 Feb '21

11 Feb '21

Attention is currently required from: Paul Menzel. Nikolai Vyssotski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50552 ) Change subject: vc/amd/fsp/picasso: increase FSPS UPD block size from 0x152 to 0x202 ...................................................................... Patch Set 3: (1 comment) This change is ready for review. Commit Message: https://review.coreboot.org/c/coreboot/+/50552/comment/221eda25_85de85ee PS2, Line 7: vc/amd/fsp/picasso: increase FSPS UPD block size > Please add the concrete size increase to the commit message. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/50552 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I35d0bb0ee30e04f66882b6103acd9d673d040c07 Gerrit-Change-Number: 50552 Gerrit-PatchSet: 3 Gerrit-Owner: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 12 Feb 2021 00:37:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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coreboot-gerrit February 2021