coreboot-gerrit December 2021

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Change in coreboot[master]: soc/intel/cannonlake/acpi: Replace Multiply(a,b) with ASL 2.0 syntax
by Felix Singer (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: Patrick Rudolph. Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60565 ) Change subject: soc/intel/cannonlake/acpi: Replace Multiply(a,b) with ASL 2.0 syntax ...................................................................... soc/intel/cannonlake/acpi: Replace Multiply(a,b) with ASL 2.0 syntax Replace `Multiply (a, b)` with `a * b`. Change-Id: I6dc9f57773754e89df4b4ffd088a4693af0452e3 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/soc/intel/cannonlake/acpi/gpio.asl M src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/60565/1 diff --git a/src/soc/intel/cannonlake/acpi/gpio.asl b/src/soc/intel/cannonlake/acpi/gpio.asl index 3249954..265bcfb 100644 --- a/src/soc/intel/cannonlake/acpi/gpio.asl +++ b/src/soc/intel/cannonlake/acpi/gpio.asl @@ -92,7 +92,7 @@ } Store (PCRB (Local0), Local2) Local2 += PAD_CFG_BASE - Return (Local2 + Multiply (Local1, 16)) + Return (Local2 + Local1 * 16) } /* diff --git a/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl b/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl index 9122e65..f60fd56 100644 --- a/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl +++ b/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl @@ -92,5 +92,5 @@ } Store (PCRB (Local0), Local2) Local2 += PAD_CFG_BASE - Return (Local2 + Multiply (Local1, 16)) + Return (Local2 + Local1 * 16) } -- To view, visit https://review.coreboot.org/c/coreboot/+/60565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6dc9f57773754e89df4b4ffd088a4693af0452e3 Gerrit-Change-Number: 60565 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/intel/gma/acpi: Replace Multiply(a,b) with ASL 2.0 syntax
by Felix Singer (Code Review) 31 Dec '21

31 Dec '21

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60564 ) Change subject: drivers/intel/gma/acpi: Replace Multiply(a,b) with ASL 2.0 syntax ...................................................................... drivers/intel/gma/acpi: Replace Multiply(a,b) with ASL 2.0 syntax Replace `Multiply (a, b)` with `a * b`. Change-Id: Idd77fa995e1edab86c509a88a1ba16d636c60b30 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/drivers/intel/gma/acpi/configure_brightness_levels.asl 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/60564/1 diff --git a/src/drivers/intel/gma/acpi/configure_brightness_levels.asl b/src/drivers/intel/gma/acpi/configure_brightness_levels.asl index c168d63..564f182 100644 --- a/src/drivers/intel/gma/acpi/configure_brightness_levels.asl +++ b/src/drivers/intel/gma/acpi/configure_brightness_levels.asl @@ -53,7 +53,7 @@ /* Always keep BCLP up to date, even if driver is not ready. It requires a full 8-bit brightness value. 255 = 100% */ - Store (Divide (Multiply (Arg0, 255), 100), Local1) + Store (Divide (Arg0 * 255, 100), Local1) If (LGreater(Local1, 255)) { Store (255, Local1) } @@ -105,7 +105,7 @@ Method (XBCM, 1, NotSerialized) { - Store (DRCL (Multiply (Arg0, BCLM), 100), BCLV) + Store (DRCL (Arg0 * BCLM, 100), BCLV) } /* Find value closest to BCLV in BRIG (which must be ordered) */ @@ -117,7 +117,7 @@ Return (Zero) } /* Local0: current percentage */ - Store (DRCL (Multiply (BCLV, 100), BCLM), Local0) + Store (DRCL (BCLV * 100, BCLM), Local0) /* Local1: loop index (selectable values start at 2 in BRIG) */ Store (2, Local1) -- To view, visit https://review.coreboot.org/c/coreboot/+/60564 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idd77fa995e1edab86c509a88a1ba16d636c60b30 Gerrit-Change-Number: 60564 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek: Add PCIe support
by Arthur Heymans (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: Shelley Chen, Hung-Te Lin, Furquan Shaikh, Angel Pons, Yu-Ping Wu, Jianjun Wang. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56791 ) Change subject: soc/mediatek: Add PCIe support ...................................................................... Patch Set 9: (2 comments) File src/soc/mediatek/common/pcie.c: https://review.coreboot.org/c/coreboot/+/56791/comment/c142268b_48994d95 PS2, Line 329: mtk_pcie_gen3_probe > Sorry for the late response, the device_operations has been used by soc_ops, can we still add this pci_domain_ops? Do you have a domain in the devicetree? You can set the soc & pci_domain_ops like this: static void enable_soc_dev(struct device *dev) { /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_DOMAIN) dev->ops = &pci_domain_ops; else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) dev->ops = &soc_ops; } File src/soc/mediatek/common/pcie.c: https://review.coreboot.org/c/coreboot/+/56791/comment/36075047_e41ffe5e PS9, Line 108: pcie_ctrl->base + PCIE_CFG_OFFSET_ADDR; : } void pointer aritmetic is undefined behavior is C. -- To view, visit https://review.coreboot.org/c/coreboot/+/56791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 Gerrit-Change-Number: 56791 Gerrit-PatchSet: 9 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Fri, 31 Dec 2021 11:08:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/block: Add small crashlog helper library
by Subrata Banik (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: Furquan Shaikh, Francois Toguo Fotso, Tim Wawrzynczak, Nick Vaccaro, Karthik Ramasubramanian. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57785 ) Change subject: soc/intel/block: Add small crashlog helper library ...................................................................... Patch Set 3: (8 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/57785/comment/02908934_106404db PS3, Line 7: soc/intel/block: Add small crashlog helper library how about ? soc/intel/block/crashlog: Add helper functions for telemetry dvsec File src/soc/intel/common/block/crashlog/crashlog_lib.h: https://review.coreboot.org/c/coreboot/+/57785/comment/d9f48d3f_3e651eb3 PS3, Line 13: DVSEC_VSEC0_OFFSET TELEM_VSEC_0 to make it more relevant with while reviewing EDS Also, https://review.coreboot.org/c/coreboot/+/57785/3/src/soc/intel/common/block… you have actually followed EDS, so better we maintain the parity between offset and bit definitions. WDYT? https://review.coreboot.org/c/coreboot/+/57785/comment/39026c88_6413a252 PS3, Line 16: 0x04 > Curious why this is 0x04 v/s 0x4 for DVSEC_VSEC0_OFFSET? Is it because the other field is 8-bit and […] I could see the same in FSP reference code https://chrome-internal.googlesource.com/chromeos/third_party/intel-fsp/adl… and https://chrome-internal.googlesource.com/chromeos/third_party/intel-fsp/adl… so, you are right. https://review.coreboot.org/c/coreboot/+/57785/comment/862b8b12_2d302622 PS3, Line 97: discovery_type > Is this discovery_type or is this dvsec_id? As per EDS, its same, one is bit field name and another macro name. I guess Tim maintain bit fields name across hence its okay to say "discovery_type". https://review.coreboot.org/c/coreboot/+/57785/comment/44e5c969_3446e5ed PS3, Line 118: crashlog_read64 any reason for implementing 64-bit read ? https://review.coreboot.org/c/coreboot/+/57785/comment/7d5dc344_c5c317c4 PS3, Line 132: offset src? https://review.coreboot.org/c/coreboot/+/57785/3/src/soc/intel/common/block… File src/soc/intel/common/block/crashlog/crashlog_lib.c: https://review.coreboot.org/c/coreboot/+/57785/comment/7f373de6_36a260c9 PS3, Line 4: #include "crashlog_lib.h" > nit - local "" includes should follow system <> includes ordering-wise, with blank line between the […] echo to what Nick said. Example: fast_spi_def.h inside common code fast_spi module. https://review.coreboot.org/c/coreboot/+/57785/comment/7c02a296_7e9fc992 PS3, Line 10: dest care to check NULL pointer for `dest` ? -- To view, visit https://review.coreboot.org/c/coreboot/+/57785 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6c48d2e35d621b1cc3bb7931c666ae15a0d2fe7e Gerrit-Change-Number: 57785 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 31 Dec 2021 10:59:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Enable PCIe support for mt8195
by Arthur Heymans (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yu-Ping Wu, Jianjun Wang. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56793 ) Change subject: soc/mediatek: Enable PCIe support for mt8195 ...................................................................... Patch Set 11: (1 comment) File src/soc/mediatek/mt8195/Makefile.inc: https://review.coreboot.org/c/coreboot/+/56793/comment/13ed8e45_fdfec988 PS11, Line 73: pcie.c Move to previous CL. It was not clear in which stage the code ought to be used. -- To view, visit https://review.coreboot.org/c/coreboot/+/56793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I314572955f1021abe9f2f0f4635670135ed08fff Gerrit-Change-Number: 56793 Gerrit-PatchSet: 11 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Fri, 31 Dec 2021 10:53:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/{brask,gimble}: Use eNEM for CAR by default
by Subrata Banik (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: David Wu, Paul Menzel, Tim Wawrzynczak, Nick Vaccaro, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60377 ) Change subject: mb/google/brya/{brask,gimble}: Use eNEM for CAR by default ...................................................................... Patch Set 8: (1 comment) Patchset: PS4: > @Felix/Angel: Ping! if you are available for review. […] Thanks Felix -- To view, visit https://review.coreboot.org/c/coreboot/+/60377 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie5734606e58410545a5f5421837080680664707f Gerrit-Change-Number: 60377 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: David Wu <david_wu(a)quantatw.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Wu <david_wu(a)quantatw.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Fri, 31 Dec 2021 10:36:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/{brask,gimble}: Use eNEM for CAR by default
by Subrata Banik (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: David Wu, Paul Menzel, Tim Wawrzynczak, Nick Vaccaro, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60377 ) Change subject: mb/google/brya/{brask,gimble}: Use eNEM for CAR by default ...................................................................... Patch Set 8: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60377/comment/afa4b68c_a3d994d3 PS7, Line 10: default hence > default. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/60377 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie5734606e58410545a5f5421837080680664707f Gerrit-Change-Number: 60377 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: David Wu <david_wu(a)quantatw.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Wu <david_wu(a)quantatw.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Fri, 31 Dec 2021 10:36:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/{brask,gimble}: Use eNEM for CAR by default
by Subrata Banik (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: David Wu, Subrata Banik, Paul Menzel, Tim Wawrzynczak, Nick Vaccaro, EricR Lai. Hello Felix Singer, build bot (Jenkins), David Wu, Tim Wawrzynczak, Angel Pons, Nick Vaccaro, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60377 to look at the new patch set (#8). Change subject: mb/google/brya/{brask,gimble}: Use eNEM for CAR by default ...................................................................... mb/google/brya/{brask,gimble}: Use eNEM for CAR by default More Brya variants like Brask and Gimble have migrated to use Alder Lake QS SoC which enables eNEM feature by default. Hence, select eNEM for CAR by default for these variants. BUG=b:168820083 TEST=Able to build and boot gimble variant using eNEM mode. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: Ie5734606e58410545a5f5421837080680664707f --- M src/mainboard/google/brya/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/60377/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/60377 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie5734606e58410545a5f5421837080680664707f Gerrit-Change-Number: 60377 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: David Wu <david_wu(a)quantatw.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Wu <david_wu(a)quantatw.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/{brask,gimble}: Use eNEM for CAR by default
by Felix Singer (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: David Wu, Subrata Banik, Paul Menzel, Tim Wawrzynczak, Nick Vaccaro, EricR Lai. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60377 ) Change subject: mb/google/brya/{brask,gimble}: Use eNEM for CAR by default ...................................................................... Patch Set 7: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60377/comment/8fcd2043_64ed5a4a PS7, Line 10: default hence default. Hence, -- To view, visit https://review.coreboot.org/c/coreboot/+/60377 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie5734606e58410545a5f5421837080680664707f Gerrit-Change-Number: 60377 Gerrit-PatchSet: 7 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: David Wu <david_wu(a)quantatw.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Wu <david_wu(a)quantatw.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Fri, 31 Dec 2021 10:33:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Remove unused <string.h>
by HAOUAS Elyes (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: Xi Chen, Hung-Te Lin, Paul Menzel. HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60559 ) Change subject: soc/mediatek: Remove unused <string.h> ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60559/comment/218d8c20_40a64e2a PS1, Line 7: REmove > Remove Done Patchset: PS3: Thx -- To view, visit https://review.coreboot.org/c/coreboot/+/60559 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8f88541dce457e978a2cbea036d4f6eae387963f Gerrit-Change-Number: 60559 Gerrit-PatchSet: 3 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 31 Dec 2021 10:29:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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2013

coreboot-gerrit December 2021