coreboot-gerrit December 2021

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Change in coreboot[master]: ec/smsc/mec1308/acpi: Replace Increment() with ASL 2.0 syntax
by Felix Singer (Code Review) 31 Dec '21

31 Dec '21

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60582 ) Change subject: ec/smsc/mec1308/acpi: Replace Increment() with ASL 2.0 syntax ...................................................................... ec/smsc/mec1308/acpi: Replace Increment() with ASL 2.0 syntax Replace `Increment(a)` with `a++`. Change-Id: Ib2154767cfc547ca9bd0a23937d50689be13fbcf Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/ec/smsc/mec1308/acpi/battery.asl M src/ec/smsc/mec1308/acpi/ec.asl 2 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/60582/1 diff --git a/src/ec/smsc/mec1308/acpi/battery.asl b/src/ec/smsc/mec1308/acpi/battery.asl index 2aa5ace..59d6c4f 100644 --- a/src/ec/smsc/mec1308/acpi/battery.asl +++ b/src/ec/smsc/mec1308/acpi/battery.asl @@ -135,7 +135,7 @@ Store (SWAB (BTPR), Local1) If (LNotEqual (Local1, 0xFFFFFFFF) && LGreaterEqual (Local1, 0x8000)) { Xor (Local1, 0xFFFF, Local1) - Increment (Local1) + Local1++ } Store (Local1, PBST[1]) @@ -145,7 +145,7 @@ Store (SWAB (BTRA), Local1) If (LNotEqual (Local1, 0xFFFFFFFF) && LGreaterEqual (Local1, 0x8000)) { Xor (Local1, 0xFFFF, Local1) - Increment (Local1) + Local1++ } If (BFWK && ACEX && LNot (Local0)) { diff --git a/src/ec/smsc/mec1308/acpi/ec.asl b/src/ec/smsc/mec1308/acpi/ec.asl index c7b180d..23b4c69 100644 --- a/src/ec/smsc/mec1308/acpi/ec.asl +++ b/src/ec/smsc/mec1308/acpi/ec.asl @@ -69,7 +69,7 @@ // Force a read of CPU temperature Store (CPUT, Local0) /* So that we don't get a warning that Local0 is unused. */ - Increment (Local0) + Local0++ } PowerResource (FNP0, 0, 0) -- To view, visit https://review.coreboot.org/c/coreboot/+/60582 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib2154767cfc547ca9bd0a23937d50689be13fbcf Gerrit-Change-Number: 60582 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/apollolake/acpi: Replace Increment() with ASL 2.0 syntax
by Felix Singer (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: Andrey Petrov, Patrick Rudolph. Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60581 ) Change subject: soc/intel/apollolake/acpi: Replace Increment() with ASL 2.0 syntax ...................................................................... soc/intel/apollolake/acpi: Replace Increment() with ASL 2.0 syntax Replace `Increment(a)` with `a++`. Change-Id: I40d5df41e2e077cb9d3e7f3945f0dbae18382a28 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/soc/intel/apollolake/acpi/pcie_port.asl 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/60581/1 diff --git a/src/soc/intel/apollolake/acpi/pcie_port.asl b/src/soc/intel/apollolake/acpi/pcie_port.asl index 710051b..34e2a73 100644 --- a/src/soc/intel/apollolake/acpi/pcie_port.asl +++ b/src/soc/intel/apollolake/acpi/pcie_port.asl @@ -75,7 +75,7 @@ Break } Sleep (16) - Increment (Local0) + Local0++ } } /* End PDS condition check */ } @@ -95,7 +95,7 @@ Break } Sleep (16) - Increment (Local0) + Local0++ } Store (1, BDQA) /* Set BLKDQDA to 1 */ Store (1, BPLL) /* Set BLKPLLEN to 1 */ -- To view, visit https://review.coreboot.org/c/coreboot/+/60581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I40d5df41e2e077cb9d3e7f3945f0dbae18382a28 Gerrit-Change-Number: 60581 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/intel/gma/acpi: Replace Increment() with ASL 2.0 syntax
by Felix Singer (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: Patrick Rudolph. Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60580 ) Change subject: drivers/intel/gma/acpi: Replace Increment() with ASL 2.0 syntax ...................................................................... drivers/intel/gma/acpi: Replace Increment() with ASL 2.0 syntax Replace `Increment(a)` with `a++`. Change-Id: If0c11f43713bf7afec6dd600289776eefd1331e8 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/drivers/intel/gma/acpi/common.asl M src/drivers/intel/gma/acpi/configure_brightness_levels.asl 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/60580/1 diff --git a/src/drivers/intel/gma/acpi/common.asl b/src/drivers/intel/gma/acpi/common.asl index 02169ae..0cf28fa 100644 --- a/src/drivers/intel/gma/acpi/common.asl +++ b/src/drivers/intel/gma/acpi/common.asl @@ -58,7 +58,7 @@ Store (BRID (XBQC ()), Local0) If (LNotEqual (Local0, SizeOf(BRIG) - 1)) { - Increment (Local0) + Local0++ } XBCM (DerefOf (BRIG[Local0])) } diff --git a/src/drivers/intel/gma/acpi/configure_brightness_levels.asl b/src/drivers/intel/gma/acpi/configure_brightness_levels.asl index f0e6c31..99d2bc5 100644 --- a/src/drivers/intel/gma/acpi/configure_brightness_levels.asl +++ b/src/drivers/intel/gma/acpi/configure_brightness_levels.asl @@ -134,7 +134,7 @@ } } - Increment (Local1) + Local1++ } /* Didn't find greater/equal value: use the last */ -- To view, visit https://review.coreboot.org/c/coreboot/+/60580 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If0c11f43713bf7afec6dd600289776eefd1331e8 Gerrit-Change-Number: 60580 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: arch/x86/acpi: Replace Increment() with ASL 2.0 syntax
by Felix Singer (Code Review) 31 Dec '21

31 Dec '21

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60579 ) Change subject: arch/x86/acpi: Replace Increment() with ASL 2.0 syntax ...................................................................... arch/x86/acpi: Replace Increment() with ASL 2.0 syntax Replace `Increment(a)` with `a++`. Change-Id: I45ce13509f3e93d7d8cd69689604f24b926bcfbc Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/arch/x86/acpi/debug.asl M src/arch/x86/acpi/globutil.asl 2 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/60579/1 diff --git a/src/arch/x86/acpi/debug.asl b/src/arch/x86/acpi/debug.asl index fd071f8..60f1595 100644 --- a/src/arch/x86/acpi/debug.asl +++ b/src/arch/x86/acpi/debug.asl @@ -153,7 +153,7 @@ return (0) } OUTC(Local0) - Increment(Local1) + Local1++ } } return (0) diff --git a/src/arch/x86/acpi/globutil.asl b/src/arch/x86/acpi/globutil.asl index 3a7144d..e47b7f2 100644 --- a/src/arch/x86/acpi/globutil.asl +++ b/src/arch/x86/acpi/globutil.asl @@ -50,7 +50,7 @@ Return(Ones) } } - Increment(Local4) + Local4++ } if (LLess(Local4, Local5)) { Return(One) @@ -82,7 +82,7 @@ Derefof(Local1[Local2]))) { Return(0) } - Increment(Local2) + Local2++ } Return(One) } -- To view, visit https://review.coreboot.org/c/coreboot/+/60579 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45ce13509f3e93d7d8cd69689604f24b926bcfbc Gerrit-Change-Number: 60579 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek: Add PCIe support
by Nico Huber (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: Arthur Heymans, Shelley Chen, Hung-Te Lin, Furquan Shaikh, Yu-Ping Wu, Jianjun Wang. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56791 ) Change subject: soc/mediatek: Add PCIe support ...................................................................... Patch Set 9: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56791/comment/45a23d00_46b6176d PS9, Line 12: - MT8195 Register Map V0.3-2, Chapter 3.18 PCIe controller (Page 1250) Is this publicly available? If not, (how) can one obtain it? Patchset: PS9: IMHO this patch does too much at once for review. PCIe is organized in layers and this change seems to try to cover all at once. Some parts are Mediatek specific, others are just PCI standard (like the resource allocation). It would be nice to split at least all the standard things into a separate patch (if there is anything left that is not already covered by common coreboot code). File src/soc/mediatek/common/Kconfig: https://review.coreboot.org/c/coreboot/+/56791/comment/4c91d22b_abc07c5b PS9, Line 46: bool "Enable MediaTek PCIe support" Should this have a prompt? I guess at least the board code should know if there is PCIe and select it? If that's the case, you could enable NO_ECAM_MMCONF_SUPPORT conditionally for the SOC_MEDIATEK_COMMON config above: config SOC_MEDIATEK_COMMON bool select NO_ECAM_MMCONF_SUPPORT if PCI Then the SoC/board Kconfig would only have to select PCI. File src/soc/mediatek/common/pcie.c: https://review.coreboot.org/c/coreboot/+/56791/comment/a9f27a9e_65c1e408 PS2, Line 329: mtk_pcie_gen3_probe > > Sorry for the late response, the device_operations has been used by soc_ops, can we still add this […] For the IO windows, you have to implement your own version of pci_domain_read_resources(). Beside mtk_pcie_startup_port() which looks vendor specific, these IO windows are the only non-standard thing I've spotted. Maybe setting the domain ops should be done per SoC, i.e. in the follow-up change? -- To view, visit https://review.coreboot.org/c/coreboot/+/56791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 Gerrit-Change-Number: 56791 Gerrit-PatchSet: 9 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Fri, 31 Dec 2021 13:00:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Add PCIe support
by Angel Pons (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: Shelley Chen, Hung-Te Lin, Furquan Shaikh, Yu-Ping Wu, Jianjun Wang. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56791 ) Change subject: soc/mediatek: Add PCIe support ...................................................................... Patch Set 9: (6 comments) File src/soc/mediatek/common/include/soc/pcie_common.h: https://review.coreboot.org/c/coreboot/+/56791/comment/a57c12cc_ac6e70e5 PS9, Line 6: #include <device/device.h> Please add: #include <types.h> File src/soc/mediatek/common/pcie.c: https://review.coreboot.org/c/coreboot/+/56791/comment/c7175f66_80c49ff6 PS9, Line 37: val please add parentheses around macro parameters https://review.coreboot.org/c/coreboot/+/56791/comment/5309f2a8_28a9ac77 PS9, Line 69: remove space after `*` unary operator https://review.coreboot.org/c/coreboot/+/56791/comment/0357fdb5_3e30bf54 PS9, Line 69: static const char * const ltssm_str[] = { Is this Mediatek-specific? https://review.coreboot.org/c/coreboot/+/56791/comment/c4d365d1_fcfacc8b PS9, Line 103: devfn = (dev >> 12) & 0xf; : val = PCIE_CFG_HEADER((dev >> 20) & 0xf, devfn); This seems unnecessarily complex. Looks like this is equivalent: val = (dev >> 12) & 0x0f0f; I don't know where the 0xf masks come from. Maybe it's because the register fields are only 4 bits wide, but I don't have any datasheets to check. https://review.coreboot.org/c/coreboot/+/56791/comment/26e0fd6f_ac87fdae PS9, Line 218: 0x100000 What is this magic number? -- To view, visit https://review.coreboot.org/c/coreboot/+/56791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 Gerrit-Change-Number: 56791 Gerrit-PatchSet: 9 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Fri, 31 Dec 2021 12:50:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/aopen/dxplplusu/acpi: Replace LOr() with ASL 2.0 syntax
by Felix Singer (Code Review) 31 Dec '21

31 Dec '21

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60578 ) Change subject: mb/aopen/dxplplusu/acpi: Replace LOr() with ASL 2.0 syntax ...................................................................... mb/aopen/dxplplusu/acpi: Replace LOr() with ASL 2.0 syntax Replace `LOr (a, b)` with `a || b`. Change-Id: Ib563f8ce5873e53c94992d81e78118a1194fc9af Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/aopen/dxplplusu/acpi/superio.asl 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/60578/1 diff --git a/src/mainboard/aopen/dxplplusu/acpi/superio.asl b/src/mainboard/aopen/dxplplusu/acpi/superio.asl index 9889032..d3ae867 100644 --- a/src/mainboard/aopen/dxplplusu/acpi/superio.asl +++ b/src/mainboard/aopen/dxplplusu/acpi/superio.asl @@ -144,7 +144,7 @@ Store (0x00, LED1) } - If (LOr (LEqual (Arg0, 0x01), LEqual (Arg0, 0x02))) + If (LEqual (Arg0, 0x01) || LEqual (Arg0, 0x02)) { Store (0x01, LED1) } @@ -154,7 +154,7 @@ Store (0x02, LED1) } - If (LOr (LEqual (Arg0, 0x04), LEqual (Arg0, 0x05))) + If (LEqual (Arg0, 0x04) || LEqual (Arg0, 0x05)) { Store (0x03, LED1) } -- To view, visit https://review.coreboot.org/c/coreboot/+/60578 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib563f8ce5873e53c94992d81e78118a1194fc9af Gerrit-Change-Number: 60578 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/jecht: Replace LOr() with ASL 2.0 syntax
by Felix Singer (Code Review) 31 Dec '21

31 Dec '21

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60577 ) Change subject: mb/google/jecht: Replace LOr() with ASL 2.0 syntax ...................................................................... mb/google/jecht: Replace LOr() with ASL 2.0 syntax Replace `LOr (a, b)` with `a || b`. Change-Id: Ib34e8af6668e3c875fabd1fa84862109afa94d18 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/google/jecht/variants/guado/include/variant/acpi/thermal.asl M src/mainboard/google/jecht/variants/jecht/include/variant/acpi/thermal.asl M src/mainboard/google/jecht/variants/rikku/include/variant/acpi/thermal.asl M src/mainboard/google/jecht/variants/tidus/include/variant/acpi/thermal.asl 4 files changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/60577/1 diff --git a/src/mainboard/google/jecht/variants/guado/include/variant/acpi/thermal.asl b/src/mainboard/google/jecht/variants/guado/include/variant/acpi/thermal.asl index e156306..c04b37e 100644 --- a/src/mainboard/google/jecht/variants/guado/include/variant/acpi/thermal.asl +++ b/src/mainboard/google/jecht/variants/guado/include/variant/acpi/thermal.asl @@ -69,7 +69,7 @@ } // Check for invalid readings - If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) { + If (LEqual (Local0, 255) || LEqual (Local0, 0)) { Return (CTOK (FAN0_THRESHOLD_ON)) } diff --git a/src/mainboard/google/jecht/variants/jecht/include/variant/acpi/thermal.asl b/src/mainboard/google/jecht/variants/jecht/include/variant/acpi/thermal.asl index e156306..c04b37e 100644 --- a/src/mainboard/google/jecht/variants/jecht/include/variant/acpi/thermal.asl +++ b/src/mainboard/google/jecht/variants/jecht/include/variant/acpi/thermal.asl @@ -69,7 +69,7 @@ } // Check for invalid readings - If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) { + If (LEqual (Local0, 255) || LEqual (Local0, 0)) { Return (CTOK (FAN0_THRESHOLD_ON)) } diff --git a/src/mainboard/google/jecht/variants/rikku/include/variant/acpi/thermal.asl b/src/mainboard/google/jecht/variants/rikku/include/variant/acpi/thermal.asl index e156306..c04b37e 100644 --- a/src/mainboard/google/jecht/variants/rikku/include/variant/acpi/thermal.asl +++ b/src/mainboard/google/jecht/variants/rikku/include/variant/acpi/thermal.asl @@ -69,7 +69,7 @@ } // Check for invalid readings - If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) { + If (LEqual (Local0, 255) || LEqual (Local0, 0)) { Return (CTOK (FAN0_THRESHOLD_ON)) } diff --git a/src/mainboard/google/jecht/variants/tidus/include/variant/acpi/thermal.asl b/src/mainboard/google/jecht/variants/tidus/include/variant/acpi/thermal.asl index 050e2d5..5fe7a18 100644 --- a/src/mainboard/google/jecht/variants/tidus/include/variant/acpi/thermal.asl +++ b/src/mainboard/google/jecht/variants/tidus/include/variant/acpi/thermal.asl @@ -112,7 +112,7 @@ } // Check for invalid readings - If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) { + If (LEqual (Local0, 255) || LEqual (Local0, 0)) { Store (THERMAL_POLICY_0_THRESHOLD_ON, Local0) } @@ -177,7 +177,7 @@ } // Check for invalid readings - If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) { + If (LEqual (Local0, 255) || LEqual (Local0, 0)) { Return (CTOK (FAN0_0_THRESHOLD_ON)) } -- To view, visit https://review.coreboot.org/c/coreboot/+/60577 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib34e8af6668e3c875fabd1fa84862109afa94d18 Gerrit-Change-Number: 60577 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/intel/gma/acpi: Replace LOr() with ASL 2.0 syntax
by Felix Singer (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: Patrick Rudolph. Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60576 ) Change subject: drivers/intel/gma/acpi: Replace LOr() with ASL 2.0 syntax ...................................................................... drivers/intel/gma/acpi: Replace LOr() with ASL 2.0 syntax Replace `LOr (a, b)` with `a || b`. Change-Id: I26f785c2f959539141e70053ae38aac16d3b9185 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/drivers/intel/gma/acpi/configure_brightness_levels.asl 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/60576/1 diff --git a/src/drivers/intel/gma/acpi/configure_brightness_levels.asl b/src/drivers/intel/gma/acpi/configure_brightness_levels.asl index e273b22..f0e6c31 100644 --- a/src/drivers/intel/gma/acpi/configure_brightness_levels.asl +++ b/src/drivers/intel/gma/acpi/configure_brightness_levels.asl @@ -127,7 +127,7 @@ Store (DeRefOf (BRIG[Local1 + 1]), Local3) If (LLess (Local0, Local3)) { - If (LOr (LLess (Local0, Local2), LLess (Local0 - Local2, Local3 - Local0))) { + If (LLess (Local0, Local2) || LLess (Local0 - Local2, Local3 - Local0)) { Return (Local2) } Else { Return (Local3) -- To view, visit https://review.coreboot.org/c/coreboot/+/60576 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I26f785c2f959539141e70053ae38aac16d3b9185 Gerrit-Change-Number: 60576 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: superio/winbond/w83627hf/acpi: Replace LOr() with ASL 2.0 syntax
by Felix Singer (Code Review) 31 Dec '21

31 Dec '21

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60575 ) Change subject: superio/winbond/w83627hf/acpi: Replace LOr() with ASL 2.0 syntax ...................................................................... superio/winbond/w83627hf/acpi: Replace LOr() with ASL 2.0 syntax Replace `LOr (a, b)` with `a || b`. Change-Id: I96cd391f1bdeea0c7e0c4a71c225a3e6925b4c6b Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/superio/winbond/w83627hf/acpi/superio.asl 1 file changed, 13 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/60575/1 diff --git a/src/superio/winbond/w83627hf/acpi/superio.asl b/src/superio/winbond/w83627hf/acpi/superio.asl index f53872e..326b717 100644 --- a/src/superio/winbond/w83627hf/acpi/superio.asl +++ b/src/superio/winbond/w83627hf/acpi/superio.asl @@ -204,7 +204,7 @@ If (ACTR) { Store (0x0F, Local0) } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { Store (0x0D, Local0) } @@ -428,7 +428,7 @@ Store (0x0D, Local0) } } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { Store (0x0D, Local0) } @@ -605,7 +605,7 @@ If (ACTR) { Store (0x0F, Local0) } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { Store (0x0D, Local0) } @@ -729,7 +729,7 @@ If (ACTR) { Store (0x0F, Local0) } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { Store (0x0D, Local0) } @@ -854,7 +854,7 @@ If (ACTR) { Store (0x0F, Local0) } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { Store (0x0D, Local0) } @@ -978,7 +978,7 @@ If (ACTR) { Store (0x0F, Local0) } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { Store (0x0D, Local0) } @@ -1064,7 +1064,7 @@ If (ACTR) { Store (0x0F, Local0) } - ElseIf (Lor(LOr (IO1H, IO1L), LOr (IO2H, IO2L))) + ElseIf (IO1H || IO1L || IO2H || IO2L) { #ifdef W83627HF_KBC_COMPAT Store (0x0F, Local0) @@ -1169,7 +1169,7 @@ If (ACTR && IRQ1) { Store (0x0F, Local0) } - ElseIf (Lor(LOr (IO1H, IO1L), LOr (IO2H, IO2L))) + ElseIf (IO1H || IO1L || IO2H || IO2L) { #ifdef W83627HF_KBC_COMPAT Store (0x0F, Local0) @@ -1244,8 +1244,8 @@ Method (_STA) { Store(0, Local0) ENTER_CONFIG_MODE (7) - If (LOr(IO1L, IO1H)) { - If (LOr(ACTR, ACT1)) { + If (IO1L || IO1H) { + If (ACTR || ACT1) { Store (0x0F, Local0) } Else { @@ -1299,8 +1299,8 @@ { Store(0, Local0) ENTER_CONFIG_MODE (7) - If (LOr(IO2L, IO2H)) { - If (LOr(ACTR, ACT2)) { + If (IO2L || IO2H) { + If (ACTR || ACT2) { Store (0x0F, Local0) } Else { @@ -1377,7 +1377,7 @@ If (ACTR) { Store (0x0F, Local0) } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { Store (0x0D, Local0) } -- To view, visit https://review.coreboot.org/c/coreboot/+/60575 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96cd391f1bdeea0c7e0c4a71c225a3e6925b4c6b Gerrit-Change-Number: 60575 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

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coreboot-gerrit December 2021