coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: payload/external/iPXE/Makefile: Clean up the repo before checking out
by Michał Żygowski (Code Review) 09 Dec '21

09 Dec '21

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60007 ) Change subject: payload/external/iPXE/Makefile: Clean up the repo before checking out ...................................................................... payload/external/iPXE/Makefile: Clean up the repo before checking out The iPXE file src/config/general.h is being modified when built for the first time due to various options like HAS_SCRIPT,PXE_NO_PROMPT or PXE_HAS_HTTPS. This leaves the repo in an unclean state and when rebuilt git yields an error when checking out the master branch: error: Your local changes to the following files would be overwritten by checkout: src/config/general.h Please commit your changes or stash them before you switch branches. Aborting fatal: A branch named 'coreboot' already exists. Avoid the error by checking out the changed file. TEST=Build coreboot apu2 with iPXE, then change an arbitrary configuration option to trigger rebuild of payloads. iPXE is rebuild without issues. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: If3cfbb4c74c6397b00463087aeac58efb2777bbe --- M payloads/external/iPXE/Makefile 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/60007/1 diff --git a/payloads/external/iPXE/Makefile b/payloads/external/iPXE/Makefile index 3e12f61..373ae12 100644 --- a/payloads/external/iPXE/Makefile +++ b/payloads/external/iPXE/Makefile @@ -28,6 +28,7 @@ checkout: fetch echo " Checking out $(project_name) revision $(TAG-y)" cd $(project_dir); \ + git checkout -- src/config/general.h; \ git checkout master; \ git branch -D coreboot 2>/dev/null; \ git checkout -b coreboot $(TAG-y) -- To view, visit https://review.coreboot.org/c/coreboot/+/60007 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If3cfbb4c74c6397b00463087aeac58efb2777bbe Gerrit-Change-Number: 60007 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/corsola: Pass reset gpio parameter to BL31
by Hung-Te Lin (Code Review) 09 Dec '21

09 Dec '21

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59824 ) Change subject: mb/google/corsola: Pass reset gpio parameter to BL31 ...................................................................... mb/google/corsola: Pass reset gpio parameter to BL31 To support gpio reset SoC, we need to pass the reset gpio parameter to BL31. TEST=build pass BUG=b:202871018 Cq-Depend: chromium:3188686 Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I48d8d004ea92e950d0040a11133c57c121b86af3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59824 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M src/mainboard/google/corsola/mainboard.c 1 file changed, 18 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved diff --git a/src/mainboard/google/corsola/mainboard.c b/src/mainboard/google/corsola/mainboard.c index d3d55a2..fa4aa18 100644 --- a/src/mainboard/google/corsola/mainboard.c +++ b/src/mainboard/google/corsola/mainboard.c @@ -1,11 +1,27 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <bl31.h> #include <console/console.h> #include <device/device.h> #include <soc/msdc.h> #include <soc/spm.h> #include <soc/usb.h> +#include "gpio.h" + +#include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h> + +static void register_reset_to_bl31(void) +{ + static struct bl_aux_param_gpio param_reset = { + .h = { .type = BL_AUX_PARAM_MTK_RESET_GPIO }, + .gpio = { .polarity = ARM_TF_GPIO_LEVEL_HIGH }, + }; + + param_reset.gpio.index = GPIO_RESET.id; + register_bl31_aux_param(&param_reset.h); +} + static void mainboard_init(struct device *dev) { mtk_msdc_configure_emmc(true); @@ -19,6 +35,8 @@ if (spm_init()) printk(BIOS_ERR, "spm init failed, system suspend may not work\n"); + + register_reset_to_bl31(); } static void mainboard_enable(struct device *dev) 5 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/59824 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I48d8d004ea92e950d0040a11133c57c121b86af3 Gerrit-Change-Number: 59824 Gerrit-PatchSet: 10 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/mediatek/mt8186: Enable ARM Trusted Firmware integration
by Hung-Te Lin (Code Review) 09 Dec '21

09 Dec '21

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59823 ) Change subject: soc/mediatek/mt8186: Enable ARM Trusted Firmware integration ...................................................................... soc/mediatek/mt8186: Enable ARM Trusted Firmware integration Enable configuration to build with MT8186 arm-trusted-firmware drivers. TEST=build pass BUG=b:202871018 Cq-Depend: chromium:3189573 Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: Ib23b112a0bf3d056b932a87b86aaff79508ef50c Reviewed-on: https://review.coreboot.org/c/coreboot/+/59823 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M src/soc/mediatek/mt8186/Kconfig M src/soc/mediatek/mt8186/Makefile.inc 2 files changed, 3 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Yu-Ping Wu: Looks good to me, approved diff --git a/src/soc/mediatek/mt8186/Kconfig b/src/soc/mediatek/mt8186/Kconfig index ce915e2..5393baa 100644 --- a/src/soc/mediatek/mt8186/Kconfig +++ b/src/soc/mediatek/mt8186/Kconfig @@ -5,6 +5,7 @@ select ARCH_VERSTAGE_ARMV8_64 select ARCH_ROMSTAGE_ARMV8_64 select ARCH_RAMSTAGE_ARMV8_64 + select ARM64_USE_ARM_TRUSTED_FIRMWARE select HAVE_UART_SPECIAL select SOC_MEDIATEK_COMMON diff --git a/src/soc/mediatek/mt8186/Makefile.inc b/src/soc/mediatek/mt8186/Makefile.inc index fbde650..7a2f997 100644 --- a/src/soc/mediatek/mt8186/Makefile.inc +++ b/src/soc/mediatek/mt8186/Makefile.inc @@ -58,6 +58,8 @@ ramstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6366.c ramstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c +BL31_MAKEARGS += PLAT=mt8186 + CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include CPPFLAGS_common += -Isrc/soc/mediatek/common/include 5 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/59823 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib23b112a0bf3d056b932a87b86aaff79508ef50c Gerrit-Change-Number: 59823 Gerrit-PatchSet: 10 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/corsola: correct NOR flash configuration in GPIO set
by Hung-Te Lin (Code Review) 09 Dec '21

09 Dec '21

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59945 ) Change subject: mb/google/corsola: correct NOR flash configuration in GPIO set ...................................................................... mb/google/corsola: correct NOR flash configuration in GPIO set The reference design has changed to use GPIO SET1 for NOR flash. There are no devices already built using SET0 so we can safely change the implementation without conditional configs. Reference document: kingler_mt8186_mt6366_lpddr4x_e.pdf, page 11. crab_proto 0_2021112.pdf, page 11. BUG=b:202871018 TEST=flash verify pass on kingler on bootblock stage Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I031686ccddcf789f3fa966d113ee48949e454b8f Reviewed-on: https://review.coreboot.org/c/coreboot/+/59945 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> --- M src/mainboard/google/corsola/bootblock.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Yu-Ping Wu: Looks good to me, approved diff --git a/src/mainboard/google/corsola/bootblock.c b/src/mainboard/google/corsola/bootblock.c index ea36fed..0b03d04 100644 --- a/src/mainboard/google/corsola/bootblock.c +++ b/src/mainboard/google/corsola/bootblock.c @@ -10,7 +10,7 @@ { mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0); mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz, 0); - mtk_snfc_init(SPI_NOR_GPIO_SET0); + mtk_snfc_init(SPI_NOR_GPIO_SET1); setup_chromeos_gpios(); gpio_eint_configure(GPIO_GSC_AP_INT, IRQ_TYPE_EDGE_RISING); } -- To view, visit https://review.coreboot.org/c/coreboot/+/59945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I031686ccddcf789f3fa966d113ee48949e454b8f Gerrit-Change-Number: 59945 Gerrit-PatchSet: 9 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/alderlake:[TEST] Enable PMC trace
by Paul Menzel (Code Review) 09 Dec '21

09 Dec '21

Attention is currently required from: Abhijeet Rao, Sonam Sanju, Sridhar Siricilla, Deepti Deshatty. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60000 ) Change subject: soc/intel/alderlake:[TEST] Enable PMC trace ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60000/comment/6ecddcf4_2f9d53fa PS1, Line 9: production : systems Why not? https://review.coreboot.org/c/coreboot/+/60000/comment/99759172_afbe1f98 PS1, Line 9: It shouldn't be enabled on production : systems Please add a dot/period at the end of sentences. -- To view, visit https://review.coreboot.org/c/coreboot/+/60000 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id4d5189683202dd5e31ad21deb5c1cbc4581c478 Gerrit-Change-Number: 60000 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Abhijeet Rao <abhijeet.rao(a)intel.corp-partner.google.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Sonam Sanju <sonam.sanju(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Abhijeet Rao <abhijeet.rao(a)intel.corp-partner.google.com> Gerrit-Attention: Sonam Sanju <sonam.sanju(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Comment-Date: Thu, 09 Dec 2021 11:54:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: setup open-drain ChromeOS pins
by Hung-Te Lin (Code Review) 09 Dec '21

09 Dec '21

Attention is currently required from: Rex-BC Chen, Yu-Ping Wu. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60002 ) Change subject: mb/google/corsola: setup open-drain ChromeOS pins ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60002/comment/4d2728ca_18a7febf PS2, Line 10: GPIO_SAR_INT_ODL/GPIO_BT_WAKE_AP_ODL/GPIO_WIFI_INT_ODL : GPIO_DPBRDG_INT_ODL/GPIO_EDPBRDG_INT_ODL/GPIO_EC_AP_HPD_OD : GPIO_TCHPAD_INT_ODL/GPIO_TCHSCR_INT_1V8_ODL/GPIO_EC_AP_INT_ODL : GPIO_EC_IN_RW_ODL/GPIO_GSC_AP_INT_ODL/GPIO_AP_WP_ODL : GPIO_HP_INT_ODL/GPIO_PEN_EJECT_OD/GPIO_UCAM_DET_ODL I think you don't need to list all the GPIOs (already in the code); instead you can describe what's fixed after you configured all these GPIOs correctly (for example TPM?). -- To view, visit https://review.coreboot.org/c/coreboot/+/60002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib55a773bb63404a1b952f7e7645eb7aba6638b00 Gerrit-Change-Number: 60002 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 09 Dec 2021 11:54:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/lint/checkpatch: Reduce commit message line length limit to 72
by Paul Menzel (Code Review) 09 Dec '21

09 Dec '21

Paul Menzel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60006 ) Change subject: util/lint/checkpatch: Reduce commit message line length limit to 72 ...................................................................... util/lint/checkpatch: Reduce commit message line length limit to 72 Gerrit Web interface and commit hooks operate with 72 characters per line [1]: remote: commit 35bb56d: warning: too many message lines longer than 72 characters; manually wrap lines remote: remote: SUCCESS remote: remote: https://review.coreboot.org/c/coreboot/+/60004 [DO NOT SUBMIT] Gerrit commit msg line length test [NEW] The Linux project checks for 75 characters per line. Update it to our requirements. [1]: https://review.coreboot.org/60004 Change-Id: Ic9c686cb1a902259b18377b76b5c999e94660fed Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> --- M util/lint/checkpatch.pl 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/60006/1 diff --git a/util/lint/checkpatch.pl b/util/lint/checkpatch.pl index f1c31c5..41aae93 100755 --- a/util/lint/checkpatch.pl +++ b/util/lint/checkpatch.pl @@ -2655,9 +2655,9 @@ $commit_log_possible_stack_dump = 1; } -# Check for line lengths > 75 in commit log, warn once +# Check for line lengths > 72 in commit log, warn once if ($in_commit_log && !$commit_log_long_line && - length($line) > 75 && + length($line) > 72 && !($line =~ /^\s*[a-zA-Z0-9_\/\.]+\s+\|\s+\d+/ || # file delta changes $line =~ /^\s*(?:[\w\.\-]+\/)++[\w\.\-]+:/ || @@ -2666,7 +2666,7 @@ # A Fixes: or Link: line $commit_log_possible_stack_dump)) { WARN("COMMIT_LOG_LONG_LINE", - "Possible unwrapped commit description (prefer a maximum 75 chars per line)\n" . $herecurr); + "Possible unwrapped commit description (prefer a maximum 72 chars per line)\n" . $herecurr); $commit_log_long_line = 1; } -- To view, visit https://review.coreboot.org/c/coreboot/+/60006 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic9c686cb1a902259b18377b76b5c999e94660fed Gerrit-Change-Number: 60006 Gerrit-PatchSet: 1 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: amd/hda: Remove the weak function
by Bao Zheng (Code Review) 09 Dec '21

09 Dec '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58772 to look at the new patch set (#12). Change subject: amd/hda: Remove the weak function ...................................................................... amd/hda: Remove the weak function BUG=b:140165023 Change-Id: I4b089b9fe4742b29686198f20fc7c1a2dae6f015 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/common/block/hda/Kconfig M src/soc/amd/common/block/hda/hda.c M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/northbridge.c 4 files changed, 12 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/58772/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/58772 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b089b9fe4742b29686198f20fc7c1a2dae6f015 Gerrit-Change-Number: 58772 Gerrit-PatchSet: 12 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush/var/dewatt: Add Synaptics touchpad
by Kenneth Chan (Code Review) 09 Dec '21

09 Dec '21

Attention is currently required from: Paul Menzel, Ren Kuo, Rob Barnes. Kenneth Chan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59974 ) Change subject: mb/google/guybrush/var/dewatt: Add Synaptics touchpad ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59974/comment/8bcbb753_917c0ce7 PS3, Line 10: > Please mention the datasheet name and version. Synaptics product spec TM-03733-002 , please refer to https://partnerissuetracker.corp.google.com/issues/208182457 #4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59974 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id3e0636dd0ce5b80c2044c1dfca20ca7eac87fc9 Gerrit-Change-Number: 59974 Gerrit-PatchSet: 3 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Comment-Date: Thu, 09 Dec 2021 11:48:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/redrix4es: sync change from redrix (CB:59731)
by Paul Menzel (Code Review) 09 Dec '21

09 Dec '21

Attention is currently required from: YH Lin, Nick Vaccaro. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59987 ) Change subject: mb/google/redrix4es: sync change from redrix (CB:59731) ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59987/comment/a8b64757_c813af5e PS2, Line 7: (CB:59731) Remove https://review.coreboot.org/c/coreboot/+/59987/comment/b058a2a4_072f4aff PS2, Line 9: CB:59731 Please (also) use the git commit hash and summary, as that is what git operates with. -- To view, visit https://review.coreboot.org/c/coreboot/+/59987 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ac90c249273bf4e75cccb5889844a7f196f56fc Gerrit-Change-Number: 59987 Gerrit-PatchSet: 2 Gerrit-Owner: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 09 Dec 2021 11:48:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit December 2021