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Change subject: amdfwtool: Add support for AMD's BIOS recovery feature
......................................................................
Patch Set 46:
(1 comment)
File util/amdfwtool/amdfwtool.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-135556):
https://review.coreboot.org/c/coreboot/+/57131/comment/52667436_29fcd5ab
PS46, Line 1892: btl_entry = search_entry(pspdir2, AMD_FW_PSP_BOOTLOADER);
line over 96 characters
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Change subject: amdfwtool: Add ISH header support for A/B recovery layout
......................................................................
Patch Set 37:
(1 comment)
File util/amdfwtool/amdfwtool.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-135554):
https://review.coreboot.org/c/coreboot/+/57747/comment/8f198a0c_94ca0302
PS37, Line 696: pspdir->entries[count].addr = BUFF_TO_RUN_MODE(*ctx, ish, ADDRESS_MODE_1_REL_BIOS);
line over 96 characters
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Hello build bot (Jenkins), Jason Glenesk, Martin Roth, Marshall Dawson, Zheng Bao, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/57747
to look at the new patch set (#37).
Change subject: amdfwtool: Add ISH header support for A/B recovery layout
......................................................................
amdfwtool: Add ISH header support for A/B recovery layout
The rom layout for A/B recovery with ISH:
EFS -> PSP L1 0x48 -> ISH A -> PSP L2 A -> BIOS L2 A
0x4A -> ISH B -> PSP L2 B -> BIOS L2 B
Change-Id: Ib0690cde1dce949514c7aacebe13096b7814ceff
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/Makefile
M util/amdfwtool/Makefile.inc
M util/amdfwtool/amdfwtool.c
M util/amdfwtool/amdfwtool.h
4 files changed, 64 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/57747/37
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56773
to look at the new patch set (#45).
Change subject: amdfwtool: Add support for AMD's BIOS A/B recovery feature
......................................................................
amdfwtool: Add support for AMD's BIOS A/B recovery feature
The rom layout for A/B recovery:
EFS -> PSP L1 0x48 -> PSP L2 A -> BIOS L2 A
0x4A -> PSP L2 B -> BIOS L2 B
The coreboot doesn't implement the AMD's A/B recovery. This is only
for the ROM layout. To save some flash space, the entire B section can
be eliminated.
To enable A/B recovery in PSP layout, add "--recovery-ab" to
amdfwtool.
TEST=Majolica(Cezanne)
Change-Id: I27f5d3476f648fcecafb8d258ccb6cfad4f50036
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/amdfwtool.c
M util/amdfwtool/amdfwtool.h
M util/amdfwtool/data_parse.c
3 files changed, 204 insertions(+), 66 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/56773/45
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I'd like you to reexamine a change. Please visit
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Change subject: amdfwtool: Upgrade "relative address" to four address modes
......................................................................
amdfwtool: Upgrade "relative address" to four address modes
Address Mode 0: Physical Address, bit 63~56: 0x00
Address Mode 1: Relative Address to entire BIOS image, bit 63~56: 0x40
Address Mode 2: Relative Address to PSP/BIOS directory, bit 63~56: 0x80
Address Mode 3: Relative Address to slot N, bit 63~56: 0xC0
It is the expanding mode for simple relative address mode, for which
address_mode equals 1.
Only mode 2 is added. We need to record current table base address and
calculate the offset. The ctx.current_table is zero outside the
table. When it goes into the function to integrate the table, it
should backup the old value and get current table base. Before it goes
out the function, it should restore the value.
If the table address mode is 2, the address in each entry should be
also add address mode information. If not, the address mode in entry
is meanless.
The old mode 0,1 should be back compatible.
Change-Id: I29a03f4381cd0507e2b2e3b359111e3375a73de1
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/amdfwtool.c
M util/amdfwtool/amdfwtool.h
2 files changed, 99 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/59308/12
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60078 )
Change subject: Update vboot submodule to upstream master
......................................................................
Patch Set 2: Code-Review+2
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Zhuohao Lee has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60129 )
Change subject: libpayload/i8042: Use 'INFO' instead of 'ERROR' when probing failed
......................................................................
libpayload/i8042: Use 'INFO' instead of 'ERROR' when probing failed
The probe should output the 'INFO' instead of 'ERROR' when
the i8042 module can't be probed. For the x86 device, which
enables the PC_I8042 by default, the 'ERROR' message will be
outputted if the device doesn't connect to an i8042 keyboard controller.
This is an unexpected error when doing the autotest.
BUG=b:207077409
TEST=`test_that f:.*power_Resume/control` pass
Change-Id: I2880c854b873a2a00aa0d8b1cbb4f86fa8139255
Signed-off-by: Zhuohao Lee <zhuohao(a)chromium.org>
---
M payloads/libpayload/drivers/i8042/i8042.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/60129/1
diff --git a/payloads/libpayload/drivers/i8042/i8042.c b/payloads/libpayload/drivers/i8042/i8042.c
index a89b9d9..052f9e8 100644
--- a/payloads/libpayload/drivers/i8042/i8042.c
+++ b/payloads/libpayload/drivers/i8042/i8042.c
@@ -211,7 +211,7 @@
/* If 0x64 returns 0xff, then we have no keyboard
* controller */
if (read_status() == 0xFF) {
- printf("ERROR: No keyboard controller found!\n");
+ printf("INFO: No keyboard controller found!\n");
return 0;
}
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Change subject: amdfwtool: Add support for AMD's BIOS recovery feature
......................................................................
Patch Set 45: Verified+1
(1 comment)
File util/amdfwtool/amdfwtool.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-135544):
https://review.coreboot.org/c/coreboot/+/57131/comment/c30a9605_3ea06b66
PS45, Line 1888: btl_entry = search_entry(pspdir2, AMD_FW_PSP_BOOTLOADER);
line over 96 characters
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