coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: libpayload: Enable vboot integration
by Jakub Czapiga (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Jakub Czapiga, Jan Dabros, Yu-Ping Wu. Hello build bot (Jenkins), Julius Werner, Jan Dabros, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60080 to look at the new patch set (#3). Change subject: libpayload: Enable vboot integration ...................................................................... libpayload: Enable vboot integration This patch introduces building and linking of 3rdparty/vboot with libpayload. VBoot configuration can be set using CONFIG_LP_VBOOT and other entries from VBoot Kconfig menu. Change-Id: I2d9d766a461edaa0081041c020ecf580fd2ca64e Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> --- M payloads/libpayload/Kconfig M payloads/libpayload/Makefile M payloads/libpayload/Makefile.inc A payloads/libpayload/vboot/Kconfig A payloads/libpayload/vboot/Makefile.inc 5 files changed, 84 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/60080/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/60080 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d9d766a461edaa0081041c020ecf580fd2ca64e Gerrit-Change-Number: 60080 Gerrit-PatchSet: 3 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jan Dabros <jsd(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Jan Dabros <jsd(a)semihalf.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: libpayload/libc/fmap: Implement new FlashMap API
by Jakub Czapiga (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Jakub Czapiga. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59494 to look at the new patch set (#7). Change subject: libpayload/libc/fmap: Implement new FlashMap API ...................................................................... libpayload/libc/fmap: Implement new FlashMap API This patch introduces new FlashMap API, the fmap_locate_area(). It works on cached FlashMap provided in lib_sysinfo.fmap_cache. Change-Id: Idbf9016ce73aa58e17f3ee19920ab83dc6c25abb Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> --- A payloads/libpayload/include/fmap.h D payloads/libpayload/include/fmap_serialized.h M payloads/libpayload/include/libpayload.h M payloads/libpayload/libc/fmap.c A payloads/libpayload/tests/libc/Makefile.inc A payloads/libpayload/tests/libc/fmap_locate_area-test.c 6 files changed, 184 insertions(+), 76 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/59494/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/59494 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idbf9016ce73aa58e17f3ee19920ab83dc6c25abb Gerrit-Change-Number: 59494 Gerrit-PatchSet: 7 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Patrick Georgi <patrick(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/glados: Move selects from Kconfig.name to Kconfig
by Felix Singer (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Tim Wawrzynczak. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60060 ) Change subject: mb/google/glados: Move selects from Kconfig.name to Kconfig ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > Is there a treewide switch to Kconfig / Kconfig.name? Nothing was "decided" anywhere, if you mean that, but TBH I would like to. I reworked the Kconfigs of the Intel mainboards and people seemed to like the result. So I started another patch series for two Google boards as "proposal" to get your opinion on that. -- To view, visit https://review.coreboot.org/c/coreboot/+/60060 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifccf2b3521d84f6a678872bbccf9bf390c25ce37 Gerrit-Change-Number: 60060 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Wed, 15 Dec 2021 12:57:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/denverton_ns: Fix MRC_RW_CACHE
by Kyösti Mälkki (Code Review) 15 Dec '21

15 Dec '21

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60091 ) Change subject: soc/intel/denverton_ns: Fix MRC_RW_CACHE ...................................................................... soc/intel/denverton_ns: Fix MRC_RW_CACHE It is required to set WPD (Write Protect Disable) bit to make it possible to use MRC_RW_CACHE region with CACHE_MRC_SETTINGS=y. Change-Id: Iacab44b00d08c9bdc18bc3bdcb88833634c0b02e Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60091 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/denverton_ns/bootblock/bootblock.c 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/soc/intel/denverton_ns/bootblock/bootblock.c b/src/soc/intel/denverton_ns/bootblock/bootblock.c index cb2503a..0846c8e 100644 --- a/src/soc/intel/denverton_ns/bootblock/bootblock.c +++ b/src/soc/intel/denverton_ns/bootblock/bootblock.c @@ -84,6 +84,7 @@ #if (CONFIG(CONSOLE_SERIAL)) early_uart_init(); #endif + fast_spi_early_init(DEFAULT_SPI_BASE); }; void bootblock_soc_init(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/60091 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iacab44b00d08c9bdc18bc3bdcb88833634c0b02e Gerrit-Change-Number: 60091 Gerrit-PatchSet: 4 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/denverton_ns: Use common SMBus support code
by Kyösti Mälkki (Code Review) 15 Dec '21

15 Dec '21

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59469 ) Change subject: soc/intel/denverton_ns: Use common SMBus support code ...................................................................... soc/intel/denverton_ns: Use common SMBus support code Change-Id: I233d198b894f10fbf0042a5023ae8a9c14136513 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59469 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/common/block/smbus/smbus.c M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/include/soc/pci_devs.h M src/soc/intel/denverton_ns/include/soc/smbus.h 4 files changed, 6 insertions(+), 23 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c index 4a46143..d0eb9ce 100644 --- a/src/soc/intel/common/block/smbus/smbus.c +++ b/src/soc/intel/common/block/smbus/smbus.c @@ -91,6 +91,7 @@ PCI_DEVICE_ID_INTEL_ADP_P_SMBUS, PCI_DEVICE_ID_INTEL_ADP_S_SMBUS, PCI_DEVICE_ID_INTEL_ADP_M_SMBUS, + PCI_DEVICE_ID_INTEL_DENVERTON_SMBUS_LEGACY, 0 }; diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 0643384..09c1408 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -34,6 +34,8 @@ select SOC_INTEL_COMMON_BLOCK_FAST_SPI select SOC_INTEL_COMMON_BLOCK_GPIO select SOC_INTEL_COMMON_BLOCK_PCR + select SOC_INTEL_COMMON_BLOCK_SMBUS + select SOUTHBRIDGE_INTEL_COMMON_SMBUS select TSC_MONOTONIC_TIMER select TSC_SYNC_MFENCE select UDELAY_TSC diff --git a/src/soc/intel/denverton_ns/include/soc/pci_devs.h b/src/soc/intel/denverton_ns/include/soc/pci_devs.h index 0cb4c98..9fa38e4 100644 --- a/src/soc/intel/denverton_ns/include/soc/pci_devs.h +++ b/src/soc/intel/denverton_ns/include/soc/pci_devs.h @@ -139,9 +139,11 @@ #define PCH_DEV_SLOT_LPC 0x1f #define PCH_DEVFN_LPC _PCH_DEVFN(LPC, 0) #define PCH_DEVFN_PMC _PCH_DEVFN(LPC, 2) +#define PCH_DEVFN_SMBUS _PCH_DEVFN(LPC, 4) #define PCH_DEVFN_SPI _PCH_DEVFN(LPC, 5) #define PCH_DEV_LPC _PCH_DEV(LPC, 0) #define PCH_DEV_SPI _PCH_DEV(LPC, 5) +#define PCH_DEV_SMBUS _PCH_DEV(LPC, 4) /* VT-d support value to match FSP settings */ /* "PCH IOAPIC Config" */ diff --git a/src/soc/intel/denverton_ns/include/soc/smbus.h b/src/soc/intel/denverton_ns/include/soc/smbus.h index e51d8a7..8dba9ad 100644 --- a/src/soc/intel/denverton_ns/include/soc/smbus.h +++ b/src/soc/intel/denverton_ns/include/soc/smbus.h @@ -17,29 +17,7 @@ #define TCOBASE_EN (1 << 8) #define TCOBASE_LOCK (1 << 0) -/* SMBus I/O bits. */ -#define SMBHSTSTAT 0x0 -#define HST_HBSY (1 << 0) -#define HST_INTR (1 << 1) -#define HST_DERR (1 << 2) -#define HST_BERR (1 << 3) -#define HST_BYTE_DONE_STS (1 << 7) -#define HST_HSTS_ALL 0xFF -#define SMBHSTCTL 0x2 -#define HST_LAST_BYTE (1 << 5) -#define HST_START (1 << 6) -#define HST_CMD_IIC_READ 0x18 -#define HST_READ 0x01 // RW -#define SMBHSTCMD 0x3 -#define SMBXMITADD 0x4 -#define SMBHSTDAT0 0x5 -#define SMBHSTDAT1 0x6 -#define SMBBLKDAT 0x7 -#define SMBTRNSADD 0x9 -#define SMBSLVDATA 0xa -#define SMBHSTAUXC 0xd -#define SMLINK_PIN_CTL 0xe -#define SMBUS_PIN_CTL 0xf +#define SMBUS_SLAVE_ADDR 0x44 /* * SMBus Private Config Registers (PID:SMB) -- To view, visit https://review.coreboot.org/c/coreboot/+/59469 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I233d198b894f10fbf0042a5023ae8a9c14136513 Gerrit-Change-Number: 59469 Gerrit-PatchSet: 4 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/baytrail,denverton_ns: Call setup_lapic()
by Kyösti Mälkki (Code Review) 15 Dec '21

15 Dec '21

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57668 ) Change subject: soc/intel/baytrail,denverton_ns: Call setup_lapic() ...................................................................... soc/intel/baytrail,denverton_ns: Call setup_lapic() A custom board with soc/intel/denverton_ns does not respond to the keyboard and does not boot from the sata/USB disks. Last post code 0x7b and the last line that is displayed at log from SeaBIOS is: All threads complete. The issue is gone when adding setup_lapic() call to configure EXTINT delivery of i8259 originated interrupts for the LAPIC. Replicate call from other soc/ and make the call for both BSP and AP CPUs. Similar change was done for soc/intel/braswell in commit b4f57bb3cac3ab29b9fa9c526ad4358faffb77a1. Signed-off-by: Dmitry Ponamorev <dponamorev(a)gmail.com> Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Change-Id: Iafbfb733d0be546e0e2fba937fd1d262785aa54d Reviewed-on: https://review.coreboot.org/c/coreboot/+/57668 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/baytrail/cpu.c M src/soc/intel/denverton_ns/cpu.c 2 files changed, 7 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/soc/intel/baytrail/cpu.c b/src/soc/intel/baytrail/cpu.c index 1dbc3d7..eb24f7b 100644 --- a/src/soc/intel/baytrail/cpu.c +++ b/src/soc/intel/baytrail/cpu.c @@ -36,6 +36,9 @@ { printk(BIOS_DEBUG, "Init BayTrail core.\n"); + /* Enable the local CPU apics */ + setup_lapic(); + /* * The turbo disable bit is actually scoped at building block level -- not package. * For non-BSP cores that are within a building block, enable turbo. The cores within diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c index 126a1c6..ef1140b 100644 --- a/src/soc/intel/denverton_ns/cpu.c +++ b/src/soc/intel/denverton_ns/cpu.c @@ -3,6 +3,7 @@ #include <console/console.h> #include <cpu/cpu.h> #include <cpu/x86/cr.h> +#include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> @@ -91,6 +92,9 @@ /* Enable Turbo */ enable_turbo(); + /* Enable the local CPU apics */ + setup_lapic(); + /* Enable speed step. Always ON.*/ msr = rdmsr(IA32_MISC_ENABLE); msr.lo |= SPEED_STEP_ENABLE_BIT; -- To view, visit https://review.coreboot.org/c/coreboot/+/57668 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iafbfb733d0be546e0e2fba937fd1d262785aa54d Gerrit-Change-Number: 57668 Gerrit-PatchSet: 12 Gerrit-Owner: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: King Sumo <kingsumos(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/denverton_ns: Use common SMBus support code
by Angel Pons (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Kyösti Mälkki, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59469 ) Change subject: soc/intel/denverton_ns: Use common SMBus support code ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59469 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I233d198b894f10fbf0042a5023ae8a9c14136513 Gerrit-Change-Number: 59469 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 15 Dec 2021 10:23:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Spell *Boot Guard* with a space for official spelling
by Angel Pons (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Paul Menzel, Christian Walter, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60136 ) Change subject: Spell *Boot Guard* with a space for official spelling ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60136 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69fb64b525fb4799bcb9d75624003c0d59b885b5 Gerrit-Change-Number: 60136 Gerrit-PatchSet: 1 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 15 Dec 2021 10:23:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/teleplatforms/D4E4S16P8: Configure ast25xx bootstraps
by Kyösti Mälkki (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Angel Pons, Michal Motyl, Patrick Rudolph, David Guckian. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36607 ) Change subject: mb/teleplatforms/D4E4S16P8: Configure ast25xx bootstraps ...................................................................... Patch Set 14: (4 comments) Patchset: PS11: > Please keep board specific changes inside mainboard part. Done File src/soc/intel/denverton_ns/chip.c: https://review.coreboot.org/c/coreboot/+/36607/comment/697f2edd_1749b441 PS7, Line 73: /* Debug output, remove if it stalls here. */ : pci_dump_ast25xx_path(); : : ast25xx_probe(); : : /* Debug output, remove if it stalls here. */ : pci_dump_ast25xx_path(); > `ast25xx_probe()` can be called from mainboard code using `mainboard_ops`. Done File src/soc/intel/denverton_ns/chip.c: https://review.coreboot.org/c/coreboot/+/36607/comment/6856bb5f_86431bad PS11, Line 51: ast25xx_probe(); > As it is board specific please move to mainboard part. Done File src/soc/intel/denverton_ns/include/soc/ramstage.h: https://review.coreboot.org/c/coreboot/+/36607/comment/e49130f2_7ea0915f PS11, Line 18: int ast25xx_probe(void); > As it is board specific please move to mainboard part. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/36607 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I92195969419f9c38845cb67f294fdab33fb481af Gerrit-Change-Number: 36607 Gerrit-PatchSet: 14 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: David Guckian <d.guckian20(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: David Guckian <d.guckian20(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Dec 2021 10:13:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: David Guckian <d.guckian20(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/teleplatforms/D4E4S16P8: Configure ast25xx bootstraps
by build bot (Jenkins) (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Kyösti Mälkki, Patrick Rudolph, David Guckian. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36607 ) Change subject: mb/teleplatforms/D4E4S16P8: Configure ast25xx bootstraps ...................................................................... Patch Set 15: (3 comments) File src/mainboard/teleplatforms/D4E4S16P8/ast25xx.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-135574): https://review.coreboot.org/c/coreboot/+/36607/comment/acee2beb_443db2a2 PS15, Line 44: printk(BIOS_INFO, "ast25xx: disable protection status: @ 0x%p 0x%08x\n", scu_protection, locks); line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-135574): https://review.coreboot.org/c/coreboot/+/36607/comment/4bf68c1e_6d0ecbc1 PS15, Line 47: printk(BIOS_INFO, "ast25xx: scu70_hwtrap current bits: @ 0x%p 0x%08x\n", scu_hwtrap, straps); line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-135574): https://review.coreboot.org/c/coreboot/+/36607/comment/8b0ac2b0_c6743f83 PS15, Line 76: printk(BIOS_INFO, "ast25xx: p2p_bridge0: 0x%x; p2p_bridge1: 0x%x\n", p2p_bridge0, p2p_bridge1); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/36607 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I92195969419f9c38845cb67f294fdab33fb481af Gerrit-Change-Number: 36607 Gerrit-PatchSet: 15 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: David Guckian <d.guckian20(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: David Guckian <d.guckian20(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Dec 2021 10:13:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit December 2021