coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/teleplatforms/D4E4S16P8: Configure ast25xx bootstraps
by Kyösti Mälkki (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Kyösti Mälkki, Patrick Rudolph, David Guckian. Hello build bot (Jenkins), Dmitry Ponamorev, Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/36607 to look at the new patch set (#15). Change subject: mb/teleplatforms/D4E4S16P8: Configure ast25xx bootstraps ...................................................................... mb/teleplatforms/D4E4S16P8: Configure ast25xx bootstraps Configure bootstrap bits before PCI enumeration. Change-Id: I92195969419f9c38845cb67f294fdab33fb481af Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/teleplatforms/D4E4S16P8/Makefile.inc A src/mainboard/teleplatforms/D4E4S16P8/ast25xx.c A src/mainboard/teleplatforms/D4E4S16P8/ast25xx.h M src/mainboard/teleplatforms/D4E4S16P8/ramstage.c 4 files changed, 227 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/36607/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/36607 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I92195969419f9c38845cb67f294fdab33fb481af Gerrit-Change-Number: 36607 Gerrit-PatchSet: 15 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: David Guckian <d.guckian20(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: David Guckian <d.guckian20(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/teleplatforms/D4E4S16P8: Add new CRB teleplatforms/D4E4S16P8
by Kyösti Mälkki (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Dmitry Ponamorev, Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Angel Pons, Michal Motyl, Patrick Rudolph, King Sumo. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57194 ) Change subject: mb/teleplatforms/D4E4S16P8: Add new CRB teleplatforms/D4E4S16P8 ...................................................................... Patch Set 23: (4 comments) File src/mainboard/teleplatforms/D4E4S16P8/ramstage.c: https://review.coreboot.org/c/coreboot/+/57194/comment/2dad4e96_483fd0e0 PS21, Line 26: SMBUS_IO_BASE > Why not `smbus_base()`? This is ramstage, smbus_base() is romstage. There just isn't a clean way to do anything with SMBus currently. https://review.coreboot.org/c/coreboot/+/57194/comment/4c2568fc_f87dce0d PS21, Line 28: (tmp < 0x20 || tmp > 0x7f) > 0x7f is DEL, which isn't printable. […] Not sure if it looks like what you intended? https://review.coreboot.org/c/coreboot/+/57194/comment/716d83fc_1d900368 PS21, Line 28: tmp == 0x3f/*?*/ > nit: you can use a character literal in the comparison: […] Done https://review.coreboot.org/c/coreboot/+/57194/comment/2f0a639d_355ee818 PS21, Line 30: memset(serial, 0, sizeof(serial)); : memcpy(serial, ERROR_STRING, sizeof(ERROR_STRING)); : return serial; > Why not simply `return ERROR_STRING;` instead? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/57194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If654fc7a391643b50f2e52755fd7c11a37bfd188 Gerrit-Change-Number: 57194 Gerrit-PatchSet: 23 Gerrit-Owner: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: King Sumo <kingsumos(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: King Sumo <kingsumos(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Dec 2021 10:11:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/denverton_ns: Use common SMBus support code
by Kyösti Mälkki (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Angel Pons, Michal Motyl, Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59469 ) Change subject: soc/intel/denverton_ns: Use common SMBus support code ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/denverton_ns/include/soc/smbus.h: https://review.coreboot.org/c/coreboot/+/59469/comment/bfc3f9ff_c2f81734 PS2, Line 20: 0x24 > I did not check datasheet. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59469 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I233d198b894f10fbf0042a5023ae8a9c14136513 Gerrit-Change-Number: 59469 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 15 Dec 2021 09:58:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/releases: Update 4.16 release notes
by Angel Pons (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Sean Rhodes. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59564 ) Change subject: Documentation/releases: Update 4.16 release notes ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59564/comment/c2387b1e_329eabe1 PS3, Line 9: * Add StarBook Mk V as new mainboard > Yes - as Angel pointed out "The chip and board additions and removals will be updated right […] Woups, looks like I forgot to re-read the commit message. -- To view, visit https://review.coreboot.org/c/coreboot/+/59564 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9675a6a8960d93ae6de285d8b25ffc48a763483e Gerrit-Change-Number: 59564 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Comment-Date: Wed, 15 Dec 2021 09:58:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <admin(a)starlabs.systems> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/baytrail,denverton_ns: Call setup_lapic()
by Kyösti Mälkki (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Arthur Heymans, Dmitry Ponamorev, Michał Żygowski, Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph, King Sumo. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57668 ) Change subject: soc/intel/baytrail,denverton_ns: Call setup_lapic() ...................................................................... Patch Set 11: (1 comment) Patchset: PS3: > Seems to be done? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/57668 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iafbfb733d0be546e0e2fba937fd1d262785aa54d Gerrit-Change-Number: 57668 Gerrit-PatchSet: 11 Gerrit-Owner: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: King Sumo <kingsumos(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: King Sumo <kingsumos(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Dec 2021 09:56:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Comment-In-Reply-To: Dmitry Ponamorev <dponamorev(a)gmail.com> Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/releases: Improve CSME section
by Angel Pons (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Sean Rhodes, Paul Menzel. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60133 ) Change subject: Documentation/releases: Improve CSME section ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I36eac6f017229a3e9261e0eb84371421927e1cae Gerrit-Change-Number: 60133 Gerrit-PatchSet: 1 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 15 Dec 2021 09:55:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Spell *Boot Guard* with a space for official spelling
by Paul Menzel (Code Review) 15 Dec '21

15 Dec '21

Paul Menzel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60136 ) Change subject: Spell *Boot Guard* with a space for official spelling ...................................................................... Spell *Boot Guard* with a space for official spelling See for example Intel document *Secure the Network Infrastructure – Secure Boot Methodologies* [1]. Change all occurrences with the command below: $ git grep -l BootGuard | xargs sed -i 's/BootGuard/Boot Guard/g' [1]: https://builders.intel.com/docs/networkbuilders/secure-the-network-infrastr… Change-Id: I69fb64b525fb4799bcb9d75624003c0d59b885b5 Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> --- M src/lib/Kconfig.cbfs_verification M src/northbridge/intel/haswell/northbridge.c M src/soc/intel/broadwell/northbridge.c M util/intelmetool/intelmetool.c 4 files changed, 8 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/60136/1 diff --git a/src/lib/Kconfig.cbfs_verification b/src/lib/Kconfig.cbfs_verification index 33e5458..9a9ba31 100644 --- a/src/lib/Kconfig.cbfs_verification +++ b/src/lib/Kconfig.cbfs_verification @@ -13,7 +13,7 @@ file as it gets loaded by chaining it to a trust anchor that is embedded in the bootblock. This only makes sense if you use some out-of-band mechanism to guarantee the integrity of the bootblock - itself, such as Intel BootGuard or flash write-protection. + itself, such as Intel Boot Guard or flash write-protection. If a CBFS image was created with this option enabled, cbfstool will automatically update the hash embedded in the bootblock whenever it diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index 9ead46b..fd5ffd9 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -247,7 +247,7 @@ /* * DMA Protected Range can be reserved below TSEG for PCODE patch - * or TXT/BootGuard related data. Rather than report a base address, + * or TXT/Boot Guard related data. Rather than report a base address, * the DPR register reports the TOP of the region, which is the same * as TSEG base. The region size is reported in MiB in bits 11:4. */ diff --git a/src/soc/intel/broadwell/northbridge.c b/src/soc/intel/broadwell/northbridge.c index 76ea35f..4511c07 100644 --- a/src/soc/intel/broadwell/northbridge.c +++ b/src/soc/intel/broadwell/northbridge.c @@ -272,7 +272,7 @@ /* * DMA Protected Range can be reserved below TSEG for PCODE patch - * or TXT/BootGuard related data. Rather than report a base address + * or TXT/Boot Guard related data. Rather than report a base address * the DPR register reports the TOP of the region, which is the same * as TSEG base. The region size is reported in MiB in bits 11:4. */ diff --git a/util/intelmetool/intelmetool.c b/util/intelmetool/intelmetool.c index 9105d3b..4216189 100644 --- a/util/intelmetool/intelmetool.c +++ b/util/intelmetool/intelmetool.c @@ -346,7 +346,7 @@ if (ME_major_ver && (ME_major_ver < 9 || (ME_major_ver == 9 && ME_minor_ver < 5))) { - printf(CGRN "Your system isn't BootGuard ready.\n" + printf(CGRN "Your system isn't Boot Guard ready.\n" "You can flash other firmware!\n" RESET); rehide_me(); return; @@ -354,7 +354,7 @@ if (pci_read_long(dev, 0x40) & 0x10) printf(CYEL "Your southbridge configuration is insecure!!\n" - "BootGuard keys can be overwritten or wiped, or you are " + "Boot Guard keys can be overwritten or wiped, or you are " "in developer mode.\n" RESET); rehide_me(); @@ -380,10 +380,10 @@ return; } - printf("BootGuard MSR Output : 0x%" PRIx64 "\n", btg.raw); + printf("Boot Guard MSR Output : 0x%" PRIx64 "\n", btg.raw); if (!btg.btg_capability) { - printf(CGRN "Your system isn't BootGuard ready.\n" + printf(CGRN "Your system isn't Boot Guard ready.\n" "You can flash other firmware!\n" RESET); return; } @@ -412,7 +412,7 @@ "Cache-As-RAM.\nIt might be possible to flash other firmware.\n" RESET); } else { - printf(CGRN "Your system is BootGuard ready but verified boot is disabled.\n" + printf(CGRN "Your system is Boot Guard ready but verified boot is disabled.\n" "You can flash other firmware!\n" RESET); } } -- To view, visit https://review.coreboot.org/c/coreboot/+/60136 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69fb64b525fb4799bcb9d75624003c0d59b885b5 Gerrit-Change-Number: 60136 Gerrit-PatchSet: 1 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/alderlake: Add timestamp for cse_fw_sync
by Paul Menzel (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60135 ) Change subject: soc/intel/alderlake: Add timestamp for cse_fw_sync ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60135/comment/dc47da98_dea57eb3 PS1, Line 14: (77,973) 77 ms is quite long. :( -- To view, visit https://review.coreboot.org/c/coreboot/+/60135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idba11417e0fc7c18d0d938a4293ec3aff1537fb4 Gerrit-Change-Number: 60135 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 15 Dec 2021 09:39:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: move USB3 HUB reset funtion to bootblock
by Rex-BC Chen (Code Review) 15 Dec '21

15 Dec '21

Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60088 ) Change subject: mb/google/corsola: move USB3 HUB reset funtion to bootblock ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60088/comment/acd5c8fd_553cf0ad PS2, Line 7: funtion > function I will take care of this next time. https://review.coreboot.org/c/coreboot/+/60088/comment/36f80b24_72b910f7 PS2, Line 11: Otherwise the USB3 hub may be not usable. > In the payload? […] this is required by board setting, and the result of putting them on bootblock is ok for our hw board owner. -- To view, visit https://review.coreboot.org/c/coreboot/+/60088 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I92feb2316302fda32478b24c014bcd380d0ac55d Gerrit-Change-Number: 60088 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 15 Dec 2021 09:37:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Enable CPPCv3
by Sridhar Siricilla (Code Review) 15 Dec '21

15 Dec '21

Sridhar Siricilla has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/59363 ) Change subject: soc/intel/alderlake: Enable CPPCv3 ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/59363 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icaacd4a4ba953d8337f557903ed2ea9da4a60fb9 Gerrit-Change-Number: 59363 Gerrit-PatchSet: 7 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-MessageType: abandon

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coreboot-gerrit December 2021