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Change subject: mb/google/dedede/var/beadrix: Configure GPIO settings
......................................................................
Patch Set 3: Code-Review+1
(2 comments)
File src/mainboard/google/dedede/variants/beadrix/gpio.c:
https://review.coreboot.org/c/coreboot/+/60245/comment/03037849_9dc00796
PS2, Line 60: PAD_NC(GPP_H1, NONE),
> It seems SD Card is not going to be supported. […]
I have created a new CL.
https://review.coreboot.org/c/coreboot/+/60266https://review.coreboot.org/c/coreboot/+/60245/comment/128533b4_ee507536
PS2, Line 63: /* TODO; static const struct pad_config lte_disable_pads[] = {
: PAD_NC(GPP_A10, NONE),
: PAD_NC(GPP_D0, NONE),
: PAD_NC(GPP_H17, NONE),
: }; */
> Remove the TODO. Same comment for line 75 - 81.
Done
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Change subject: mb/google/dedede/var/beadrix: Remove SD controller
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Patch Set 1: Code-Review+1
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Change subject: mb/google/dedede/var/bugzzy: Initialize display signals on user mode
......................................................................
Patch Set 11:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60190/comment/690ec20c_b627cd37
PS9, Line 14: It takes about 100 ms delay on booting time.
> Is it alright to increase the overall boottime? Why can’t the operating system do it?
After removing the last 60ms delay, the delay amount is reduced to under 30 ms. And we had a lot of discussions in the issue tracker for it but we couldn't find perfect solution on OS phase.
File src/mainboard/google/dedede/variants/bugzzy/ramstage.c:
https://review.coreboot.org/c/coreboot/+/60190/comment/191c3ca7_4b4cd9d1
PS9, Line 64: mdelay(60);
> maybe try to remove this delay to speed up post time? or record timestamp by "timestamp_add_now" and […]
Just verified TSP works w/o this delay. And saw the 'cbmem -t' log we have enough time before jumping to kernel from the WA. (about 300 ms)
75:cbmem post 732,149 (353)
80:write tables 732,251 (102)
85:finalize chips 738,828 (6,576)
90:starting to load payload 749,498 (10,669)
15:starting LZMA decompress (ignore for x86) 751,096 (1,598)
16:finished LZMA decompress (ignore for x86) 805,555 (54,459)
958:calling FspNotify(ReadyToBoot) 810,024 (4,468)
959:returning from FspNotify(ReadyToBoot) 825,449 (15,425)
960:calling FspNotify(EndOfFirmware) 825,510 (61)
961:returning from FspNotify(EndOfFirmware) 844,311 (18,801)
99:selfboot jump 844,689 (377)
1000:depthcharge start 845,727 (1,037)
1002:RO vboot init 845,874 (147)
1020:vboot select&load kernel 845,876 (1)
1040:finished storage device initialization 879,998 (34,122)
1050:finished reading kernel from disk 995,845 (115,846)
1100:finished vboot kernel verification 1,073,437 (77,591)
1101:jumping to kernel 1,082,259 (8,821)
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Hello build bot (Jenkins), Nico Huber, Paul Menzel, Tim Wawrzynczak, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
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Change subject: libpayload/i8042: Use 'WARNING' instead of 'ERROR' when probing failed
......................................................................
libpayload/i8042: Use 'WARNING' instead of 'ERROR' when probing failed
The probe should output the 'WARNING' instead of 'ERROR' when the i8042
module can't be probed. For the x86 device, which enables the PC_I8042
by default, the 'ERROR' message will be outputted if the device doesn't
connect to an i8042 keyboard controller. This is an unexpected error
when doing the autotest.
BUG=b:207077409
TEST=`test_that f:.*power_Resume/control` pass
Change-Id: I2880c854b873a2a00aa0d8b1cbb4f86fa8139255
Signed-off-by: Zhuohao Lee <zhuohao(a)chromium.org>
---
M payloads/libpayload/drivers/i8042/i8042.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/60129/4
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Hello build bot (Jenkins), Nico Huber, Paul Menzel, Tim Wawrzynczak, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
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Change subject: libpayload/i8042: Use 'INFO' instead of 'ERROR' when probing failed
......................................................................
libpayload/i8042: Use 'INFO' instead of 'ERROR' when probing failed
The probe should output the 'INFO' instead of 'ERROR' when the i8042
module can't be probed. For the x86 device, which enables the PC_I8042
by default, the 'ERROR' message will be outputted if the device doesn't
connect to an i8042 keyboard controller. This is an unexpected error
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BUG=b:207077409
TEST=`test_that f:.*power_Resume/control` pass
Change-Id: I2880c854b873a2a00aa0d8b1cbb4f86fa8139255
Signed-off-by: Zhuohao Lee <zhuohao(a)chromium.org>
---
M payloads/libpayload/drivers/i8042/i8042.c
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git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/60129/3
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Change subject: libpayload/i8042: Use 'INFO' instead of 'ERROR' when probing failed
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60129/comment/2e96d041_770258d8
PS2, Line 13: when doing the autotest.
> PC_I8042 is selected by default for x86 devices (through PC_KEYBOARD) ... […]
Yeah, the option is turned on for the x86 by default. Maybe we can use the WARNING instead?
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Change subject: mb/google/guybrush/var/nipperkin: update telemetry settings
......................................................................
Patch Set 3: Code-Review+2
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Change subject: mb/google/guybrush/var/dewatt: update DRAM ID table
......................................................................
Patch Set 6:
(1 comment)
File src/mainboard/google/guybrush/variants/guybrush/memory/mem_parts_used.txt:
https://review.coreboot.org/c/coreboot/+/60090/comment/21f063d5_5929bb0e
PS4, Line 13: H54G56CYRBX247
> Makes sense. Maybe amend the commit message nevertheless. Maybe: […]
Ok.
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