coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: xcompile: Support i686-elf toolchains
by Alex James (Code Review) 21 Dec '21

21 Dec '21

Attention is currently required from: Patrick Georgi, Martin Roth, Stefan Reinauer, Paul Menzel. Alex James has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60218 ) Change subject: xcompile: Support i686-elf toolchains ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > i686 toolchains can be problematic, as they tend to use certain registers before they have been enab […] I see. I can drop this change if it doesn't make sense to include it. -- To view, visit https://review.coreboot.org/c/coreboot/+/60218 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibdf2cdd8b244822740c03935747184ebc5ca1512 Gerrit-Change-Number: 60218 Gerrit-PatchSet: 2 Gerrit-Owner: Alex James <theracermaster(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 21 Dec 2021 06:08:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: comment

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Change in coreboot[master]: Revert "vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v247...
by Nick Vaccaro (Code Review) 21 Dec '21

21 Dec '21

Nick Vaccaro has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60262 ) Change subject: Revert "vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02" ...................................................................... Revert "vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02" This reverts commit ae0ea32c52905d6bcb527b04727463bc2d1b9e09. This change should not have merged until the 2471_02 FSP change is ready for merge. BUG=b:211481222 TEST='emerge-brya coreboot chromeos-bootimage', flash and boot brya0 to kernel. Change-Id: Iae5b0c53ace196053e1e155efd2e08f438979ba7 Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60262 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Zhuohao Lee <zhuohao(a)google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h M src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h 2 files changed, 9 insertions(+), 8 deletions(-) Approvals: build bot (Jenkins): Verified Zhuohao Lee: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h index 191ef27..271e01c 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h @@ -3164,7 +3164,7 @@ /** Offset 0x0AA8 - Reserved **/ - UINT8 Reserved45[136]; + UINT8 Reserved45[104]; } FSP_M_CONFIG; /** Fsp M UPD Configuration @@ -3183,11 +3183,11 @@ **/ FSP_M_CONFIG FspmConfig; -/** Offset 0x0B30 +/** Offset 0x0B10 **/ - UINT8 UnusedUpdSpace34[6]; + UINT8 UnusedUpdSpace31[6]; -/** Offset 0x0B36 +/** Offset 0x0B16 **/ UINT16 UpdTerminator; } FSPM_UPD; diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h index a73fe59..ddf6ca8 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h @@ -3380,7 +3380,8 @@ UINT8 ProcHotLock; /** Offset 0x0CF3 - Configuration for boot TDP selection - Deprecated. Move to premem. + Configuration for boot TDP selection; <b>0: TDP Nominal</b>; 1: TDP Down; 2: TDP + Up;0xFF : Deactivate **/ UINT8 ConfigTdpLevel; @@ -3868,7 +3869,7 @@ /** Offset 0x0FD5 - Reserved **/ - UINT8 Reserved56[123]; + UINT8 Reserved56[19]; } FSP_S_CONFIG; /** Fsp S UPD Configuration @@ -3887,11 +3888,11 @@ **/ FSP_S_CONFIG FspsConfig; -/** Offset 0x1050 +/** Offset 0x0FE8 **/ UINT8 UnusedUpdSpace42[6]; -/** Offset 0x1056 +/** Offset 0x0FEE **/ UINT16 UpdTerminator; } FSPS_UPD; -- To view, visit https://review.coreboot.org/c/coreboot/+/60262 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iae5b0c53ace196053e1e155efd2e08f438979ba7 Gerrit-Change-Number: 60262 Gerrit-PatchSet: 4 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/intel/adlrvp: Configure GPIOs for Alder Lake-N
by Usha P (Code Review) 21 Dec '21

21 Dec '21

Attention is currently required from: Anilkumar N, Subrata Banik, Maulik V Vaghela, Kangheui Won, Tim Wawrzynczak, Rizwan Qureshi, Sridhar Siricilla, Krishna P Bhat D. Usha P has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59937 ) Change subject: mb/intel/adlrvp: Configure GPIOs for Alder Lake-N ...................................................................... Patch Set 10: (1 comment) File src/mainboard/intel/adlrvp/gpio_n.c: https://review.coreboot.org/c/coreboot/+/59937/comment/df9ef5d6_61bad69d PS10, Line 8: static > Sorry, didn't get your point. […] Yes clubbed according to features like ESPI GPIOs, TCSS, Camera, M.2, PCIe etc. -- To view, visit https://review.coreboot.org/c/coreboot/+/59937 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c0ca52d0cc73acfd8503007d5f3d2ad9a48f8ca Gerrit-Change-Number: 59937 Gerrit-PatchSet: 10 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Anilkumar N <anilkumar.n(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anilkumar N <anilkumar.n(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Comment-Date: Tue, 21 Dec 2021 04:59:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Usha P <usha.p(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp: Configure GPIOs for Alder Lake-N
by Subrata Banik (Code Review) 21 Dec '21

21 Dec '21

Attention is currently required from: Anilkumar N, Maulik V Vaghela, Kangheui Won, Tim Wawrzynczak, Rizwan Qureshi, Subrata Banik, Sridhar Siricilla, Krishna P Bhat D, Usha P. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59937 ) Change subject: mb/intel/adlrvp: Configure GPIOs for Alder Lake-N ...................................................................... Patch Set 10: (1 comment) File src/mainboard/intel/adlrvp/gpio_n.c: https://review.coreboot.org/c/coreboot/+/59937/comment/0daccea1_3268a90b PS10, Line 8: static > Hi Subrata, Currently I have clubbed the GPIOs based on ports which would help us while debugging. Sorry, didn't get your point. Can you please help me to understand "clubbed the GPIOs based on ports"? I believe you meant "feature wise" like all ESPI GPIOs are clubbed together, same for TCSS etc. -- To view, visit https://review.coreboot.org/c/coreboot/+/59937 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c0ca52d0cc73acfd8503007d5f3d2ad9a48f8ca Gerrit-Change-Number: 59937 Gerrit-PatchSet: 10 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Anilkumar N <anilkumar.n(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anilkumar N <anilkumar.n(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Comment-Date: Tue, 21 Dec 2021 04:55:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Usha P <usha.p(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: intel/common/block/cse: Move EOP early in boot sequence
by Subrata Banik (Code Review) 21 Dec '21

21 Dec '21

Attention is currently required from: Maulik V Vaghela, Paul Menzel, Rizwan Qureshi, Sridhar Siricilla, Tim Wawrzynczak. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60195 ) Change subject: intel/common/block/cse: Move EOP early in boot sequence ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: This is a good finding but I'm still interested to know why we have to play with sending EOP that many times to find the exact spot where the timing might be optimal. Also, is that guaranteed with all CSE binary in future for ADL and other platforms, we don't need to change the EOP sequence? Understanding why it's taking longer time is the first thing IMO rather W/A it by moving it earlier or later. Can we pursue our debug in that line ? -- To view, visit https://review.coreboot.org/c/coreboot/+/60195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c7fe6f8f3fadb68310d4a09692f51f82c737c35 Gerrit-Change-Number: 60195 Gerrit-PatchSet: 2 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Comment-Date: Tue, 21 Dec 2021 04:53:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: FSP 2511 headers include.
by Saurabh Mishra (Code Review) 21 Dec '21

21 Dec '21

Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Balaji Manigandan, Patrick Rudolph. Saurabh Mishra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60259 ) Change subject: FSP 2511 headers include. ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60259/comment/fb73072e_45f893c1 PS1, Line 7: Meminit function call in coreboot has been updated as per new FSP : UPD and DQS in headers. : : src/soc/intel/alderlake/meminit.c : Changes adopted as per new FSP DQS & : UPD calls. : src/soc/intel/alderlake/fsp_params.c : Updated LpmStateEnableMask UPD > Please look through `git log` on how to write commit messages. […] Ack Patchset: PS3: Updated. Please review. -- To view, visit https://review.coreboot.org/c/coreboot/+/60259 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c6ae72610da39fc18ff252c440d006e83c576f3 Gerrit-Change-Number: 60259 Gerrit-PatchSet: 3 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 21 Dec 2021 04:48:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jsl: Add CdClock config
by Karthik Ramasubramanian (Code Review) 21 Dec '21

21 Dec '21

Attention is currently required from: Jamie Chen, Henry Sun, Paul Menzel, Simon Yang, Kane Chen, Patrick Rudolph. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60009 ) Change subject: soc/intel/jsl: Add CdClock config ...................................................................... Patch Set 14: Code-Review+2 (1 comment) File src/mainboard/google/dedede/variants/baseboard/devicetree.cb: https://review.coreboot.org/c/coreboot/+/60009/comment/9e3bad10_485afa55 PS14, Line 209: register "CdClock" = "0xff" > => Is this the default config in FSP? […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/60009 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I917c2f10b130b0cd54f60e2ba98eb971d5ec3c97 Gerrit-Change-Number: 60009 Gerrit-PatchSet: 14 Gerrit-Owner: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 21 Dec 2021 04:47:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Simon Yang <simon1.yang(a)intel.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: FSP 2511 headers include.
by Saurabh Mishra (Code Review) 21 Dec '21

21 Dec '21

Attention is currently required from: Tim Wawrzynczak, Balaji Manigandan, Patrick Rudolph. Saurabh Mishra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60259 ) Change subject: FSP 2511 headers include. ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60259 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c6ae72610da39fc18ff252c440d006e83c576f3 Gerrit-Change-Number: 60259 Gerrit-PatchSet: 3 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 21 Dec 2021 04:46:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: FSP 2511 headers include.
by Saurabh Mishra (Code Review) 21 Dec '21

21 Dec '21

Attention is currently required from: Tim Wawrzynczak, Balaji Manigandan, Patrick Rudolph. Hello Tim Wawrzynczak, Balaji Manigandan, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60259 to look at the new patch set (#3). Change subject: FSP 2511 headers include. ...................................................................... FSP 2511 headers include. src/soc/intel/alderlake/meminit.c :Updated UPD & DQS as per FSP 2511 src/soc/intel/alderlake/fsp_params.c :Updated LpmStateEnableMask UPD change-Id: I0c6ae72610da39fc18ff252c440d006e83c576f3 Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> --- M src/soc/intel/alderlake/fsp_params.c M src/soc/intel/alderlake/meminit.c 2 files changed, 27 insertions(+), 27 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/60259/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/60259 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c6ae72610da39fc18ff252c440d006e83c576f3 Gerrit-Change-Number: 60259 Gerrit-PatchSet: 3 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Meminit function call in coreboot has been updated as per new FSP UPD...
by Saurabh Mishra (Code Review) 21 Dec '21

21 Dec '21

Attention is currently required from: Tim Wawrzynczak, Balaji Manigandan, Patrick Rudolph. Saurabh Mishra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60259 ) Change subject: Meminit function call in coreboot has been updated as per new FSP UPD and DQS in headers. ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60259 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c6ae72610da39fc18ff252c440d006e83c576f3 Gerrit-Change-Number: 60259 Gerrit-PatchSet: 2 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 21 Dec 2021 04:36:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit December 2021