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Change subject: soc/intel/jasperlake: Add CdClock frequency config
......................................................................
Patch Set 21:
(1 comment)
File src/soc/intel/jasperlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/60009/comment/f5fe3b1c_b62bb468
PS21, Line 212: params->CdClock = config->cd_clock ? config->cd_clock - 1 : 0xff;
Still missing a comment about 0xff here.
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Change subject: soc/intel/jasperlake: Add CdClock frequency config
......................................................................
Patch Set 21: Code-Review+1
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Kane Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60401 )
Change subject: soc/intel/alderlake: Check clkreq overlap
......................................................................
soc/intel/alderlake: Check clkreq overlap
In some cases, partner may assign same clkreq on more than one devices.
This could happen when one device is in baseboard dev tree and another
one is in override dev tree.
This change add a clkreq overlap check and pop up a warning message
TEST=On brya, assigned one clkreq to 2 devices and found the warning
message
Change-Id: I2f701a19118f4702c227b17e43b6551591d9b344
Signed-off-by: Kane Chen <kane.chen(a)intel.corp-partner.google.com>
---
M src/soc/intel/alderlake/romstage/fsp_params.c
1 file changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/60401/1
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index 8959bf7..f29d7a7 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -33,6 +33,8 @@
VTD_TBT3,
};
+u32 clk_req_mapping = 0;
+
static uint8_t clk_src_to_fsp(enum pcie_rp_type type, int rp_number)
{
assert(type == PCIE_RP_PCH || type == PCIE_RP_CPU);
@@ -53,8 +55,13 @@
continue;
if (cfg[i].flags & PCIE_RP_CLK_SRC_UNUSED)
continue;
- if (!(cfg[i].flags & PCIE_RP_CLK_REQ_UNUSED))
+ if (clk_req_mapping & (1 << cfg[i].clk_req))
+ printk(BIOS_WARNING, "Found overlapped clkreq assignment on clk req %d\n"
+ , cfg[i].clk_req);
+ if (!(cfg[i].flags & PCIE_RP_CLK_REQ_UNUSED)) {
m_cfg->PcieClkSrcClkReq[cfg[i].clk_src] = cfg[i].clk_req;
+ clk_req_mapping |= 1 << cfg[i].clk_req;
+ }
m_cfg->PcieClkSrcUsage[cfg[i].clk_src] = clk_src_to_fsp(type, i);
}
}
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Change subject: soc/mediatek/mt8186: Add header files to support DRAM calibration
......................................................................
Patch Set 4: Code-Review+2
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Change subject: soc/mediatek/mt8186: Add header files to support DRAM calibration
......................................................................
Patch Set 4:
(1 comment)
File src/soc/mediatek/mt8186/include/soc/dramc_param.h:
https://review.coreboot.org/c/coreboot/+/60385/comment/dbb269f5_a123fff7
PS2, Line 59: struct dramc_param_header {
> I mean the config field that is not commented out.
Done
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Hello Hung-Te Lin, build bot (Jenkins), Ryan Chuang, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/60385
to look at the new patch set (#4).
Change subject: soc/mediatek/mt8186: Add header files to support DRAM calibration
......................................................................
soc/mediatek/mt8186: Add header files to support DRAM calibration
Remove emi.h because emi.h is defined in common/include/soc.
Add dramc_param.h and dramc_soc.h to prepare for implementation of
DRAM full calibration.
TEST=build pass.
BUG=b:202871018
Signed-off-by: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com>
Change-Id: If8662ed43088ea5aa1fe6cb5b2c4bda2338c4387
---
M src/soc/mediatek/mt8186/emi.c
A src/soc/mediatek/mt8186/include/soc/dramc_param.h
A src/soc/mediatek/mt8186/include/soc/dramc_soc.h
D src/soc/mediatek/mt8186/include/soc/emi.h
4 files changed, 208 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/60385/4
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Change subject: soc/mediatek/mt8186: Add header files to support DRAM calibration
......................................................................
Patch Set 3:
(1 comment)
File src/soc/mediatek/mt8186/include/soc/dramc_param.h:
https://review.coreboot.org/c/coreboot/+/60385/comment/08cf55bc_d557dd1e
PS2, Line 59: struct dramc_param_header {
> Done
I mean the config field that is not commented out.
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