coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/common/pmc: Drop redundant pmc_ipc.c entry
by Angel Pons (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak, Arthur Heymans, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59747 ) Change subject: soc/intel/common/pmc: Drop redundant pmc_ipc.c entry ...................................................................... Patch Set 1: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59747/comment/6c1e02f1_d4bfd2fd PS1, Line 7: redundant Strictly speaking, the removed entry is not redundant, as `pmc_ipc.c` is no longer compiled in when `PMC_IPC_ACPI_INTERFACE` is not enabled. I'd simply use `unneeded` or `unnecessary` instead. https://review.coreboot.org/c/coreboot/+/59747/comment/01d1b35b_f3724435 PS1, Line 9: redundant Same as above. -- To view, visit https://review.coreboot.org/c/coreboot/+/59747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie66f0833daf033ec16210221610508f9fbb1e6c7 Gerrit-Change-Number: 59747 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 30 Nov 2021 09:48:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build ...
by Angel Pons (Code Review) 30 Nov '21

30 Nov '21

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Change in coreboot[master]: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build ...
by Angel Pons (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Arthur Heymans, Bill XIE, Nico Huber, Patrick Rudolph, Julius Werner, Michael Niewöhner, Kyösti Mälkki, Aaron Durbin. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51671 ) Change subject: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time ...................................................................... Patch Set 31: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/51671/comment/a3acc4a1_083f5512 PS29, Line 22: Test passed on Elitebook Folio 9470m. > EC_HP_KBC1126_ECFW_IN_CBFS is disabled in folio_9480m's Kconfig. […] You're right, I confused the two. Apologies for the noise. File src/arch/x86/Kconfig: https://review.coreboot.org/c/coreboot/+/51671/comment/93bfbeb5_299ee9bf PS29, Line 357: config ECFW_PTR_SIZE : int : help : Size of reserved space for EC firmware pointer > Now it is used in ecfw_ptr.c as a static assert. Hmmm, but arch/x86 still doesn't use it. I'd simply remove the Kconfig and use a literal `8` in ecfw_ptr.c File src/ec/hp/kbc1126/ecfw_ptr.h: https://review.coreboot.org/c/coreboot/+/51671/comment/35003430_8d2e35b2 PS31, Line 8: struct ecfw_addr { : /* 8-byte offset of firmware blob in big endian */ : uint16_t off; : /* bitwise inverse of "off", for error checking */ : uint16_t inv; : }; : : struct ecfw_ptr { : struct ecfw_addr fw1; : struct ecfw_addr fw2; : }; These structs should be `__packed` to ensure the compiler doesn't add any padding. -- To view, visit https://review.coreboot.org/c/coreboot/+/51671 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f0de0c4d7283e630242fbe84a46e0547783c49e Gerrit-Change-Number: 51671 Gerrit-PatchSet: 31 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Comment-Date: Tue, 30 Nov 2021 09:44:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bill XIE <persmule(a)hardenedlinux.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Select number of I/O for ADL-N
by Usha P (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. Usha P has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59752 ) Change subject: soc/intel/alderlake: Select number of I/O for ADL-N ...................................................................... soc/intel/alderlake: Select number of I/O for ADL-N Select number of I/O based on PCH for Alder Lake-N Signed-off-by: Usha P <usha.p(a)intel.com> Change-Id: I7ebbcdcdb1ccc34b80ec71ac3e591fe4ad6b1904 --- M src/soc/intel/alderlake/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/59752/1 diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index a6e2672..941a677 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -174,6 +174,7 @@ config MAX_PCH_ROOT_PORTS int default 10 if SOC_INTEL_ALDERLAKE_PCH_M + default 9 if SOC_INTEL_ALDERLAKE_PCH_N default 12 config MAX_CPU_ROOT_PORTS @@ -188,11 +189,13 @@ config MAX_PCIE_CLOCK_SRC int default 6 if SOC_INTEL_ALDERLAKE_PCH_M + default 5 if SOC_INTEL_ALDERLAKE_PCH_N default 7 config MAX_PCIE_CLOCK_REQ int default 6 if SOC_INTEL_ALDERLAKE_PCH_M + default 5 if SOC_INTEL_ALDERLAKE_PCH_N default 10 config SMM_TSEG_SIZE -- To view, visit https://review.coreboot.org/c/coreboot/+/59752 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ebbcdcdb1ccc34b80ec71ac3e591fe4ad6b1904 Gerrit-Change-Number: 59752 Gerrit-PatchSet: 1 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/alderlake: Adding Kconfig for ADL_N PCH
by Usha P (Code Review) 30 Nov '21

30 Nov '21

Usha P has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59751 ) Change subject: soc/intel/alderlake: Adding Kconfig for ADL_N PCH ...................................................................... soc/intel/alderlake: Adding Kconfig for ADL_N PCH Add SOC_INTEL_ALDERLAKE_PCH_N option in Kconfig Signed-off-by: Usha P <usha.p(a)intel.com> Change-Id: I1be10aea36db5a14ca8d7cf5c087163e44554f78 --- M src/soc/intel/alderlake/Kconfig 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/59751/1 diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index e5d6d6b..a6e2672 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -8,6 +8,11 @@ help Choose this option if you have PCH-M chipset. +config SOC_INTEL_ALDERLAKE_PCH_N + bool + help + Choose this option if you have PCH-N chipset. + if SOC_INTEL_ALDERLAKE config CPU_SPECIFIC_OPTIONS -- To view, visit https://review.coreboot.org/c/coreboot/+/59751 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1be10aea36db5a14ca8d7cf5c087163e44554f78 Gerrit-Change-Number: 59751 Gerrit-PatchSet: 1 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/intel/fsp2_0: Add support for FSP runs in long mode (x86_64)
by Subrata Banik (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Andrey Petrov, Patrick Rudolph. Hello build bot (Jenkins), Andrey Petrov, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59744 to look at the new patch set (#4). Change subject: drivers/intel/fsp2_0: Add support for FSP runs in long mode (x86_64) ...................................................................... drivers/intel/fsp2_0: Add support for FSP runs in long mode (x86_64) Add new Kconfig `PLATFORM_USES_FSP2_X86_64` to mark FSP binarycapable of running in x86_64 mode. Fix the compilation issue by addingrequired FSP headers to make the code compiled with`HAVE_EXP_X86_64_SUPPORT` Kconfig enabled. TEST=Verified on Intel Alder Lake with experimental 64-bit support FSP. Change-Id: If12b63a282c660da6f57fe23b0b848e2d155853f Signed-off-by: Subrata Banik <subi.banik(a)gmail.com> --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/include/fsp/info_header.h M src/vendorcode/intel/edk2/UDK2017/IntelFsp2Pkg/Include/FspEas/FspApi.h M src/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include/FspEas/FspApi.h 4 files changed, 106 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/59744/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59744 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If12b63a282c660da6f57fe23b0b848e2d155853f Gerrit-Change-Number: 59744 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/felwinter: Add WiFi SAR table for felwinter
by Ian Feng (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Tim Wawrzynczak, EricR Lai. Ian Feng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59718 ) Change subject: mb/google/brya/var/felwinter: Add WiFi SAR table for felwinter ...................................................................... Patch Set 5: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59718/comment/84be6f50_c5ee6ff6 PS4, Line 7: mb/google/brya/var/felwinter: Add Wifi SAR for felwinter > WiFi SAR table Done https://review.coreboot.org/c/coreboot/+/59718/comment/a878915c_b39620c9 PS4, Line 12: TEST=emerge-brya chromeos-config chromeos-config-bsp-private > checked SAR table can load by WiFi driver. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59718 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0de710f4447302ee545a67cbd79373bdd2077637 Gerrit-Change-Number: 59718 Gerrit-PatchSet: 5 Gerrit-Owner: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 30 Nov 2021 09:19:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/felwinter: Add WiFi SAR table for felwinter
by Ian Feng (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Ian Feng, Tim Wawrzynczak. Hello build bot (Jenkins), Tim Wawrzynczak, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59718 to look at the new patch set (#5). Change subject: mb/google/brya/var/felwinter: Add WiFi SAR table for felwinter ...................................................................... mb/google/brya/var/felwinter: Add WiFi SAR table for felwinter Add WiFi SAR table for felwinter. BUG=b:206901900 TEST=emerge-brya chromeos-config chromeos-config-bsp-private coreboot-private-files-baseboard-brya coreboot chromeos-bootimage and checked SAR table can load by WiFi driver. Signed-off-by: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Change-Id: I0de710f4447302ee545a67cbd79373bdd2077637 --- M src/mainboard/google/brya/Kconfig.name M src/mainboard/google/brya/variants/felwinter/variant.c 2 files changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/59718/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/59718 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0de710f4447302ee545a67cbd79373bdd2077637 Gerrit-Change-Number: 59718 Gerrit-PatchSet: 5 Gerrit-Owner: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/felwinter: Add Wifi SAR for felwinter
by EricR Lai (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Ian Feng, Tim Wawrzynczak. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59718 ) Change subject: mb/google/brya/var/felwinter: Add Wifi SAR for felwinter ...................................................................... Patch Set 4: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59718/comment/efe42b3d_068f5def PS4, Line 7: mb/google/brya/var/felwinter: Add Wifi SAR for felwinter WiFi SAR table https://review.coreboot.org/c/coreboot/+/59718/comment/5c1f49a7_ede21e6d PS4, Line 12: TEST=emerge-brya chromeos-config chromeos-config-bsp-private checked SAR table can load by WiFi driver. -- To view, visit https://review.coreboot.org/c/coreboot/+/59718 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0de710f4447302ee545a67cbd79373bdd2077637 Gerrit-Change-Number: 59718 Gerrit-PatchSet: 4 Gerrit-Owner: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Tue, 30 Nov 2021 09:16:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/felwinter: Add Wifi SAR for felwinter
by Ian Feng (Code Review) 30 Nov '21

30 Nov '21

Attention is currently required from: Tim Wawrzynczak, EricR Lai. Ian Feng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59718 ) Change subject: mb/google/brya/var/felwinter: Add Wifi SAR for felwinter ...................................................................... Patch Set 4: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/59718 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0de710f4447302ee545a67cbd79373bdd2077637 Gerrit-Change-Number: 59718 Gerrit-PatchSet: 4 Gerrit-Owner: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 30 Nov 2021 09:14:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2021