coreboot-gerrit November 2021

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Change in coreboot[master]: Kconfig,soc/amd/cezanne: Make COOP_MULTITASKING select TIMER_QUEUE
by Raul Rangel (Code Review) 02 Nov '21

02 Nov '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58860 ) Change subject: Kconfig,soc/amd/cezanne: Make COOP_MULTITASKING select TIMER_QUEUE ...................................................................... Kconfig,soc/amd/cezanne: Make COOP_MULTITASKING select TIMER_QUEUE This reduces the number of selects required in the SOC_SPECIFIC_OPTIONS. BUG=b:179699789 TEST=Build guybrush Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: I7f1364fc269ea5ec17982bf750a164a3290adb0e --- M src/Kconfig M src/soc/amd/cezanne/Kconfig 2 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/58860/1 diff --git a/src/Kconfig b/src/Kconfig index be269b6..9b28dfc 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -677,10 +677,11 @@ config COOP_MULTITASKING def_bool n - depends on TIMER_QUEUE && ARCH_X86 && CPU_INFO_V2 + select TIMER_QUEUE + depends on ARCH_X86 && CPU_INFO_V2 help Cooperative multitasking allows callbacks to be multiplexed on the - main thread of ramstage. With this enabled it allows for multiple + main thread. With this enabled it allows for multiple execution paths to take place when they have udelay() calls within their code. diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index c2423cd..b9b7c70 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -73,7 +73,6 @@ select SOC_AMD_COMMON_FSP_DMI_TABLES select SOC_AMD_COMMON_FSP_PCI select SSE2 - select TIMER_QUEUE select UDK_2017_BINDING select X86_AMD_FIXED_MTRRS select X86_AMD_INIT_SIPI -- To view, visit https://review.coreboot.org/c/coreboot/+/58860 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7f1364fc269ea5ec17982bf750a164a3290adb0e Gerrit-Change-Number: 58860 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/cezanne: Start preloading VGA_BIOS_FILE
by Raul Rangel (Code Review) 02 Nov '21

02 Nov '21

Attention is currently required from: Jason Glenesk, Furquan Shaikh, Marshall Dawson, Karthik Ramasubramanian, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Furquan Shaikh, Marshall Dawson, Karthik Ramasubramanian, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56582 to look at the new patch set (#5). Change subject: soc/amd/cezanne: Start preloading VGA_BIOS_FILE ...................................................................... soc/amd/cezanne: Start preloading VGA_BIOS_FILE This CL enables support for CBFS_PRELOAD and starts preloading the VGA_BIOS_FILE. The CBFS_SIZE was chosen because I will preload ramstage in follow up CLs and wanted it large enough to hold it. BUG=b:179699789 TEST=Boot guybrush to OS and see 12 ms reduction in boot time. Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: Idc96299ee0186470df0ff113ecacb604a877f6ad --- M src/soc/amd/cezanne/Kconfig M src/soc/amd/cezanne/fsp_s_params.c 2 files changed, 16 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/56582/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/56582 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc96299ee0186470df0ff113ecacb604a877f6ad Gerrit-Change-Number: 56582 Gerrit-PatchSet: 5 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: device/pci_rom: Add vga_oprom_preload
by Raul Rangel (Code Review) 02 Nov '21

02 Nov '21

Attention is currently required from: Raul Rangel, Furquan Shaikh, Karthik Ramasubramanian. Hello build bot (Jenkins), Furquan Shaikh, Julius Werner, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56581 to look at the new patch set (#7). Change subject: device/pci_rom: Add vga_oprom_preload ...................................................................... device/pci_rom: Add vga_oprom_preload This method will allow preloading the VGA_BIOS_FILE. By preloading the file, into cbfs_cache we reduce boot time. In the future we can also add support for loading the second VGA_BIOS_FILE and the DGPU VGA_BIOS_FILE. BUG=b:179699789 TEST=Boot guybrush to OS and verify 12 ms reduction in boot time Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: Icb54fe3a942e9507ff6f1173ba5620a8f4ce6549 --- M src/device/pci_rom.c M src/include/device/pci_rom.h 2 files changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/56581/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/56581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icb54fe3a942e9507ff6f1173ba5620a8f4ce6549 Gerrit-Change-Number: 56581 Gerrit-PatchSet: 7 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/stoneyridge/cpu: remove unneeded line break in get_cpu_count
by Raul Rangel (Code Review) 02 Nov '21

02 Nov '21

Attention is currently required from: Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58858 ) Change subject: soc/amd/stoneyridge/cpu: remove unneeded line break in get_cpu_count ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58858 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a8fb472f00e039f25a71ee526a3dd0bc6c754f6 Gerrit-Change-Number: 58858 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 02 Nov 2021 17:45:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC] soc/amd/*/cpu: handle mp_init_with_smm failure
by Raul Rangel (Code Review) 02 Nov '21

02 Nov '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58859 ) Change subject: [RFC] soc/amd/*/cpu: handle mp_init_with_smm failure ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifeadffb3bae749c4bbd7ad2f3f395201e67d9e28 Gerrit-Change-Number: 58859 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 02 Nov 2021 17:44:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: vc/amd/agesa: fix out-of-bounds read
by Marshall Dawson (Code Review) 02 Nov '21

02 Nov '21

Attention is currently required from: Bao Zheng, Jason Glenesk, Jason Nein, Matt Papageorge, Felix Held. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58803 ) Change subject: vc/amd/agesa: fix out-of-bounds read ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/58803/comment/346a278a_6530cb19 PS3, Line 10: > Should add a pointer to issue tracker which can get event in coreboot gerrit. […] These are for Trinity and Kabini, so that bug is unrelated. -- To view, visit https://review.coreboot.org/c/coreboot/+/58803 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01e134cb6b025bf7cb5030cd9378297d7f6df509 Gerrit-Change-Number: 58803 Gerrit-PatchSet: 3 Gerrit-Owner: Jason Nein <finaljason(a)gmail.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Nein <finaljason(a)gmail.com> Gerrit-Attention: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 02 Nov 2021 17:40:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: util/crossgcc/Makefile: Clean up .PHONY definitions
by Felix Held (Code Review) 02 Nov '21

02 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58796 ) Change subject: util/crossgcc/Makefile: Clean up .PHONY definitions ...................................................................... util/crossgcc/Makefile: Clean up .PHONY definitions Order functionally: * first "all" and build-$tools * followed by clean * followed by the architecture targets The order was chosen this way because the architecture targets are the mostly likely to continue to grow. While at it, also fix the build_nasm mention (it was build-nasm) and add build_make. Change-Id: Id58338a512d44111b41503d4c14c08be50d51cde Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58796 Reviewed-by: Martin Roth <martinroth(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M util/crossgcc/Makefile 1 file changed, 5 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved diff --git a/util/crossgcc/Makefile b/util/crossgcc/Makefile index 34fb244..288861b 100644 --- a/util/crossgcc/Makefile +++ b/util/crossgcc/Makefile @@ -68,8 +68,9 @@ distclean: clean rm -rf tarballs -.PHONY: build_gcc build_iasl build_clang all \ - build-i386 build-x64 build-arm \ - build-aarch64 build-riscv build-ppc64 build-nds32le build-nasm \ - clean distclean clean_tempfiles +.PHONY: all build_gcc build_iasl build_clang build_make build_nasm \ + clean distclean clean_tempfiles \ + build-i386 build-x64 build-arm build-aarch64 \ + build-riscv build-ppc64 build-nds32le + .NOTPARALLEL: -- To view, visit https://review.coreboot.org/c/coreboot/+/58796 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id58338a512d44111b41503d4c14c08be50d51cde Gerrit-Change-Number: 58796 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: [RFC] soc/amd/*/cpu: handle mp_init_with_smm failure
by Felix Held (Code Review) 02 Nov '21

02 Nov '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58859 ) Change subject: [RFC] soc/amd/*/cpu: handle mp_init_with_smm failure ...................................................................... Patch Set 1: (1 comment) File src/soc/amd/cezanne/cpu.c: https://review.coreboot.org/c/coreboot/+/58859/comment/31e9f0c6_4a34e54c PS1, Line 55: die > Can you die with a post code? good point; done. -- To view, visit https://review.coreboot.org/c/coreboot/+/58859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifeadffb3bae749c4bbd7ad2f3f395201e67d9e28 Gerrit-Change-Number: 58859 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Comment-Date: Tue, 02 Nov 2021 17:33:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC] soc/amd/*/cpu: handle mp_init_with_smm failure
by Felix Held (Code Review) 02 Nov '21

02 Nov '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58859 to look at the new patch set (#2). Change subject: [RFC] soc/amd/*/cpu: handle mp_init_with_smm failure ...................................................................... [RFC] soc/amd/*/cpu: handle mp_init_with_smm failure When the mp_init_with_smm call returns a failure, coreboot can't just continue with the initialization and boot process due to the system being in a bad state. Ignoring the failure here will just cause the boot process failing elsewhere where it may not be obvious that the failed multi-processor initialization step was the root cause of that. I'm not 100% sure if calling do_cold_reset or calling die_with_post_code is the better option here. Calling do_cold_reset likely here would likely result in a boot-failure loop, so I call die_with_post_code here. BUG=b:193809448 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ifeadffb3bae749c4bbd7ad2f3f395201e67d9e28 --- M src/soc/amd/cezanne/cpu.c M src/soc/amd/picasso/cpu.c M src/soc/amd/stoneyridge/cpu.c 3 files changed, 9 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/58859/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifeadffb3bae749c4bbd7ad2f3f395201e67d9e28 Gerrit-Change-Number: 58859 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: SMBIOS/SCONFIG: Allow devtree-defined Type 41 entries
by Nico Huber (Code Review) 02 Nov '21

02 Nov '21

Attention is currently required from: Martin Roth, Furquan Shaikh, Paul Menzel, Angel Pons, Arthur Heymans, Patrick Rudolph. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57370 ) Change subject: SMBIOS/SCONFIG: Allow devtree-defined Type 41 entries ...................................................................... Patch Set 6: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57370/comment/74c9c3ff_a1cb6f58 PS4, Line 35: Although the preprocessor usage isn't particularly elegant, adjusting : the devicetree syntax and/or grammar depending on a Kconfig option is : probably even worse. > similar to the linked list of PCIe capabilities? Not sure if I follow. Do you mean the PCI config-space thing? Looking at `struct device`, something similar to the `resource_list` but not specific to a single data type. -- To view, visit https://review.coreboot.org/c/coreboot/+/57370 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iecca9ada6ee1000674cb5dd7afd5c309d8e1a64b Gerrit-Change-Number: 57370 Gerrit-PatchSet: 6 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 02 Nov 2021 17:14:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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coreboot-gerrit November 2021