coreboot-gerrit November 2021

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Change in edk2[coreboot-stable202108]: MdeModulePkg: load boot logo into BGRT table
by Patrick Rudolph (Code Review) 03 Nov '21

03 Nov '21

Attention is currently required from: Matt DeVillier. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/edk2/+/58786 ) Change subject: MdeModulePkg: load boot logo into BGRT table ...................................................................... Patch Set 5: Code-Review+1 (1 comment) Patchset: PS5: EDK2 master has code to populate ACPI tables using the tables already in RAM created by coreboot. This patch is only necessary until the next rebase on stable upstream. Please add *deprecated* in the commit message, so that this will be removed on the next rebase. -- To view, visit https://review.coreboot.org/c/edk2/+/58786 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: edk2 Gerrit-Branch: coreboot-stable202108 Gerrit-Change-Id: I726fd7a9deb9ba5f8e351ce24834fc627acc4542 Gerrit-Change-Number: 58786 Gerrit-PatchSet: 5 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Wed, 03 Nov 2021 06:59:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/prodrive/hermes: Configure pink rear vref based on eeprom
by Patrick Rudolph (Code Review) 03 Nov '21

03 Nov '21

Attention is currently required from: Christian Walter, Arthur Heymans. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58879 ) Change subject: mb/prodrive/hermes: Configure pink rear vref based on eeprom ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/58879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa11ba9c74f643e94046d4983fbce65dbedd1025 Gerrit-Change-Number: 58879 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 03 Nov 2021 06:56:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/redrix: Set RFI Spread Spectrum to 6%
by Chen Wisley (Code Review) 03 Nov '21

03 Nov '21

Attention is currently required from: Wisley Chen. Hello Wisley Chen, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/58880 to review the following change. Change subject: mb/google/brya/var/redrix: Set RFI Spread Spectrum to 6% ...................................................................... mb/google/brya/var/redrix: Set RFI Spread Spectrum to 6% Set RFI Spread Spectrum to 6% for RF team request. BUG=b:200886627 TEST=build Signed-off-by: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Change-Id: Id0b42446e9e46ef629b5ca8d5d29faf2d771348d --- M src/mainboard/google/brya/variants/redrix/overridetree.cb 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/58880/1 diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index 0ed6c52..4e6475f 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -34,6 +34,8 @@ register "SaGv" = "SaGv_Enabled" register "CnviBtAudioOffload" = "true" + # FIVR RFI Spread Spectrum 6% + register "register "FivrSpreadSpectrum" = "44" # Intel Common SoC Config #+-------------------+---------------------------+ -- To view, visit https://review.coreboot.org/c/coreboot/+/58880 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id0b42446e9e46ef629b5ca8d5d29faf2d771348d Gerrit-Change-Number: 58880 Gerrit-PatchSet: 1 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/prodrive/hermes: Configure pink rear vref based on eeprom
by build bot (Jenkins) (Code Review) 03 Nov '21

03 Nov '21

Attention is currently required from: Patrick Rudolph, Christian Walter. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58879 ) Change subject: mb/prodrive/hermes: Configure pink rear vref based on eeprom ...................................................................... Patch Set 1: (1 comment) File src/mainboard/prodrive/hermes/variants/r04/hda_verb.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132134): https://review.coreboot.org/c/coreboot/+/58879/comment/5275dd84_3baf8c24 PS1, Line 82: const u32 internal_config = get_internal_audio_cfg(board_cfg->internal_audio_connection); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/58879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa11ba9c74f643e94046d4983fbce65dbedd1025 Gerrit-Change-Number: 58879 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Comment-Date: Wed, 03 Nov 2021 06:44:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/prodrive/hermes: Configure pink rear vref based on eeprom
by Arthur Heymans (Code Review) 03 Nov '21

03 Nov '21

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58879 ) Change subject: mb/prodrive/hermes: Configure pink rear vref based on eeprom ...................................................................... mb/prodrive/hermes: Configure pink rear vref based on eeprom Change-Id: Iaa11ba9c74f643e94046d4983fbce65dbedd1025 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h M src/mainboard/prodrive/hermes/variants/r04/hda_verb.c 2 files changed, 24 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/58879/1 diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h b/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h index 9ec4604..f64a23a 100644 --- a/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h +++ b/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h @@ -49,12 +49,13 @@ uint8_t blue_rear_vref; uint8_t internal_audio_connection; uint8_t pxe_boot_capability; + uint8_t pink_rear_vref; }; - uint8_t raw_settings[9]; + uint8_t raw_settings[10]; }; }; -_Static_assert(sizeof(struct eeprom_board_settings) == (9 + sizeof(uint32_t)), +_Static_assert(sizeof(struct eeprom_board_settings) == (10 + sizeof(uint32_t)), "struct eeprom_board_settings has invalid size!"); struct __packed eeprom_bmc_settings { diff --git a/src/mainboard/prodrive/hermes/variants/r04/hda_verb.c b/src/mainboard/prodrive/hermes/variants/r04/hda_verb.c index f9a3cb3..8eeecda 100644 --- a/src/mainboard/prodrive/hermes/variants/r04/hda_verb.c +++ b/src/mainboard/prodrive/hermes/variants/r04/hda_verb.c @@ -52,6 +52,23 @@ } } +static u32 get_pink_audio_cfg(uint8_t pink_rear_vref) +{ + switch (pink_rear_vref) { + default: + case 0: + return 0x411110F0; /* Disabled (Hi-Z) */ + case 1: + return 0x411111f0; /* 50% of LDO out */ + case 2: + return 0x411114f0; /* 80% of LDO out */ + case 3: + return 0x411115f0; /* 100% of LDO out */ + case 4: + return 0x411112f0; /* Ground */ + } +} + void mainboard_r0x_configure_alc888(u8 *base, u32 viddid) { /* Overwrite settings made by baseboard */ @@ -62,10 +79,12 @@ if (!board_cfg) return; - const u32 config = get_internal_audio_cfg(board_cfg->internal_audio_connection); + const u32 internal_config = get_internal_audio_cfg(board_cfg->internal_audio_connection); + const u32 pink_config = get_pink_audio_cfg(board_cfg->pink_rear_vref); const u32 verbs[] = { - AZALIA_PIN_CFG(0, 0x1b, config), + AZALIA_PIN_CFG(0, 0x12, pink_config), + AZALIA_PIN_CFG(0, 0x1b, internal_config), 0x0205000d, /* Pin 37 vrefo hidden register - used as port C vref */ get_port_c_vref_cfg(board_cfg->blue_rear_vref), }; -- To view, visit https://review.coreboot.org/c/coreboot/+/58879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa11ba9c74f643e94046d4983fbce65dbedd1025 Gerrit-Change-Number: 58879 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: amdfwtool: Call the set_efs_table for Stoneyridge
by Bao Zheng (Code Review) 03 Nov '21

03 Nov '21

Attention is currently required from: Martin Roth, Marshall Dawson, Richard Spiegel, Zheng Bao, Matt Papageorge. Hello Martin Roth, Marshall Dawson, Richard Spiegel, Zheng Bao, Matt Papageorge, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58871 to look at the new patch set (#2). Change subject: amdfwtool: Call the set_efs_table for Stoneyridge ...................................................................... amdfwtool: Call the set_efs_table for Stoneyridge Related to https://review.coreboot.org/c/coreboot/+/58555 Need to test if it works on Stoneyridge platform Change-Id: I24499ff6daf7878b12b6044496f53379116c598f Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/stoneyridge/Makefile.inc M util/amdfwtool/amdfwtool.c 2 files changed, 12 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/58871/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58871 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24499ff6daf7878b12b6044496f53379116c598f Gerrit-Change-Number: 58871 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Zheng Bao Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Enable Intel FIVR RFI settings
by Chen Wisley (Code Review) 03 Nov '21

03 Nov '21

Attention is currently required from: Chen Wisley, Tim Wawrzynczak, Wisley Chen, Patrick Rudolph. Hello build bot (Jenkins), Tim Wawrzynczak, Wisley Chen, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58878 to look at the new patch set (#3). Change subject: soc/intel/alderlake: Enable Intel FIVR RFI settings ...................................................................... soc/intel/alderlake: Enable Intel FIVR RFI settings Add RFI UPD settings to mitigate RFI noise issues and exporting these UPDs to override via board devicetree. BUG=b:200886627 TEST=build Change-Id: I37bfef295fcd886d4f01abd40f9467a0791e9e34 Signed-off-by: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> --- M src/soc/intel/alderlake/chip.h M src/soc/intel/alderlake/fsp_params.c 2 files changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/58878/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/58878 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37bfef295fcd886d4f01abd40f9467a0791e9e34 Gerrit-Change-Number: 58878 Gerrit-PatchSet: 3 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Enable Intel FIVR RFI settings
by build bot (Jenkins) (Code Review) 03 Nov '21

03 Nov '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58878 ) Change subject: soc/intel/alderlake: Enable Intel FIVR RFI settings ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/alderlake/chip.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132131): https://review.coreboot.org/c/coreboot/+/58878/comment/b7e43547_23b9fa95 PS2, Line 510: * Range: 0.5%, 1%, 1.5%, 2%, 3%, 4%, 5%, 6%. trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/58878 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37bfef295fcd886d4f01abd40f9467a0791e9e34 Gerrit-Change-Number: 58878 Gerrit-PatchSet: 2 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 03 Nov 2021 05:53:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Enable Intel FIVR RFI settings
by Chen Wisley (Code Review) 03 Nov '21

03 Nov '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. Hello Tim Wawrzynczak, Wisley Chen, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58878 to look at the new patch set (#2). Change subject: soc/intel/alderlake: Enable Intel FIVR RFI settings ...................................................................... soc/intel/alderlake: Enable Intel FIVR RFI settings Add RFI UPD settings to mitigate RFI noise issues and exporting these UPDs to override via board devicetree. BUG=b:200886627 TEST=build Change-Id: I37bfef295fcd886d4f01abd40f9467a0791e9e34 Signed-off-by: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> --- M src/soc/intel/alderlake/chip.h M src/soc/intel/alderlake/fsp_params.c 2 files changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/58878/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58878 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37bfef295fcd886d4f01abd40f9467a0791e9e34 Gerrit-Change-Number: 58878 Gerrit-PatchSet: 2 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Enable Intel FIVR RFI settings
by build bot (Jenkins) (Code Review) 03 Nov '21

03 Nov '21

Attention is currently required from: Tim Wawrzynczak, Wisley Chen, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58878 ) Change subject: soc/intel/alderlake: Enable Intel FIVR RFI settings ...................................................................... Patch Set 1: (3 comments) File src/soc/intel/alderlake/chip.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132130): https://review.coreboot.org/c/coreboot/+/58878/comment/e5221d19_2ba08940 PS1, Line 510: * Range: 0.5%, 1%, 1.5%, 2%, 3%, 4%, 5%, 6%. Each Range is translated to an encoded value for FIVR register. line over 96 characters File src/soc/intel/alderlake/fsp_params.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132130): https://review.coreboot.org/c/coreboot/+/58878/comment/b6c63722_a6634aa4 PS1, Line 735: const struct soc_intel_alderlake_config *config) code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132130): https://review.coreboot.org/c/coreboot/+/58878/comment/6940e128_345eadbc PS1, Line 735: const struct soc_intel_alderlake_config *config) please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/58878 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37bfef295fcd886d4f01abd40f9467a0791e9e34 Gerrit-Change-Number: 58878 Gerrit-PatchSet: 1 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 03 Nov 2021 05:47:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2021