coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in blobs[master]: mb/teleplatforms/D4E4S168: Add blobs
by Дмитрий Понаморев (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Paul Menzel, Angel Pons, Arthur Heymans, Kyösti Mälkki. Дмитрий Понаморев has posted comments on this change. ( https://review.coreboot.org/c/blobs/+/57196 ) Change subject: mb/teleplatforms/D4E4S168: Add blobs ...................................................................... Patch Set 7: (7 comments) Commit Message: https://review.coreboot.org/c/blobs/+/57196/comment/265124b9_f01b5ca8 PS4, Line 7: 3rdparty/blobs/mainboard/teleplatforms/D4E4S16P8 > Maybe: […] Done https://review.coreboot.org/c/blobs/+/57196/comment/1df78200_d63adcb7 PS4, Line 7: 3rdparty/blobs/mainboard/teleplatforms/D4E4S16P8: Create new folder for teleplatforms/D4E4S16P8 CRB. > No dot/period at the end of commit message summaries please [1]. […] Done https://review.coreboot.org/c/blobs/+/57196/comment/313c1cf8_c0708e92 PS4, Line 9: compile > build Done https://review.coreboot.org/c/blobs/+/57196/comment/fa8ed1be_664f35df PS4, Line 11: > Blobs must be accompanied by a distribution license, which must allow unlimited redistribution. […] Done Patchset: PS4: > Maybe also list the versions of the other components (ME, FSP, …). Done File mainboard/teleplatforms/D4E4S16P8/README.md: https://review.coreboot.org/c/blobs/+/57196/comment/b9ea6a45_8f03ecf7 PS5, Line 1: contens > typo: conten*t*s Done File mainboard/teleplatforms/D4E4S16P8/bootorder: https://review.coreboot.org/c/blobs/+/57196/comment/9cacdef9_021b87db PS5, Line 1: /pci@i0cf8/usb@15/usb-*@1 : /pci@i0cf8/usb@15/usb-*@2 : /pci@i0cf8/usb@15/usb-*@3 : /pci@i0cf8/usb@15/usb-*@4 : /pci@i0cf8/*@13/drive@1/disk@0 : /pci@i0cf8/*@13/drive@3/disk@0 > +1, I agree this can be in the mainboard directory Done -- To view, visit https://review.coreboot.org/c/blobs/+/57196 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: blobs Gerrit-Branch: master Gerrit-Change-Id: I71de576aa283fe6738138ad023d70c282045f5cc Gerrit-Change-Number: 57196 Gerrit-PatchSet: 7 Gerrit-Owner: Дмитрий Понаморев <dponamorev(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:16:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: security/intel/txt: Allow to set TXT BIOS Data Region version
by Paul Menzel (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Michał Żygowski. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59513 ) Change subject: security/intel/txt: Allow to set TXT BIOS Data Region version ...................................................................... Patch Set 2: (1 comment) File src/security/intel/txt/Kconfig: https://review.coreboot.org/c/coreboot/+/59513/comment/320b030f_3d29f2c2 PS2, Line 49: older Trusted Boot version Can you give a specific version? -- To view, visit https://review.coreboot.org/c/coreboot/+/59513 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic2550bd4008559bd47de9e35f8b1c7b52e6e0f5f Gerrit-Change-Number: 59513 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:15:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/thermal: Refactor thermal block to improve reusability
by Subrata Banik (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59509 ) Change subject: soc/intel/common/thermal: Refactor thermal block to improve reusability ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/common/block/thermal/Kconfig: https://review.coreboot.org/c/coreboot/+/59509/comment/ef8dc8d6_b265a8a8 PS4, Line 7: config SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV : bool : default n : select SOC_INTEL_COMMON_BLOCK_THERMAL : help : This option allows to configure PCH thermal registers using Thermal PCI device : for chipsets till Ice Lake PCH. : : config SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC : bool : default n : select SOC_INTEL_COMMON_BLOCK_THERMAL : help : This option allows to configure PCH thermal registers using PMC PWRMBASE : for chipsets since Tiger Lake PCH. > You can just use the if SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV and set another default = n. @Eric, can you please help me to understand this little better. -- To view, visit https://review.coreboot.org/c/coreboot/+/59509 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14df5145629ef03f358b98e824bca6a5b8ebdfc6 Gerrit-Change-Number: 59509 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:15:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subi.banik(a)gmail.com> Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: nb/intel/sandybridge: Add support for DPR
by Paul Menzel (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Michał Żygowski. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59512 ) Change subject: nb/intel/sandybridge: Add support for DPR ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59512/comment/6c7e5138_16ea27cf PS2, Line 11: Maybe paste the new debug log line from the running system in TEST=. -- To view, visit https://review.coreboot.org/c/coreboot/+/59512 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia22e49ba58709acfa0afe0921aa71d83cc06c129 Gerrit-Change-Number: 59512 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:14:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in blobs[master]: mb/teleplatforms/D4E4S168: Add blobs
by Дмитрий Понаморев (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Дмитрий Понаморев, Paul Menzel, Arthur Heymans, Kyösti Mälkki. Hello Kyösti Mälkki, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/blobs/+/57196 to look at the new patch set (#7). Change subject: mb/teleplatforms/D4E4S168: Add blobs ...................................................................... mb/teleplatforms/D4E4S168: Add blobs These files are required to build a complete BIOS image for the teleplatforms/D4E4S16P8 motherboard. Change-Id: I71de576aa283fe6738138ad023d70c282045f5cc Signed-off-by: Dmitry Ponamorev <dponamorev(a)gmail.com> --- A mainboard/teleplatforms/D4E4S16P8/DNV_LAN0_SGMII_MRVL_noMNG_2p10_80000BD8.bin A mainboard/teleplatforms/D4E4S16P8/DNV_LAN1_SFI_noMNG_2p10_80000C01.bin A mainboard/teleplatforms/D4E4S16P8/FSP_M.rom A mainboard/teleplatforms/D4E4S16P8/FSP_S.rom A mainboard/teleplatforms/D4E4S16P8/FSP_T.rom A mainboard/teleplatforms/D4E4S16P8/Intel_Proprietary_License.pdf A mainboard/teleplatforms/D4E4S16P8/README.md A mainboard/teleplatforms/D4E4S16P8/aspeed_release.txt A mainboard/teleplatforms/D4E4S16P8/descriptor.bin A mainboard/teleplatforms/D4E4S16P8/me.bin A mainboard/teleplatforms/D4E4S16P8/pci1a03,2000.rom 11 files changed, 434 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/blobs refs/changes/96/57196/7 -- To view, visit https://review.coreboot.org/c/blobs/+/57196 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: blobs Gerrit-Branch: master Gerrit-Change-Id: I71de576aa283fe6738138ad023d70c282045f5cc Gerrit-Change-Number: 57196 Gerrit-PatchSet: 7 Gerrit-Owner: Дмитрий Понаморев <dponamorev(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Дмитрий Понаморев <dponamorev(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: nb/intel/sandybridge/romstage.c: Configure DPR and initialize TXT
by Michał Żygowski (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Angel Pons, Patrick Rudolph. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59523 ) Change subject: nb/intel/sandybridge/romstage.c: Configure DPR and initialize TXT ...................................................................... Patch Set 3: (3 comments) File src/northbridge/intel/sandybridge/romstage.c: https://review.coreboot.org/c/coreboot/+/59523/comment/ce10d10e_86e62625 PS2, Line 78: #if CONFIG(INTEL_TXT) > Please don't add weak symbols. Just look at what Haswell code does. […] What about compiling the TXT romstage part always? Then we could get rid of redundant MSR writing. File src/northbridge/intel/sandybridge/romstage.c: https://review.coreboot.org/c/coreboot/+/59523/comment/fcb0890c_a049f706 PS3, Line 28: #if CONFIG(INTEL_TXT) > Is this guard needed? Actually not, we can always configure the DPR https://review.coreboot.org/c/coreboot/+/59523/comment/6e39c371_da7ac295 PS3, Line 36: pci_write_config32(HOST_BRIDGE, DPR, dpr.raw); > Where does dpr. […] dpr.top is updated by hardware and points to TSEG base -- To view, visit https://review.coreboot.org/c/coreboot/+/59523 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b912f121593fa55c11813262f09be1a1055e950 Gerrit-Change-Number: 59523 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:11:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/genesyslogic/gl9750: Add driver for Genesys Logic GL9750
by Paul Menzel (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Ben Chuang, Tim Wawrzynczak. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59429 ) Change subject: drivers/genesyslogic/gl9750: Add driver for Genesys Logic GL9750 ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59429 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6d60cef41baade7457a159d3ce2f8d2e6b66e71c Gerrit-Change-Number: 59429 Gerrit-PatchSet: 2 Gerrit-Owner: Ben Chuang <benchuanggli(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Greg Tu <greg.tu(a)genesyslogic.com.tw> Gerrit-CC: HsuanYang Chen <ynop77(a)gmail.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Ben Chuang <benchuanggli(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:11:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/bugzzy: Pick the config VBOOT_ALWAYS_ENABLE_DISPLAY
by Paul Menzel (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: shkim, Simon Yang, Edward Doan. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59534 ) Change subject: mb/google/dedede/var/bugzzy: Pick the config VBOOT_ALWAYS_ENABLE_DISPLAY ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59534/comment/b0b752d3_6fcf7054 PS1, Line 14: This change picks the config VBOOT_ALWAYS_ENABLE_DISPLAY for buggzy to Please add a blank line above to separate the paragrahps. https://review.coreboot.org/c/coreboot/+/59534/comment/af882029_56efca8b PS1, Line 15: It will take additional boot : time. Please document how much exactly. -- To view, visit https://review.coreboot.org/c/coreboot/+/59534 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I133b91ff24ce665351a25fd9e0f85db998a6dfed Gerrit-Change-Number: 59534 Gerrit-PatchSet: 1 Gerrit-Owner: shkim <sh_.kim(a)samsung.com> Gerrit-Reviewer: Edward Doan <edoan(a)google.com> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: shkim <sh_.kim(a)samsung.com> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Attention: Edward Doan <edoan(a)google.com> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:09:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/gimble: Configure Acoustic noise mitigation
by Paul Menzel (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: YH Lin, Tim Wawrzynczak, Mark Hsieh, Zhuohao Lee, Felix Held. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59535 ) Change subject: mb/google/brya/var/gimble: Configure Acoustic noise mitigation ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59535/comment/083a86f4_24049e2a PS1, Line 10: - Set slow slew rate VCCIA and VCCGT to 16 Why? Where did you get the value from? -- To view, visit https://review.coreboot.org/c/coreboot/+/59535 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2be3d30403284b98276c837adefd91aa62c971e4 Gerrit-Change-Number: 59535 Gerrit-PatchSet: 1 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:07:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add ADLP 4+4+2 power configurations
by Paul Menzel (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Curtis Chen, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59483 ) Change subject: soc/intel/alderlake: Add ADLP 4+4+2 power configurations ...................................................................... Patch Set 4: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59483/comment/cbc9eecf_c00200f3 PS4, Line 9: exist existing https://review.coreboot.org/c/coreboot/+/59483/comment/4a6e6791_cfcb6924 PS4, Line 10: related settings. In what datasheet is that documented? -- To view, visit https://review.coreboot.org/c/coreboot/+/59483 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieba738a8ad3da5ae0a115feaa275b997a219d731 Gerrit-Change-Number: 59483 Gerrit-PatchSet: 4 Gerrit-Owner: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:06:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2021