coreboot-gerrit November 2021

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Change in coreboot[master]: mb/google/dedede/var/bugzzy: Configure Acoustic noise mitigation UPDs
by Felix Held (Code Review) 22 Nov '21

22 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59480 ) Change subject: mb/google/dedede/var/bugzzy: Configure Acoustic noise mitigation UPDs ...................................................................... mb/google/dedede/var/bugzzy: Configure Acoustic noise mitigation UPDs Enable Acoustic noise mitigation for bugzzy and set slew rate to 1/8 which is calibrated value for the board. BUG=b:207046230 BRANCH=dedede TEST=build firmware to UPD and Acoustic noise test Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com> Change-Id: Id249a143efb9bce70f48fb466fed42e766a10937 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59480 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/dedede/variants/bugzzy/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved diff --git a/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb b/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb index e1318a8..de1e46d 100644 --- a/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb +++ b/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb @@ -2,6 +2,12 @@ # MIPI display panel register "DdiPortAConfig" = "2" # DdiPortMipiDsi + # Enable Acoustic noise mitigation and set slew rate to 1/8 + # Rest of the parameters are 0 by default. + register "AcousticNoiseMitigation" = "1" + register "SlowSlewRate" = "SlewRateFastBy8" + register "FastPkgCRampDisable" = "1" + # Disable PCIe Root Port 8 (index 7) register "PcieRpEnable[7]" = "0" # Disable PCIe Clock Source 4 (index 3) -- To view, visit https://review.coreboot.org/c/coreboot/+/59480 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id249a143efb9bce70f48fb466fed42e766a10937 Gerrit-Change-Number: 59480 Gerrit-PatchSet: 2 Gerrit-Owner: shkim <sh_.kim(a)samsung.com> Gerrit-Reviewer: Edward Doan <edoan(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS
by Felix Held (Code Review) 22 Nov '21

22 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52800 ) Change subject: soc/intel: Allow enable/disable ME via CMOS ...................................................................... soc/intel: Allow enable/disable ME via CMOS Add .enable method that will set the CSME state. The state is based on the new CMOS option me_state, with values of 0 and 1. The method is very stable when switching between different firmware platforms. This method should not be used in combination with USE_ME_CLEANER. State 1 will result in: ME: Current Working State : 4 ME: Current Operation State : 1 ME: Current Operation Mode : 3 ME: Error Code : 2 State 0 will result in: ME: Current Working State : 5 ME: Current Operation State : 1 ME: Current Operation Mode : 0 ME: Error Code : 0 Tested on: KBL-R: i7-8550u CML: i3-10110u, i7-10710u TGL: i3-1110G4, i7-1165G7 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I374db3b7c0ded71cdc18f27970252fec7220cc20 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52800 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Crawford <tcrawford(a)system76.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 170 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved Tim Crawford: Looks good to me, but someone else must approve diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index f37ff95..b46d3e4 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -11,13 +11,17 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <intelblocks/cse.h> +#include <limits.h> +#include <option.h> #include <security/vboot/misc.h> #include <security/vboot/vboot_common.h> +#include <soc/intel/common/reset.h> #include <soc/iomap.h> #include <soc/pci_devs.h> #include <soc/me.h> #include <string.h> #include <timer.h> +#include <types.h> #define MAX_HECI_MESSAGE_RETRY_COUNT 5 @@ -961,12 +965,167 @@ #if ENV_RAMSTAGE +/* + * Disable the Intel (CS)Management Engine via HECI based on a cmos value + * of `me_state`. A value of `0` will result in a (CS)ME state of `0` (working) + * and value of `1` will result in a (CS)ME state of `3` (disabled). + * + * It isn't advised to use this in combination with me_cleaner. + * + * It is advisable to have a second cmos option called `me_state_counter`. + * Whilst not essential, it avoid reboots loops if the (CS)ME fails to + * change states after 3 attempts. Some versions of the (CS)ME need to be + * reset 3 times. + * + * Ideal cmos values would be: + * + * # coreboot config options: cpu + * 432 1 e 5 me_state + * 440 4 h 0 me_state_counter + * + * #ID value text + * 5 0 Enable + * 5 1 Disable + */ + +static void me_reset_with_count(void) +{ + unsigned int cmos_me_state_counter = get_uint_option("me_state_counter", UINT_MAX); + + if (cmos_me_state_counter != UINT_MAX) { + printk(BIOS_DEBUG, "CMOS: me_state_counter = %u\n", cmos_me_state_counter); + /* Avoid boot loops by only trying a state change 3 times */ + if (cmos_me_state_counter < ME_DISABLE_ATTEMPTS) { + cmos_me_state_counter++; + set_uint_option("me_state_counter", cmos_me_state_counter); + printk(BIOS_DEBUG, "ME: Reset attempt %u/%u.\n", cmos_me_state_counter, + ME_DISABLE_ATTEMPTS); + do_global_reset(); + } else { + /* + * If the (CS)ME fails to change states after 3 attempts, it will + * likely need a cold boot, or recovering. + */ + printk(BIOS_ERR, "Error: Failed to change ME state in %u attempts!\n", + ME_DISABLE_ATTEMPTS); + + } + } else { + printk(BIOS_DEBUG, "ME: Resetting"); + do_global_reset(); + } +} + +static void cse_set_state(struct device *dev) +{ + + /* (CS)ME Disable Command */ + struct me_disable_command { + struct mkhi_hdr hdr; + uint32_t rule_id; + uint8_t rule_len; + uint32_t rule_data; + } __packed me_disable = { + .hdr = { + .group_id = MKHI_GROUP_ID_FWCAPS, + .command = MKHI_SET_ME_DISABLE, + }, + .rule_id = ME_DISABLE_RULE_ID, + .rule_len = ME_DISABLE_RULE_LENGTH, + .rule_data = ME_DISABLE_COMMAND, + }; + + struct me_disable_reply { + struct mkhi_hdr hdr; + uint32_t rule_id; + } __packed; + + struct me_disable_reply disable_reply; + + size_t disable_reply_size; + + /* (CS)ME Enable Command */ + struct me_enable_command { + struct mkhi_hdr hdr; + } me_enable = { + .hdr = { + .group_id = MKHI_GROUP_ID_BUP_COMMON, + .command = MKHI_SET_ME_ENABLE, + }, + }; + + struct me_enable_reply { + struct mkhi_hdr hdr; + } __packed; + + struct me_enable_reply enable_reply; + + size_t enable_reply_size; + + /* Function Start */ + + int send; + int result; + /* + * Check if the CMOS value "me_state" exists, if it doesn't, then + * don't do anything. + */ + const unsigned int cmos_me_state = get_uint_option("me_state", UINT_MAX); + + if (cmos_me_state == UINT_MAX) + return; + + printk(BIOS_DEBUG, "CMOS: me_state = %u\n", cmos_me_state); + + /* + * We only take action if the me_state doesn't match the CS(ME) working state + */ + + const unsigned int soft_temp_disable = cse_is_hfs1_com_soft_temp_disable(); + + if (cmos_me_state && !soft_temp_disable) { + /* me_state should be disabled, but it's enabled */ + printk(BIOS_DEBUG, "ME needs to be disabled.\n"); + send = heci_send_receive(&me_disable, sizeof(me_disable), + &disable_reply, &disable_reply_size, HECI_MKHI_ADDR); + result = disable_reply.hdr.result; + } else if (!cmos_me_state && soft_temp_disable) { + /* me_state should be enabled, but it's disabled */ + printk(BIOS_DEBUG, "ME needs to be enabled.\n"); + send = heci_send_receive(&me_enable, sizeof(me_enable), + &enable_reply, &enable_reply_size, HECI_MKHI_ADDR); + result = enable_reply.hdr.result; + } else { + printk(BIOS_DEBUG, "ME is %s.\n", cmos_me_state ? "disabled" : "enabled"); + unsigned int cmos_me_state_counter = get_uint_option("me_state_counter", + UINT_MAX); + /* set me_state_counter to 0 */ + if ((cmos_me_state_counter != UINT_MAX && cmos_me_state_counter != 0)) + set_uint_option("me_state_counter", 0); + return; + } + + printk(BIOS_DEBUG, "HECI: ME state change send %s!\n", + send ? "success" : "failure"); + printk(BIOS_DEBUG, "HECI: ME state change result %s!\n", + result ? "success" : "failure"); + + /* + * Reset if the result was successful, or if the send failed as some older + * version of the Intel (CS)ME won't successfully receive the message unless reset + * twice. + */ + if (send || !result) + me_reset_with_count(); +} + static struct device_operations cse_ops = { .set_resources = pci_dev_set_resources, .read_resources = pci_dev_read_resources, .enable_resources = pci_dev_enable_resources, .init = pci_dev_init, .ops_pci = &pci_dev_ops_pci, + .enable = cse_set_state, }; static const unsigned short pci_device_ids[] = { diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index 7f45570..4184b17 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -11,10 +11,15 @@ #define MKHI_GROUP_ID_HMRFPO 0x5 #define MKHI_GROUP_ID_GEN 0xff #define MKHI_GROUP_ID_BUP_COMMON 0xf0 +#define MKHI_GROUP_ID_FWCAPS 0x3 /* Global Reset Command ID */ #define MKHI_CBM_GLOBAL_RESET_REQ 0xb +/* Set State Command ID */ +#define MKHI_SET_ME_DISABLE 0x3 +#define MKHI_SET_ME_ENABLE 0x3 + /* Origin of Global Reset command */ #define GR_ORIGIN_BIOS_POST 0x2 @@ -44,6 +49,12 @@ #define ME_HFS1_COM_SOFT_TEMP_DISABLE 0x3 #define ME_HFS1_COM_SECOVER_MEI_MSG 0x5 +/* ME Disable Rule */ +#define ME_DISABLE_RULE_ID 6 +#define ME_DISABLE_RULE_LENGTH 4 +#define ME_DISABLE_COMMAND 0 +#define ME_DISABLE_ATTEMPTS 3 + /* ME Firmware SKU Types */ #define ME_HFS3_FW_SKU_CONSUMER 0x2 #define ME_HFS3_FW_SKU_CORPORATE 0x3 -- To view, visit https://review.coreboot.org/c/coreboot/+/52800 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I374db3b7c0ded71cdc18f27970252fec7220cc20 Gerrit-Change-Number: 52800 Gerrit-PatchSet: 92 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: SRIDHAR SIRICILLA Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: 3rdparty/blobs: Update submodule
by Felix Held (Code Review) 22 Nov '21

22 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57292 ) Change subject: 3rdparty/blobs: Update submodule ...................................................................... 3rdparty/blobs: Update submodule This brings in EC firmware binaries for Star Labs laptops, as well as a custom bootsplash image. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Iab5ff610b19fbe6a2e61999457a13a86d47f0ca7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57292 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M 3rdparty/blobs 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/3rdparty/blobs b/3rdparty/blobs index f388b67..b8e3eaf 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit f388b6794e6f1f93b847de353f5eab8ba3e3b328 +Subproject commit b8e3eaf7501aaa234e93a4a305bf711cf34bb0ad 27 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/57292 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab5ff610b19fbe6a2e61999457a13a86d47f0ca7 Gerrit-Change-Number: 57292 Gerrit-PatchSet: 29 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: ec/starlabs: Add standardised ITE EC support
by Felix Held (Code Review) 22 Nov '21

22 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58343 ) Change subject: ec/starlabs: Add standardised ITE EC support ...................................................................... ec/starlabs: Add standardised ITE EC support Add EC support that supports different Q Events and EC memory. Created from the ITE IT5570E and IT8987E datasheets, all using data port 0x4e. Tested with Ubuntu 20.04.3 and Windows 10 on: * StarBook Mk V (TGL + IT5570E): * ITE Firmware 1.00 * Merlin Firmware 1.00 * LabTop Mk IV (CML + IT8987E): * ITE Firmware 1.04 * LabTop Mk III (KBL + IT8987E): * ITE Firmware 3.12 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I8023c26de23c874c84106fda96e64dcfa0c5ba32 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58343 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Andy Pont <andy.pont(a)sdcsystems.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- A src/ec/starlabs/merlin/Kconfig A src/ec/starlabs/merlin/Makefile.inc A src/ec/starlabs/merlin/acpi/ac.asl A src/ec/starlabs/merlin/acpi/battery.asl A src/ec/starlabs/merlin/acpi/cmos.asl A src/ec/starlabs/merlin/acpi/ec.asl A src/ec/starlabs/merlin/acpi/hid.asl A src/ec/starlabs/merlin/acpi/keyboard.asl A src/ec/starlabs/merlin/acpi/lid.asl A src/ec/starlabs/merlin/acpi/suspend.asl A src/ec/starlabs/merlin/acpi/typec.asl A src/ec/starlabs/merlin/acpi/ubtc.asl A src/ec/starlabs/merlin/ec.c A src/ec/starlabs/merlin/ec.h A src/ec/starlabs/merlin/variants/apl/ecdefs.h A src/ec/starlabs/merlin/variants/apl/emem.asl A src/ec/starlabs/merlin/variants/apl/events.asl A src/ec/starlabs/merlin/variants/cml/ecdefs.h A src/ec/starlabs/merlin/variants/cml/emem.asl A src/ec/starlabs/merlin/variants/cml/events.asl A src/ec/starlabs/merlin/variants/glk/ecdefs.h A src/ec/starlabs/merlin/variants/glk/emem.asl A src/ec/starlabs/merlin/variants/glk/events.asl A src/ec/starlabs/merlin/variants/kbl/ecdefs.h A src/ec/starlabs/merlin/variants/kbl/emem.asl A src/ec/starlabs/merlin/variants/kbl/events.asl A src/ec/starlabs/merlin/variants/merlin/ecdefs.h A src/ec/starlabs/merlin/variants/merlin/emem.asl A src/ec/starlabs/merlin/variants/merlin/events.asl A src/ec/starlabs/merlin/variants/tgl/ecdefs.h A src/ec/starlabs/merlin/variants/tgl/emem.asl A src/ec/starlabs/merlin/variants/tgl/events.asl 32 files changed, 3,682 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Andy Pont: Looks good to me, but someone else must approve diff --git a/src/ec/starlabs/merlin/Kconfig b/src/ec/starlabs/merlin/Kconfig new file mode 100644 index 0000000..fe94b85 --- /dev/null +++ b/src/ec/starlabs/merlin/Kconfig @@ -0,0 +1,57 @@ +## SPDX-License-Identifier: GPL-2.0-only + +config EC_STARLABS_ITE + bool + select EC_ACPI + help + Interface to ITE embedded controller principally in Star Labs notebooks. + Works with closed-source ITE firmware versions: + TGL - 1.00 or later + CML - 1.04 or later + KBL - 3.12 or later + And open-source Merlin firmware version 1.00 or later + +config EC_STARLABS_NEED_ITE_BIN + bool + depends on EC_STARLABS_ITE + help + Select if the mainboard requires EC firmware in the main flash chip. + +config EC_STARLABS_ADD_ITE_BIN + bool "Add Star Labs EC binary file" + default n + depends on EC_STARLABS_NEED_ITE_BIN + help + Select to add an EC firmware binary into the coreboot image. EC firmware + is necessary, flashing a coreboot image without EC firmware will render + your laptop unusable. + +config EC_STARLABS_ITE_BIN_PATH + string "Star Labs EC binary file path" + depends on EC_STARLABS_ADD_ITE_BIN + +config EC_STARLABS_KBL_LEVELS + bool + default n + depends on EC_STARLABS_ITE + help + Select if the mainboard supports multiple levels of brightness for the keyboard. + +config EC_STARLABS_FAN + bool + default n + depends on EC_STARLABS_ITE + help + Select if the mainboard has a fan. + +config EC_STARLABS_MERLIN + bool "Use open-source Merlin EC Firmware" + default n + depends on EC_STARLABS_ITE + help + Use open source embedded controller firmware. Both firmwares have the + same features but differ in licensing and compilers. + +config EC_VARIANT_DIR + string + default "merlin" if EC_STARLABS_MERLIN diff --git a/src/ec/starlabs/merlin/Makefile.inc b/src/ec/starlabs/merlin/Makefile.inc new file mode 100644 index 0000000..e6721f5 --- /dev/null +++ b/src/ec/starlabs/merlin/Makefile.inc @@ -0,0 +1,28 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_EC_STARLABS_ITE),y) + +PHONY+=add_ite_fw +INTERMEDIATE+=add_ite_fw + +EC_VARIANT_DIR := $(call strip_quotes, $(CONFIG_EC_VARIANT_DIR)) +CPPFLAGS_common += -I$(src)/ec/starlabs/merlin/variants/$(EC_VARIANT_DIR) + +all-y += ec.c + +ifeq ($(CONFIG_EC_STARLABS_NEED_ITE_BIN),y) +ifeq ($(CONFIG_EC_STARLABS_ADD_ITE_BIN),y) +add_ite_fw: $(obj)/coreboot.pre + $(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_EC_STARLABS_ITE_BIN_PATH) -u +else +files_added:: warn_no_ite_fw + +PHONY+=warn_no_ite_fw +warn_no_ite_fw: + printf "\n\t** WARNING **\n" + printf "coreboot has been built without the ITE EC Firmware.\n" + printf "Do not flash this image. Your laptop's power button\n" + printf "may not respond when you press it.\n\n" +endif +endif +endif diff --git a/src/ec/starlabs/merlin/acpi/ac.asl b/src/ec/starlabs/merlin/acpi/ac.asl new file mode 100644 index 0000000..808d575 --- /dev/null +++ b/src/ec/starlabs/merlin/acpi/ac.asl @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Device (ADP1) +{ + Name (_HID, "ACPI0003") + Method (_STA) + { + Return (0x0F) + } + Method (_PSR, 0) + { + PWRS = ECPS & 0x01 + Return(PWRS) + } + Method (_PCL, 0) + { + Return ( + Package() { _SB } + ) + } +} diff --git a/src/ec/starlabs/merlin/acpi/battery.asl b/src/ec/starlabs/merlin/acpi/battery.asl new file mode 100644 index 0000000..b428458 --- /dev/null +++ b/src/ec/starlabs/merlin/acpi/battery.asl @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Device (BAT0) +{ + Name (_HID, EisaId("PNP0C0A")) + Name (_UID, 0) + Method (_STA, 0, NotSerialized) + { + // Battery Status + // 0x80 BIT1 0x01 = Present + // 0x80 BIT1 0x00 = Not Present + If(ECPS & 0x02) + { + Return(0x1F) + } + Return(0x0F) + } + Name (BPKG, Package(13) + { + 1, // 0: Power Unit + 0xFFFFFFFF, // 1: Design Capacity + 0xFFFFFFFF, // 2: Last Full Charge Capacity + 1, // 3: Battery Technology(Rechargeable) + 0xFFFFFFFF, // 4: Design Voltage 10.8V + 0, // 5: Design capacity of warning + 0, // 6: Design capacity of low + 100, // 7: Battery capacity granularity 1 + 0, // 8: Battery capacity granularity 2 + "597077-3S", // 9: Model Number + "3ICP6/70/77", // 10: Serial Number + "Real", // 11: Battery Type + "DGFGE" // 12: OEM Information + }) + Method (_BIF, 0, Serialized) + { + BPKG[1] = B1DC + BPKG[2] = B1FC + BPKG[4] = B1DV + If(B1FC) + { + BPKG[5] = B1FC / 10 + BPKG[6] = B1FC / 100 + BPKG[7] = B1DC / 100 + } + Return(BPKG) + } + Name (PKG1, Package (4) + { + 0xFFFFFFFF, // Battery State + 0xFFFFFFFF, // Battery Present Rate + 0xFFFFFFFF, // Battery Remaining Capacity + 0xFFFFFFFF, // Battery Present Voltage + }) + Method (_BST, 0, NotSerialized) + { + PKG1[0] = (B1ST & 0x07) + PKG1[1] = B1PR + PKG1[2] = B1RC + PKG1[3] = B1PV + Return(PKG1) + } + Method (_PCL, 0, NotSerialized) + { + Return ( + Package() { _SB } + ) + } +} diff --git a/src/ec/starlabs/merlin/acpi/cmos.asl b/src/ec/starlabs/merlin/acpi/cmos.asl new file mode 100644 index 0000000..b6ef5a0 --- /dev/null +++ b/src/ec/starlabs/merlin/acpi/cmos.asl @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +OperationRegion (CMOS, SystemIO, 0x70, 0x2) +Field (CMOS, ByteAcc, NoLock, Preserve) +{ + IND1, 8, + DAT1, 8, +} + +IndexField (IND1, DAT1, ByteAcc, NoLock, Preserve) +{ + Offset (0x4b), + KLTC, 8, // Keyboard Backlight Timeout + FCLS, 8, // Ctrl Fn Reverse (make keyboard Apple-like) + MXCH, 8, // Max Charge Level + FNMD, 8, // Fan Mode +} + +OperationRegion (CMS2, SystemIO, 0x72, 0x2) +Field (CMS2, ByteAcc, NoLock, Preserve) +{ + IND2, 8, + DAT2, 8, +} + +IndexField (IND2, DAT2, ByteAcc, NoLock, Preserve) +{ + Offset (0x80), + FLKS, 8, // Function Lock State + TPLS, 8, // Trackpad State + KLBC, 8, // Keyboard Backlight Brightness + KLSC, 8, // Keyboard Backlight State +} diff --git a/src/ec/starlabs/merlin/acpi/ec.asl b/src/ec/starlabs/merlin/acpi/ec.asl new file mode 100644 index 0000000..905916c --- /dev/null +++ b/src/ec/starlabs/merlin/acpi/ec.asl @@ -0,0 +1,166 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include "ubtc.asl" + +Scope (\_SB.PCI0.LPCB) +{ + #include "cmos.asl" + + Device (EC) + { + Name (_HID, EisaId ("PNP0C09")) + Name (_UID, 0x01) + Name (_GPE, EC_GPE_SCI) + Name (ECAV, 0x00) + Name (ECTK, 0x01) + Name (B2ST, 0x00) + Name (CFAN, 0x00) + Name (CMDR, 0x00) + Name (DOCK, 0x00) + Name (PLMX, 0x00) + Name (PECH, 0x00) + Name (PECL, 0x00) + Name (PENV, 0x00) + Name (PINV, 0x00) + Name (PPSH, 0x00) + Name (PPSL, 0x00) + Name (PSTP, 0x00) + Name (RPWR, 0x00) + Name (VPWR, 0x00) + Name (WTMS, 0x00) + Name (AWT2, 0x00) + Name (AWT1, 0x00) + Name (AWT0, 0x00) + Name (DLED, 0x00) + Name (SPT2, 0x00) + Name (PB10, 0x00) + Name (IWCW, 0x00) + Name (IWCR, 0x00) + Name (PVOL, 0x00) + Mutex (ECMT, 0x00) + + Name(BFFR, ResourceTemplate() + { + IO(Decode16, 0x0062, 0x0062, 0x00, 0x01) + IO(Decode16, 0x0066, 0x0066, 0x00, 0x01) + }) + + Method (_CRS, 0, Serialized) + { + + Return(BFFR) + } + + Method (_STA, 0, NotSerialized) + { + \LIDS = 0x03 + Return (0x0F) + } + + OperationRegion (SIPR, SystemIO, 0xB2, 0x1) + Field (SIPR, ByteAcc, Lock, Preserve) { + SMB2, 8 + } + + #include "emem.asl" + + // ECRD (Embedded Controller Read Method) + // + // Handle all commands sent to EC by BIOS + // + // Arguments: + // Arg0 = Object to Read + // + // Return Value: + // Read Value + // + Method (ECRD, 1, Serialized, 0, IntObj, FieldUnitObj) + { + // + // Check for ECDT support, set ECAV to One if ECDT is supported by OS + // Only check once at beginning since ECAV might be clear later in certain conditions + // + If (ECTK) { + If (_REV >= 0x02) { + ECAV = 0x01 + } + ECTK = 0x00 // Clear flag for checking once only + } + + Local0 = Acquire (ECMT, 1000) // Save Acquired Result + If (Local0 == 0x00) // Check for Mutex Acquisition + { + If (ECAV) { + Local1 = DerefOf (Arg0) // Execute Read from EC + Release (ECMT) + Return (Local1) + } Else { + Release (ECMT) + } + } + Return(0) // Return in case Arg0 doesn't exist + } + + // ECWR (Embedded Controller Write Method) + // + // Handle all commands sent to EC by BIOS + // + // Arguments: + // Arg0 = Value to Write + // Arg1 = Object to Write to + // + // Return Value: + // None + // + Method (ECWR, 2, Serialized,,,{IntObj, FieldUnitObj}) + { + Local0 = Acquire (ECMT, 1000) // Save Acquired Result + If (Local0 == 0x00) // Check for Mutex Acquisition + { + If (ECAV) { + Arg1 = Arg0 // Execute Write to EC + Local1 = 0x00 + While (1) { + If (Arg0 == DerefOf (Arg1)) { + Break + } + Sleep (1) + Arg1 = Arg0 + Add (Local1, 1, Local1) + If (Local1 == 0x03) { + Break + } + } + } + Release (ECMT) + } + } + + #include "ac.asl" + #include "battery.asl" + #include "events.asl" + #include "lid.asl" + #include "typec.asl" + + Method (_REG, 2, NotSerialized) + { + If ((Arg0 == 0x03) && (Arg1 == 0x01)) + { + // Load EC Driver + ECAV = 0x01 + + // Initialise the Lid State + \LIDS = LSTE + + // Initialise the OS State + OSFG = 0x01 + + // Initialise the Power State + PWRS = (ECRD (RefOf(ECPS)) & 0x01) + + // Inform the platform code + PNOT() + } + } + } +} diff --git a/src/ec/starlabs/merlin/acpi/hid.asl b/src/ec/starlabs/merlin/acpi/hid.asl new file mode 100644 index 0000000..1d2b226 --- /dev/null +++ b/src/ec/starlabs/merlin/acpi/hid.asl @@ -0,0 +1,371 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Device (HIDD) // HID Device +{ + Name (_HID, "INTC1051") // Intel Ultrabook HID Platform Event Driver. + Name (HBSY, 0) // HID Busy + Name (HIDX, 0) // HID Index + Name (HMDE, 0) // HID Mode + Name (HRDY, 0) // HID Ready + Name (BTLD, 0) // Button Driver Loaded + Name (BTS1, 0) // Button Status + Method (_STA, 0, Serialized) // Status Method + { + // Usually, ACPI will check if the OS is 0x07DD (2013 - Windows 8.1ish) + // before showing the HID event filter. Seeing as we use Linux we show + // it regardless. + Return (0x0F) + } + // + // HID Driver Descriptor Method - Called by HID Driver during initialization + // to obtain HID Descriptor information. + // + // Input: + // None + // + // Output: + // Package containing a complete HID Descriptor information. + // + Name(DPKG, Package(4) + { + 0x11111111, + 0x22222222, + 0x33333333, + 0x44444444, + }) + Method (HDDM, 0, Serialized) + { + Return(DPKG) + } + // + // HID Driver Event Method - Called by HID Driver to get the specific + // platform event. + // + // Input: + // None + // + // Output: + // Mode 0 = Index of HID Input Report, per pre-defined Table. + // Mode 1 = Package containing a complete HID Input Report. + // + Method (HDEM, 0, Serialized) + { + HBSY = 0x00 // Clear HID Busy. + // Simple Mode is hardcoded for now. Return Simple Mode HID Index Value. + If (HMDE == 0x00) + { + Return(HIDX) + } + Return(HMDE) + } + // + // HID Driver Mode Method - Called by HID Driver during initialization to get + // the platform mode of operation. + // + // Input: + // None + // + // Output: + // 0 = Simple Mode. + // 1 = Advanced Mode. + // + Method (HDMM, 0, Serialized) + { + Return(HMDE) // Return Mode of operation. + } + // + // HID Driver Status Method - called by HID Driver to report platform readiness status. + // + // Input: Driver Status. + // 0 = Driver Unloaded. + // 1 = Driver Loaded and Ready. + // + // Output: None + // + Method (HDSM, 1, Serialized) + { + HRDY = Arg0 // Store HID Ready Status. + // Eventually code will communicate to platform the Driver status (enabled/disabled). + } + // + // HID Platform Event Method - called by Platform to communicate HID Event to Driver. + // + // Input: + // Mode 0 = Index of HID Event. + // Mode 1 = Package containing a complete HID Report. + // + Method (HPEM, 1, Serialized) // HID Platform Event Method. + { + HBSY = 0x01 // Set HID Busy. + // Simple Mode is hardcoded for now. Simply store HID Index value. + If (HMDE == 0x00) + { + HIDX = Arg0 + } Else { + HIDX = Arg0 + } + Notify (\_SB.HIDD, 0xC0) // Notify Driver to get HID Event. + Local0 = 0x00 // Initialize Local0 as a timeout counter. + While((Local0 < 250) && HBSY) // Wait <= 1 second for Driver to ACK success. + { + Sleep (4) // Delay 4 ms. + Local0++ // Increment Timeout. + } + If (HBSY == 0x01) // Failure? + { + HBSY = 0x00 // Yes. Clear HID Busy Flag. + HIDX = 0x00 // Set HID Simple Mode Index = 0 = Undefined. + Return (0x01) // Return Failure. + } Else { + Return (0x00) // Return Success. + } + } + // + // HID Button Load Method - called by Platform to say HID driver is capable of receiving + // 5-button array notifications. + // + // Input: + // None + // + // Output: + // None + // + Method (BTNL, 0, Serialized) // HID Button Enable/Disable Method + { + BTS1 = 0x00 + } + // + // HID Button Enable/Disable Method - called by Platform to disable/enable notification based + // on button press + // + // Input: + // Arg0 = Bit mask of buttons to Enable or Disable: + // 1 == Button should be Enabled + // 0 == Button should be Disabled + // Bits[0]: Power Button N/A to disable + // Bits[1]: Windows Button + // Bits[2]: Volume Up Button + // Bits[3]: Volume Down Button + // Bits[4]: Rotation Lock Button + // Bits[5:31]: Reserved + // + // Output: + // None + // + Method (BTNE, 1, Serialized) // HID Button Enable/Disable Method + { + Return (BTS1) + } + // + // HID Button Status - called by Platform to get what buttons are enabled and disabled + // + // Input: + // None + // + // Output: + // Bit mask of buttons' current status: + // 1 == Button is Enabled + // 0 == Button is Disabled + // Bits[0]: Power Button N/A to disable + // Bits[1]: Windows Button + // Bits[2]: Volume Up Button + // Bits[3]: Volume Down Button + // Bits[4]: Rotation Lock Button + // Bits[5:31]: Reserved + // + Method (BTNS, 0, Serialized) + { + Return (BTS1) + } + // + // HID Button Capabilities Method - called by Platform to determine what buttons are supported + // + // Input: + // None + // + // Output: + // Bit mask of buttons supported: + // 1 == Button is Supported + // 0 == Button is not Supported + // Bits[0]: Power Button (Must be 1) + // Bits[1]: Windows Button + // Bits[2]: Volume Up Button + // Bits[3]: Volume Down Button + // Bits[4]: Rotation Lock Button + // Bits[5:31]: Reserved + // + Method (BTNC, 0, Serialized) // HID Button Capabilities Method + { + Return(0x1F) + } + + // + // HEBC: HID Event Base Capabilities [31:0]- To specify the base button capabilities supported + // on platform by returning a ULONG value with the following bit level definition + // + // Input: + // None + // + // 0 = Button not supported + // 1 = Button supported + // Output: + // Bits [0] - Windows Button (Windows 8.1 supported), Rotation Lock (Windows 8.1 supported): + // Num Lock, Home, End, Page Up, Page Down + // Bits [1] - Wireless Radio Control + // Bits [2] - System Power Down (Windows 8.1 supported) + // Bits [3] - System Hibernate + // Bits [4] - System Sleep/ System Wake + // Bits [5] - Scan Next Track + // Bits [6] - Scan Previous Track + // Bits [7] - Stop + // Bits [8] - Play/Pause + // Bits [9] - Mute + // Bits [10] - Volume Increment (Windows 8.1 supported) + // Bits [11] - Volume Decrement (Windows 8.1 supported) + // Bits [12] - Display Brightness Increment + // Bits [13] - Display Brightness Decrement + // Bits [14] - Lock Tablet + // Bits [15] - Release Tablet + // Bits [16] - Toggle Bezel + // Bits [17] - 5 button array (Windows 10 supported): + // (Power, Windows Home, Volume Up, Volume Down, Rotation Lock) + // Bits [18] - Button 1 + // Bits [19] - Button 2 + // Bits [20] - Button 3 + // Bits [21] - Button 4 + // Bits [22] - Button 5 + // Bits [23-31] - reserved + // + // Modify below table if the target platform has different capabilities. Each bit + // corresponding the above table definition. + // + Name (HEB2, 0) // Extended 32bit capability definition for future enhancements. + Method (HEBC, 0, Serialized) { + // It's possible to return (\HEB1) + Return (0x00) + } + Method (H2BC, 0, Serialized) { + // It's possible to return (\HEB1) + Return (0x00) + } + // + // HEEC- Hid Event Extended Capabilities [32:63] + // + Method (HEEC, 0, Serialized) { + // It's possible to return (\HEB2) + Return(0x00) + } + // + // HIDD _DSM + // _DSM : Device Specific Method for the Windows Compatible Button Array. + // + // Arg0: UUID Unique function identifier + // Arg1: Integer Revision Level + // Arg2: Integer Function Index + // Arg3: Package Parameters + // + Method (_DSM, 4, Serialized, 0, UnknownObj, {BuffObj, IntObj, IntObj, PkgObj}) + { + // Compare passed in UUID to supported UUID. + If (Arg0 == ToUUID ("EEEC56B3-4442-408F-A792-4EDD4D758054")) + { + If (0x01 == ToInteger(Arg1)) // Revision 1. + { + Switch (ToInteger(Arg2)) // Switch to Function Index. + { + // + // Function 0, Query of supported functions. + // + Case (0x00) + { + Return (Buffer() {0xFF, 0x03}) // Total 9 function indices are supported including this. + } + // + // Function 1, BTNL. Button Load Method. No Input/Output. + // + Case (0x01) + { + BTNL() + } + // + // Function 2, HDMM. HID Driver Mode Method. + // Input:None + // Output:HDMM output. See HDMM + // + Case (0x02) + { + Return (HDMM()) + } + // + // Function 3, HDSM. HID Driver Status Method. + // Input: 0 - The driver is not available. 1 - The driver is available. + // Output: None + // + Case (0x03) + { + HDSM (DeRefOf(Index(Arg3, 0x00))) + } + // + // Function 4, HDEM. HID Driver Event Method. + // Input: None. + // Output: Package contains Supported Keys (Mode 0) + // + Case (0x04) + { + Return (HDEM()) + } + // + // Function 5 BTNS. Button Status Method. + // Input: None. + // Output: Int32 which contains a bit map of Buttons' enable/disable states + // + Case (0x05) + { + Return (BTNS()) + } + // + // Function 6 BTNE. Button Enable/Disable Method. + // Input: Int32 Bit mask of buttons enable/disable control: + // 1 = Button should be Enabled + // 0 = Button should be Disabled + // Output: None. + // + Case (0x06) + { + BTNE (DeRefOf(Index(Arg3, 0x00))) + } + // + // Function 7 HEBC. Button implemented state. + // Input: None + // Output: Int32 Bit map which shows what buttons are implemented on this system. + // + Case (0x07) + { + Return (HEBC()) + } + // + // Function 8 VGBS. Virtual GPIO Button Status. + // Input: None + // Output: Intger Bit map which shows what Virtual GPIO Button status. Currently only + // Dock/Slate modes are supported. + // + Case (0x08) + { + Return (0x00) + } + // + // Function 9 H2BC. Button implemented state. + // Input: None + // Output: Int32 Bit map which shows what buttons are implemented on this system. + // + Case (0x09) + { + Return (H2BC()) + } + } + } + } + // If the code falls through to this point, just return a buffer of 0. + Return (Buffer() {0x00}) + } +} diff --git a/src/ec/starlabs/merlin/acpi/keyboard.asl b/src/ec/starlabs/merlin/acpi/keyboard.asl new file mode 100644 index 0000000..0078c4c --- /dev/null +++ b/src/ec/starlabs/merlin/acpi/keyboard.asl @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Method(_Q80) // Volume up +{ + Store ("-----> _Q80", Debug) + Notify (\_SB.HIDD, 0xC4) + Notify (\_SB.HIDD, 0xC5) + Store ("<----- _Q80", Debug) +} + +Method(_Q81) // Volume down +{ + Store ("-----> _Q81", Debug) + Notify (\_SB.HIDD, 0xC6) + Notify (\_SB.HIDD, 0xC7) + Store ("<----- _Q81", Debug) +} + +Method(_Q99) // Wireless mode +{ + Store ("-----> _Q99", Debug) + ^^^^HIDD.HPEM (8) + Store ("<----- _Q99", Debug) +} + +Method(_Q06) // Brightness decrease +{ + ^^^^HIDD.HPEM (19) +} + +Method(_Q05) // Brightness increase +{ + ^^^^HIDD.HPEM (20) +} + +Method(_Q08) // FN lock QEvent +{ + FNLC = FNST +} + +Method(_Q54) // Power Button Event +{ + Store ("-----> _Q54", Debug) + Store ("<----- _Q54", Debug) +} + +Method(_QD5) // 10 second power button press +{ + Store ("-----> _QD5", Debug) + \_SB.PWPR() + Store ("<----- _QD5", Debug) +} + +Method(_QD6) // 10 second power button de-press +{ + Store ("-----> _QD6", Debug) + \_SB.PWRR() + Store ("<----- _QD6", Debug) +} diff --git a/src/ec/starlabs/merlin/acpi/lid.asl b/src/ec/starlabs/merlin/acpi/lid.asl new file mode 100644 index 0000000..8b0edb5 --- /dev/null +++ b/src/ec/starlabs/merlin/acpi/lid.asl @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Device (LID0) +{ + Name (_HID, EisaId ("PNP0C0D")) + Method (_STA) + { + Return (0x0F) + } + Method (_LID,0) + { + // 0x00 == Closed + // 0x01 == Open + Return (^^LSTE) + } +} diff --git a/src/ec/starlabs/merlin/acpi/suspend.asl b/src/ec/starlabs/merlin/acpi/suspend.asl new file mode 100644 index 0000000..7c8f2b1 --- /dev/null +++ b/src/ec/starlabs/merlin/acpi/suspend.asl @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Method (RPTS, 1, NotSerialized) +{ + \_SB.PCI0.LPCB.EC.OSFG = 0x00 + + If ((Arg0 == 0x04) || (Arg0 == 0x05)) + { + /* Store current EC settings */ + \_SB.PCI0.LPCB.EC.TPLA = \_SB.PCI0.LPCB.TPLS + \_SB.PCI0.LPCB.EC.FLKA = \_SB.PCI0.LPCB.FLKS + \_SB.PCI0.LPCB.EC.KLBE = \_SB.PCI0.LPCB.KLBC + } +} + +Method (RWAK, 1, Serialized) +{ + \_SB.PCI0.LPCB.EC.OSFG = 0x01 +} diff --git a/src/ec/starlabs/merlin/acpi/typec.asl b/src/ec/starlabs/merlin/acpi/typec.asl new file mode 100644 index 0000000..1acc8a4 --- /dev/null +++ b/src/ec/starlabs/merlin/acpi/typec.asl @@ -0,0 +1,82 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Method (UCSW, 0, Serialized) +{ + Sleep (50) + MGO0 = ^^^^UBTC.MGO0 + MGO1 = ^^^^UBTC.MGO1 + MGO2 = ^^^^UBTC.MGO2 + MGO3 = ^^^^UBTC.MGO3 + MGO4 = ^^^^UBTC.MGO4 + MGO5 = ^^^^UBTC.MGO5 + MGO6 = ^^^^UBTC.MGO6 + MGO7 = ^^^^UBTC.MGO7 + MGO8 = ^^^^UBTC.MGO7 + MGO9 = ^^^^UBTC.MGO9 + MGOA = ^^^^UBTC.MGOA + MGOB = ^^^^UBTC.MGOB + MGOC = ^^^^UBTC.MGOC + MGOD = ^^^^UBTC.MGOD + MGOE = ^^^^UBTC.MGOE + MGOF = ^^^^UBTC.MGOF + CTL0 = ^^^^UBTC.CTL0 + CTL1 = ^^^^UBTC.CTL1 + CTL2 = ^^^^UBTC.CTL2 + CTL3 = ^^^^UBTC.CTL3 + CTL4 = ^^^^UBTC.CTL4 + CTL5 = ^^^^UBTC.CTL5 + CTL6 = ^^^^UBTC.CTL6 + CTL7 = ^^^^UBTC.CTL7 + OPWE = 0xE0 +} + +Method (UCSR, 0, Serialized) +{ + Sleep (50) + ^^^^UBTC.MGI0 = MGI0 + ^^^^UBTC.MGI1 = MGI1 + ^^^^UBTC.MGI2 = MGI2 + ^^^^UBTC.MGI3 = MGI3 + ^^^^UBTC.MGI4 = MGI4 + ^^^^UBTC.MGI5 = MGI5 + ^^^^UBTC.MGI6 = MGI6 + ^^^^UBTC.MGI7 = MGI7 + ^^^^UBTC.MGI8 = MGI8 + ^^^^UBTC.MGI9 = MGI9 + ^^^^UBTC.MGIA = MGIA + ^^^^UBTC.MGIB = MGIB + ^^^^UBTC.MGIC = MGIC + ^^^^UBTC.MGID = MGID + ^^^^UBTC.MGIE = MGIE + ^^^^UBTC.MGIF = MGIF + ^^^^UBTC.CCI0 = CCI0 + ^^^^UBTC.CCI1 = CCI1 + ^^^^UBTC.CCI2 = CCI2 + ^^^^UBTC.CCI3 = CCI3 +} + +Method (UCEV, 0, Serialized) +{ + Sleep (50) + ^^^^UBTC.MGI0 = MGI0 + ^^^^UBTC.MGI1 = MGI1 + ^^^^UBTC.MGI2 = MGI2 + ^^^^UBTC.MGI3 = MGI3 + ^^^^UBTC.MGI4 = MGI4 + ^^^^UBTC.MGI5 = MGI5 + ^^^^UBTC.MGI6 = MGI6 + ^^^^UBTC.MGI7 = MGI7 + ^^^^UBTC.MGI8 = MGI8 + ^^^^UBTC.MGI9 = MGI9 + ^^^^UBTC.MGIA = MGIA + ^^^^UBTC.MGIB = MGIB + ^^^^UBTC.MGIC = MGIC + ^^^^UBTC.MGID = MGID + ^^^^UBTC.MGIE = MGIE + ^^^^UBTC.MGIF = MGIF + ^^^^UBTC.CCI0 = CCI0 + ^^^^UBTC.CCI1 = CCI1 + ^^^^UBTC.CCI2 = CCI2 + ^^^^UBTC.CCI3 = CCI3 + Notify (^^^^UBTC, 0x80) +} diff --git a/src/ec/starlabs/merlin/acpi/ubtc.asl b/src/ec/starlabs/merlin/acpi/ubtc.asl new file mode 100644 index 0000000..f29fb9d --- /dev/null +++ b/src/ec/starlabs/merlin/acpi/ubtc.asl @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +External(\_SB.UBTC, DeviceObj) +External(\_SB.UBTC.MGI0, IntObj) +External(\_SB.UBTC.MGI1, IntObj) +External(\_SB.UBTC.MGI2, IntObj) +External(\_SB.UBTC.MGI3, IntObj) +External(\_SB.UBTC.MGI4, IntObj) +External(\_SB.UBTC.MGI5, IntObj) +External(\_SB.UBTC.MGI6, IntObj) +External(\_SB.UBTC.MGI7, IntObj) +External(\_SB.UBTC.MGI8, IntObj) +External(\_SB.UBTC.MGI9, IntObj) +External(\_SB.UBTC.MGIA, IntObj) +External(\_SB.UBTC.MGIB, IntObj) +External(\_SB.UBTC.MGIC, IntObj) +External(\_SB.UBTC.MGID, IntObj) +External(\_SB.UBTC.MGIE, IntObj) +External(\_SB.UBTC.MGIF, IntObj) + +External(\_SB.UBTC.CTL0, IntObj) +External(\_SB.UBTC.CTL1, IntObj) +External(\_SB.UBTC.CTL2, IntObj) +External(\_SB.UBTC.CTL3, IntObj) +External(\_SB.UBTC.CTL4, IntObj) +External(\_SB.UBTC.CTL5, IntObj) +External(\_SB.UBTC.CTL6, IntObj) +External(\_SB.UBTC.CTL7, IntObj) + +External(\_SB.UBTC.MGO0, IntObj) +External(\_SB.UBTC.MGO1, IntObj) +External(\_SB.UBTC.MGO2, IntObj) +External(\_SB.UBTC.MGO3, IntObj) +External(\_SB.UBTC.MGO4, IntObj) +External(\_SB.UBTC.MGO5, IntObj) +External(\_SB.UBTC.MGO6, IntObj) +External(\_SB.UBTC.MGO7, IntObj) +External(\_SB.UBTC.MGO8, IntObj) +External(\_SB.UBTC.MGO9, IntObj) +External(\_SB.UBTC.MGOA, IntObj) +External(\_SB.UBTC.MGOB, IntObj) +External(\_SB.UBTC.MGOC, IntObj) +External(\_SB.UBTC.MGOD, IntObj) +External(\_SB.UBTC.MGOE, IntObj) +External(\_SB.UBTC.MGOF, IntObj) + +External(\_SB.UBTC.CCI0, IntObj) +External(\_SB.UBTC.CCI1, IntObj) +External(\_SB.UBTC.CCI2, IntObj) +External(\_SB.UBTC.CCI3, IntObj) diff --git a/src/ec/starlabs/merlin/ec.c b/src/ec/starlabs/merlin/ec.c new file mode 100644 index 0000000..50e13e9 --- /dev/null +++ b/src/ec/starlabs/merlin/ec.c @@ -0,0 +1,301 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <delay.h> +#include <device/device.h> +#include <device/pnp.h> +#include <ec/acpi/ec.h> +#include <option.h> +#include <pc80/keyboard.h> + +#include "ec.h" +#include "ecdefs.h" + +uint16_t it_get_version(void) +{ + return (ec_read(ECRAM_MAJOR_VERSION) << 8) | ec_read(ECRAM_MINOR_VERSION); +} + +static uint8_t get_ec_value_from_option(const char *name, + unsigned int fallback, + const uint8_t *lut, + size_t lut_size) +{ + unsigned int index = get_uint_option(name, fallback); + if (index >= lut_size) + index = fallback; + return lut[index]; +} + +static uint16_t ite_get_chip_id(unsigned int port) +{ + return (pnp_read_index(port, ITE_CHIPID1) << 8) | + pnp_read_index(port, ITE_CHIPID2); +} + +static void merlin_init(struct device *dev) +{ + if (!dev->enabled) + return; + + /* + * The address/data IO port pair for the ite EC are configurable + * through the EC domain and are fixed by the EC's firmware blob. If + * the value(s) passed through the "dev" structure don't match the + * expected values then output severe warnings. + */ + if (dev->path.pnp.port != ITE_FIXED_ADDR) { + printk(BIOS_ERR, "ITE: Incorrect ports defined in devicetree.cb.\n"); + printk(BIOS_ERR, "ITE: Serious operational issues will arise.\n"); + return; + } + + const uint16_t chip_id = ite_get_chip_id(dev->path.pnp.port); + + if (chip_id != ITE_CHIPID_VAL) { + printk(BIOS_ERR, "ITE: Expected chip ID 0x%04x, but got 0x%04x instead.\n", + ITE_CHIPID_VAL, chip_id); + return; + } + + pc_keyboard_init(NO_AUX_DEVICE); + + /* + * Restore settings from CMOS into EC RAM: + * + * kbl_timeout + * fn_ctrl_swap + * max_charge + * fan_mode + * fn_lock_state + * trackpad_state + * kbl_brightness + * kbl_state + */ + + /* + * Keyboard Backlight Timeout + * + * Setting: kbl_timeout + * + * Values: 30 Seconds, 1 Minute, 3 Minutes, 5 Minutes, Never + * Default: 30 Seconds + * + */ + const uint8_t kbl_timeout[] = { + SEC_30, + MIN_1, + MIN_3, + MIN_5, + NEVER + }; + + ec_write(ECRAM_KBL_TIMEOUT, + get_ec_value_from_option("kbl_timeout", + 0, + kbl_timeout, + ARRAY_SIZE(kbl_timeout))); + + /* + * Fn Ctrl Reverse + * + * Setting: fn_ctrl_swap + * + * Values: Enabled, Disabled + * Default: Disabled + * + */ + const uint8_t fn_ctrl_swap[] = { + FN_CTRL, + CTRL_FN + }; + + ec_write(ECRAM_FN_CTRL_REVERSE, + get_ec_value_from_option("fn_ctrl_swap", + 1, + fn_ctrl_swap, + ARRAY_SIZE(fn_ctrl_swap))); + + /* + * Maximum Charge Level + * + * Setting: max_charge + * + * Values: 60%, 80%, 100% + * Default: 100% + * + */ + const uint8_t max_charge[] = { + CHARGE_100, + CHARGE_80, + CHARGE_60 + }; + + ec_write(ECRAM_MAX_CHARGE, + get_ec_value_from_option("max_charge", + 0, + max_charge, + ARRAY_SIZE(max_charge))); + + /* + * Fan Mode + * + * Setting: fan_mode + * + * Values: Quiet, Normal, Aggressive + * Default: Normal + * + */ + const uint8_t fan_mode[] = { + FAN_NORMAL, + FAN_AGGRESSIVE, + FAN_QUIET + }; + + if (CONFIG(EC_STARLABS_FAN)) + ec_write(ECRAM_FAN_MODE, + get_ec_value_from_option("fan_mode", + 0, + fan_mode, + ARRAY_SIZE(fan_mode))); + + /* + * Function Lock + * + * Setting: fn_lock_state + * + * Values: Locked, Unlocked + * Default: Locked + * + */ + const uint8_t fn_lock_state[] = { + UNLOCKED, + LOCKED + }; + + ec_write(ECRAM_FN_LOCK_STATE, + get_ec_value_from_option("fn_lock_state", + 1, + fn_lock_state, + ARRAY_SIZE(fn_lock_state))); + + /* + * Trackpad State + * + * Setting: trackpad_state + * + * Values: Enabled, Disabled + * Default: Enabled + * + */ + const uint8_t trackpad_state[] = { + TRACKPAD_ENABLED, + TRACKPAD_DISABLED + }; + + ec_write(ECRAM_TRACKPAD_STATE, + get_ec_value_from_option("trackpad_state", + 0, + trackpad_state, + ARRAY_SIZE(trackpad_state))); + + /* + * Keyboard Backlight Brightness + * + * Setting: kbl_brightness + * + * Values: Off, Low, High / Off, On + * Default: Low + * + */ + const uint8_t kbl_brightness[] = { + KBL_ON, + KBL_OFF, + KBL_LOW, + KBL_HIGH + }; + + if (CONFIG(EC_STARLABS_KBL_LEVELS)) + ec_write(ECRAM_KBL_BRIGHTNESS, + get_ec_value_from_option("kbl_brightness", + 2, + kbl_brightness, + ARRAY_SIZE(kbl_brightness))); + else + ec_write(ECRAM_KBL_BRIGHTNESS, + get_ec_value_from_option("kbl_brightness", + 0, + kbl_brightness, + ARRAY_SIZE(kbl_brightness))); + + /* + * Keyboard Backlight State + * + * Setting: kbl_state + * + * Values: Off, On + * Default: On + * + */ + const uint8_t kbl_state[] = { + KBL_DISABLED, + KBL_ENABLED + }; + + ec_write(ECRAM_KBL_STATE, + get_ec_value_from_option("kbl_state", + 1, + kbl_state, + ARRAY_SIZE(kbl_state))); +} + +static struct device_operations ops = { + .init = merlin_init, + .read_resources = noop_read_resources, + .set_resources = noop_set_resources, +}; + +static struct pnp_info pnp_dev_info[] = { + /* Serial Port 1 (UART1) */ + { NULL, ITE_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, }, + /* Serial Port 2 (UART2) */ + { NULL, ITE_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, }, + /* System Wake-Up Control (SWUC) */ + { NULL, ITE_SWUC, PNP_IO0 | PNP_IRQ0, 0xfff0, }, + /* KBC / Mouse Interface */ + { NULL, ITE_SWUC, PNP_IRQ0, }, + /* KBC / Keyboard Interface */ + { NULL, ITE_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff, }, + /* Consumer IR (CIR) */ + { NULL, ITE_IR, PNP_IO0 | PNP_IRQ0, 0xfff8, }, + /* Shared Memory / Flash Interface (SMFI) */ + { NULL, ITE_SMFI, PNP_IO0 | PNP_IRQ0, 0xfff0, }, + /* RTC-like Timer (RCTC) */ + { NULL, ITE_RTCT, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0, + 0xfffe, 0xfffe, 0xfffe, 0xfffe, }, + /* Power Management I/F Channel 1 (PMC1) */ + { NULL, ITE_PMC1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff, }, + /* Power Management I/F Channel 2 (PMC2) */ + { NULL, ITE_PMC2, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IRQ0, 0x07fc, + 0x07fc, 0xfff0, }, + /* Serial Peripheral Interface (SSPI) */ + { NULL, ITE_SSPI, PNP_IO0 | PNP_IRQ0, 0xfff8, }, + /* Platform Environment Control Interface (PECI) */ + { NULL, ITE_PECI, PNP_IRQ0, 0xfff8, }, + /* Power Management I/F Channel 3 (PMC3) */ + { NULL, ITE_PMC3, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff, }, + /* Power Management I/F Channel 4 (PMC4) */ + { NULL, ITE_PMC4, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff, }, + /* Power Management I/F Channel 5 (PMC5) */ + { NULL, ITE_PMC5, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff, }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); +} + +struct chip_operations ec_starlabs_merlin_ops = { + CHIP_NAME("ITE EC") + .enable_dev = enable_dev +}; diff --git a/src/ec/starlabs/merlin/ec.h b/src/ec/starlabs/merlin/ec.h new file mode 100644 index 0000000..0f564ca --- /dev/null +++ b/src/ec/starlabs/merlin/ec.h @@ -0,0 +1,86 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* + * EC communication interface for ITE Embedded Controller. + */ + +#ifndef _EC_STARLABS_ITE_H +#define _EC_STARLABS_ITE_H + +/* + * Define the expected value of the PNP base address that is fixed through + * the BADRSEL register controlled within the EC domain by the EC Firmware. + */ +#define ITE_FIXED_ADDR 0x4e + +/* Logical device number (LDN) assignments. */ +#define ITE_SP1 0x01 /* Serial Port 1 (UART) */ +#define ITE_SP2 0x02 /* Serial Port 2 (UART) */ +#define ITE_SWUC 0x04 /* System Wake-Up Control (SWUC) */ +#define ITE_KBCM 0x05 /* KBC / Mouse Interface */ +#define ITE_KBCK 0x06 /* KBC / Keyboard Interface */ +#define ITE_IR 0x0a /* Consumer IR (CIR) */ +#define ITE_SMFI 0x0f /* Shared Memory / Flash Interface (SMFI) */ +#define ITE_RTCT 0x10 /* RTC-like Timer (RCTC) */ +#define ITE_PMC1 0x11 /* Power Management I/F Channel 1 (PMC1) */ +#define ITE_PMC2 0x12 /* Power Management I/F Channel 2 (PMC2) */ +#define ITE_SSPI 0x13 /* Serial Peripheral Interface (SSPI) */ +#define ITE_PECI 0x14 /* Platform Environment Control Interface (PECI) */ +#define ITE_PMC3 0x17 /* Power Management I/F Channel 3 (PMC3) */ +#define ITE_PMC4 0x18 /* Power Management I/F Channel 4 (PMC4) */ +#define ITE_PMC5 0x19 /* Power Management I/F Channel 5 (PMC5) */ + +/* Host domain registers. */ +#define ITE_CHIPID1 0x20 /* Device ID register 1 */ +#define ITE_CHIPID2 0x21 /* Device ID register 2 */ + +/* EC RAM common offsets */ +#define ECRAM_MAJOR_VERSION 0x00 +#define ECRAM_MINOR_VERSION 0x01 + +/* + * CMOS Settings + */ + +/* Keyboard Backlight Timeout */ +#define SEC_30 0x00 +#define MIN_1 0x01 +#define MIN_3 0x02 +#define MIN_5 0x03 +#define NEVER 0x04 + +/* Fn Ctrl Swap */ +#define FN_CTRL 0x00 +#define CTRL_FN 0x01 + +/* Max Charge Setting */ +#define CHARGE_100 0x00 +#define CHARGE_80 0xbb +#define CHARGE_60 0xaa + +/* Fan Mode Setting */ +#define FAN_NORMAL 0x00 +#define FAN_AGGRESSIVE 0xbb +#define FAN_QUIET 0xaa + +/* Fn Lock State */ +#define UNLOCKED 0x00 +#define LOCKED 0x01 + +/* Trackpad State */ +#define TRACKPAD_ENABLED 0x00 +#define TRACKPAD_DISABLED 0x22 + +/* Keyboard Brightness Levels */ +#define KBL_ON 0xdd +#define KBL_OFF 0xcc +#define KBL_LOW 0xbb +#define KBL_HIGH 0xaa + +/* Keyboard Backlight State */ +#define KBL_DISABLED 0x00 +#define KBL_ENABLED 0xaa + +uint16_t it_get_version(void); + +#endif diff --git a/src/ec/starlabs/merlin/variants/apl/ecdefs.h b/src/ec/starlabs/merlin/variants/apl/ecdefs.h new file mode 100644 index 0000000..1057da8 --- /dev/null +++ b/src/ec/starlabs/merlin/variants/apl/ecdefs.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <assert.h> +#include <stdint.h> + +/* + * EC communication interface for ITE Embedded Controller. + */ + +#ifndef _EC_STARLABS_APL_EC_DEFS_H +#define _EC_STARLABS_APL_EC_DEFS_H + +/* IT8987 chip ID byte values. */ +#define ITE_CHIPID_VAL 0x8987 + +/* EC RAM offsets. */ +#define ECRAM_TRACKPAD_STATE 0x14 +#define ECRAM_KBL_STATE 0x18 +#define ECRAM_KBL_BRIGHTNESS 0x19 +#define ECRAM_KBL_TIMEOUT 0x1a +#define ECRAM_FN_LOCK_STATE 0x2c +#define ECRAM_FN_CTRL_REVERSE 0x2d +#define ECRAM_MAX_CHARGE 0x46 +#define ECRAM_FAN_MODE dead_code_t(uint8_t) + +#endif diff --git a/src/ec/starlabs/merlin/variants/apl/emem.asl b/src/ec/starlabs/merlin/variants/apl/emem.asl new file mode 100644 index 0000000..8341bf2 --- /dev/null +++ b/src/ec/starlabs/merlin/variants/apl/emem.asl @@ -0,0 +1,173 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +OperationRegion (ECF2, EmbeddedControl, 0x00, 0x100) +Field (ECF2, ByteAcc, Lock, Preserve) +{ + Offset(0x00), + ECMV, 8, // Major Version Number + ECSV, 8, // Minor Version Number + KBVS, 8, // Keyboard Controller Version + ECTV, 8, // Test Version Number + FRMF, 8, // Force Mirror Flag + TXEL, 8, // TXE Lock + + Offset(0x10), + CPWR, 8, // Control Power + CDEV, 8, // Control Device + OSFG, 8, // OS Flag + CWFU, 8, // CW2015 Full + TPLA, 8, // Trackpad State + AFG3, 8, // After G3 + CLTP, 8, // Close Trackpad + WKOL, 8, // Wake on Lid + KLSE, 8, // Keyboard Backlight State + KLBE, 8, // Keyboard Backlight Brightness + + Offset(0x1a), + KLTE, 8, // Keyboard Backlight Timeout + + Offset(0x22), + ECT0, 8, // EC Build Time 0 + ECT1, 8, // EC Build Time 1 + ECT2, 8, // EC Build Time 2 + ECT3, 8, // EC Build Time 3 + ECT4, 8, // EC Build Time 4 + ECT5, 8, // EC Build Time 5 + ECT6, 8, // EC Build Time 6 + ECT7, 8, // EC Build Time 7 + ECT8, 8, // EC Build Time 8 + ECT9, 8, // EC Build Time 9 + + Offset(0x2c), + FLKA, 8, // Function Lock State + + Offset(0x30), + STEF, 8, // Sensor T Error F + ECD0, 8, // EC Build Date 0 + ECD1, 8, // EC Build Date 1 + ECD2, 8, // EC Build Date 2 + ECD3, 8, // EC Build Date 3 + ECD4, 8, // EC Build Date 4 + ECD5, 8, // EC Build Date 5 + ECD6, 8, // EC Build Date 6 + ECD7, 8, // EC Build Date 7 + ECD8, 8, // EC Build Date 8 + ECD9, 8, // EC Build Date 9 + + Offset(0x40), + SHIP, 8, // Shipping Mode Flag + LEDF, 8, // LED Control Flag + LIDF, 8, // Lid Flag + KBFL, 8, // Keyboard Flag + CYCC, 8, // Cycle Count + + Offset(0x46), + BFCP, 8, // Battery Full Charge Percentage + + Offset(0x62), + TSE2, 8, // Sensor 2 Temperature + SENF, 8, // Sensor F + TSHT, 8, // Thermal Sensor High Trip Point + TSLT, 8, // Thermal Sensor Low Trip Point + THER, 8, // Thermal Source + + Offset(0x70), + CPUT, 8, // PECI CPU Temperature + PMXT, 8, // PLMX Temperature + CHAR, 8, // Charger Temperature + + Offset(0x7e), + OCTF, 8, // OEM Control Flag + LSTE, 1, // Lid Status + , 7, // Reserved + + Offset(0x80), + ECPS, 8, // AC & Battery status + B1MN, 8, // Battery Model Number Code + B1SN, 16, // Battery Serial Number + B1DC, 16, // Battery Design Capacity + B1DV, 16, // Battery Design Voltage + B1FC, 16, // Battery Last Full Charge Capacity + B1TP, 16, // Battery Trip Point + B1ST, 8, // Battery State + B1PR, 16, // Battery Present Rate + B1RC, 16, // Battery Remaining Capacity + B1PV, 16, // Battery Present Voltage + BPRP, 8, // Battery Remaining percentage + BT1A, 8, // Bt1 ASOC + BT1T, 16, // Bt1 Temperature + BT1C, 8, // Bt1 Control + + // Unicorn - doesn't actually exist + Offset(0x9d), + OPWE, 8, // OPM write to EC flag for UCSI + // Unicorn - doesn't actually exist + + Offset(0xbf), + EJ8A, 8, // EJ898A Firmware Version + + Offset(0xc0), + MGI0, 8, // UCSI DS MGI 0 + MGI1, 8, // UCSI DS MGI 1 + MGI2, 8, // UCSI DS MGI 2 + MGI3, 8, // UCSI DS MGI 3 + MGI4, 8, // UCSI DS MGI 4 + MGI5, 8, // UCSI DS MGI 5 + MGI6, 8, // UCSI DS MGI 6 + MGI7, 8, // UCSI DS MGI 7 + MGI8, 8, // UCSI DS MGI 8 + MGI9, 8, // UCSI DS MGI 9 + MGIA, 8, // UCSI DS MGI A + MGIB, 8, // UCSI DS MGI B + MGIC, 8, // UCSI DS MGI C + MGID, 8, // UCSI DS MGI D + MGIE, 8, // UCSI DS MGI E + MGIF, 8, // UCSI DS MGI F + + Offset(0xd0), + MGO0, 8, // UCSI DS MGO 0 + MGO1, 8, // UCSI DS MGO 1 + MGO2, 8, // UCSI DS MGO 2 + MGO3, 8, // UCSI DS MGO 3 + MGO4, 8, // UCSI DS MGO 4 + MGO5, 8, // UCSI DS MGO 5 + MGO6, 8, // UCSI DS MGO 6 + MGO7, 8, // UCSI DS MGO 7 + MGO8, 8, // UCSI DS MGO 8 + MGO9, 8, // UCSI DS MGO 9 + MGOA, 8, // UCSI DS MGO A + MGOB, 8, // UCSI DS MGO B + MGOC, 8, // UCSI DS MGO C + MGOD, 8, // UCSI DS MGO D + MGOE, 8, // UCSI DS MGO E + MGOF, 8, // UCSI DS MGO F + + Offset(0xe0), + UCSV, 16, // UCSI DS Version + UCSD, 16, // UCSI DS Reserved + CCI0, 8, // UCSI DS CCI 0 + CCI1, 8, // UCSI DS CCI 1 + CCI2, 8, // UCSI DS CCI 2 + CCI3, 8, // UCSI DS CCI 3 + CTL0, 8, // UCSI DS Control 0 + CTL1, 8, // UCSI DS Control 0 + CTL2, 8, // UCSI DS Control 0 + CTL3, 8, // UCSI DS Control 0 + CTL4, 8, // UCSI DS Control 0 + CTL5, 8, // UCSI DS Control 0 + CTL6, 8, // UCSI DS Control 0 + CTL7, 8, // UCSI DS Control 0 + + Offset(0xf0), + P0SD, 8, // PD Port Status DD + P0S4, 8, // PD Port Status 4 + P0S5, 8, // PD Port Status 5 + P0SE, 8, // PD Port Status E + P0SA, 8, // PD Port Status 10 + P0SB, 8, // PD Port Status 11 + + Offset(0xfd), + STCD, 8, // Shutdown Code + EJ8R, 8, // EJ898A Need Reboot + EJ8E, 8, // EJ898A Error +} diff --git a/src/ec/starlabs/merlin/variants/apl/events.asl b/src/ec/starlabs/merlin/variants/apl/events.asl new file mode 100644 index 0000000..5271d8e --- /dev/null +++ b/src/ec/starlabs/merlin/variants/apl/events.asl @@ -0,0 +1,99 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Method (_Q0D, 0, NotSerialized) // Event: Lid Opened +{ + \LIDS = LSTE + Notify (LID0, 0x80) +} + +Method (_Q0C, 0, NotSerialized) // Event: Lid Closed +{ + \LIDS = LSTE + Notify (LID0, 0x80) +} + +Method (_Q0A, 0, NotSerialized) // Event: AC Power Connected +{ + Notify (BAT0, 0x81) + Notify (ADP1, 0x80) +} + +Method (_Q0B, 0, NotSerialized) // Event: AC Power Disconnected +{ + Notify (BAT0, 0x81) + Notify (BAT0, 0x80) +} + +Method (_Q06, 0, NotSerialized) // Event: Backlight Brightness Down +{ + ^^^^HIDD.HPEM (20) +} + +Method (_Q07, 0, NotSerialized) // Event: Backlight Brightness Up +{ + ^^^^HIDD.HPEM (19) +} + +Method (_Q08, 0, NotSerialized) // Event: Function Lock +{ + FLKS = FLKA +} +// +// TODO: +// Below Q Events need to be added +// +// Method (_Q04, 0, NotSerialized) // Event: Trackpad Lock +// { +// TPLS = TPLA +// } +// +// Method (_Q__, 0, NotSerialized) // Event: Keyboard Backlight Brightness +// { +// KLBC = KLBE +// } +// + +Method (_Q99, 0, NotSerialized) // Event: Airplane Mode +{ + ^^^^HIDD.HPEM (8) +} + +Method (_QD5, 0, NotSerialized) // Event: 10 Second Power Button Pressed +{ + Notify (HIDD, 0xCE) +} + +Method (_QD6, 0, NotSerialized) // Event: 10 Second Power Button Released +{ + Notify (HIDD, 0xCF) +} + +Method (_Q22, 0, NotSerialized) // Event: CHARGER_T +{ + Store ("EC: CHARGER_T", Debug) +} + +Method (_Q80, 0, NotSerialized) // Event: Volume Up +{ + Store ("EC: VOLUME_UP", Debug) +} + +Method (_Q81, 0, NotSerialized) // Event: Volume Down +{ + Store ("EC: VOLUME_DOWN", Debug) +} + +Method (_Q54, 0, NotSerialized) // Event: Power Button Press +{ + Store ("EC: PWRBTN", Debug) +} + +Method (_QF0, 0, NotSerialized) // Event: Temperature Report +{ + Store ("EC: Temperature Report", Debug) +} + +Method (_QF1, 0, NotSerialized) // Event: Temperature Trigger +{ + // Notify (SEN3, 0x90) +} diff --git a/src/ec/starlabs/merlin/variants/cml/ecdefs.h b/src/ec/starlabs/merlin/variants/cml/ecdefs.h new file mode 100644 index 0000000..42b4d44 --- /dev/null +++ b/src/ec/starlabs/merlin/variants/cml/ecdefs.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* + * EC communication interface for ITE Embedded Controller + */ + +#ifndef _EC_STARLABS_CML_EC_DEFS_H +#define _EC_STARLABS_CML_EC_DEFS_H + +/* IT8987 chip ID byte values */ +#define ITE_CHIPID_VAL 0x8987 + +/* EC RAM offsets */ +#define ECRAM_KBL_TIMEOUT 0x07 +#define ECRAM_FN_CTRL_REVERSE 0x08 +#define ECRAM_FAN_MODE 0x09 +#define ECRAM_MAX_CHARGE 0x10 +#define ECRAM_TRACKPAD_STATE 0x14 +#define ECRAM_KBL_STATE 0x18 +#define ECRAM_KBL_BRIGHTNESS 0x19 +#define ECRAM_FN_LOCK_STATE 0x2c + +#endif diff --git a/src/ec/starlabs/merlin/variants/cml/emem.asl b/src/ec/starlabs/merlin/variants/cml/emem.asl new file mode 100644 index 0000000..1a4a48f --- /dev/null +++ b/src/ec/starlabs/merlin/variants/cml/emem.asl @@ -0,0 +1,171 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +OperationRegion (ECF2, EmbeddedControl, 0x00, 0x100) +Field (ECF2, ByteAcc, Lock, Preserve) +{ + Offset(0x00), + ECMV, 8, // Major Version Number + ECSV, 8, // Minor Version Number + KBVS, 8, // Keyboard Controller Version + ECTV, 8, // Test Version Number + FRMF, 8, // Force Mirror Flag + TXEL, 8, // TXE Lock + SSIT, 8, // Show Setup Items + KLTE, 8, // Keyboard Backlight Timeout + FCLA, 8, // Fn Ctrl Reverse + FANM, 8, // Fan Mode + + Offset(0x0a), + P0MV, 8, // PD Port 0 Major Version + P0SV, 8, // PD Port 0 Minor Version + P1MV, 8, // PD Port 1 Major Version + P1SV, 8, // PD Port 1 Minor Version + + Offset(0x10), + BFCP, 8, // Battery Full Charge Percentage + CDEV, 8, // Control Device + OSFG, 8, // OS Flag + + Offset(0x14), + TPLA, 8, // Trackpad State + AFG3, 8, // After G3 + CLTP, 8, // Close Trackpad + WKOL, 8, // Wake on Lid + KLSE, 8, // Keyboard Backlight State + KLBE, 8, // Keyboard Backlight Brightness + + Offset(0x1a), + CWFU, 8, // CW2015 Full + + Offset(0x1c), + WIFI, 8, // WiFi Enable + + Offset(0x22), + ECT0, 8, // EC Build Time 0 + ECT1, 8, // EC Build Time 1 + ECT2, 8, // EC Build Time 2 + ECT3, 8, // EC Build Time 3 + ECT4, 8, // EC Build Time 4 + ECT5, 8, // EC Build Time 5 + ECT6, 8, // EC Build Time 6 + ECT7, 8, // EC Build Time 7 + ECT8, 8, // EC Build Time 8 + ECT9, 8, // EC Build Time 9 + FLKA, 8, // Function Lock State + MICF, 8, // Mic Flag + MUTF, 8, // Mute Flag + BC12, 8, // BC12 Flag + + Offset(0x30), + STEF, 8, // Sensor T Error F + ECD0, 8, // EC Build Date 0 + ECD1, 8, // EC Build Date 1 + ECD2, 8, // EC Build Date 2 + ECD3, 8, // EC Build Date 3 + ECD4, 8, // EC Build Date 4 + ECD5, 8, // EC Build Date 5 + ECD6, 8, // EC Build Date 6 + ECD7, 8, // EC Build Date 7 + ECD8, 8, // EC Build Date 8 + ECD9, 8, // EC Build Date 9 + + Offset(0x4c), + PJN0, 8, // Project Name 0 + PJN1, 8, // Project Name 1 + PJN2, 8, // Project Name 2 + PJN3, 8, // Project Name 3 + + Offset(0x62), + TSE2, 8, // Sensor 2 Temperature + SENF, 8, // Sensor F + TSHT, 8, // Thermal Sensor High Trip Point + TSLT, 8, // Thermal Sensor Low Trip Point + THER, 8, // Thermal Source + + Offset(0x70), + CPUT, 8, // PECI CPU Temperature + PMXT, 8, // PLMX Temperature + CHAR, 8, // Charger Temperature + + Offset(0x7f), + LSTE, 1, // Lid Status + , 7, // Reserved + + Offset(0x80), + ECPS, 8, // AC & Battery status + B1MN, 8, // Battery Model Number Code + B1SN, 16, // Battery Serial Number + B1DC, 16, // Battery Design Capacity + B1DV, 16, // Battery Design Voltage + B1FC, 16, // Battery Last Full Charge Capacity + B1TP, 16, // Battery Trip Point + B1ST, 8, // Battery State + B1PR, 16, // Battery Present Rate + B1RC, 16, // Battery Remaining Capacity + B1PV, 16, // Battery Present Voltage + BPRP, 8, // Battery Remaining percentage + BT1A, 8, // Bt1 ASOC + BT1T, 16, // Bt1 Temperature + BT1C, 8, // Bt1 Control + + // Unicorn - doesn't actually exist + Offset(0x9d), + OPWE, 8, // OPM write to EC flag for UCSI + // Unicorn - doesn't actually exist + + Offset(0xa0), + UCSV, 16, // UCSI DS Version + UCSD, 16, // UCSI DS Reserved + CCI0, 8, // UCSI DS CCI 0 + CCI1, 8, // UCSI DS CCI 1 + CCI2, 8, // UCSI DS CCI 2 + CCI3, 8, // UCSI DS CCI 3 + CTL0, 8, // UCSI DS Control 0 + CTL1, 8, // UCSI DS Control 0 + CTL2, 8, // UCSI DS Control 0 + CTL3, 8, // UCSI DS Control 0 + CTL4, 8, // UCSI DS Control 0 + CTL5, 8, // UCSI DS Control 0 + CTL6, 8, // UCSI DS Control 0 + CTL7, 8, // UCSI DS Control 0 + + Offset(0xb0), + MGI0, 8, // UCSI DS MGI 0 + MGI1, 8, // UCSI DS MGI 1 + MGI2, 8, // UCSI DS MGI 2 + MGI3, 8, // UCSI DS MGI 3 + MGI4, 8, // UCSI DS MGI 4 + MGI5, 8, // UCSI DS MGI 5 + MGI6, 8, // UCSI DS MGI 6 + MGI7, 8, // UCSI DS MGI 7 + MGI8, 8, // UCSI DS MGI 8 + MGI9, 8, // UCSI DS MGI 9 + MGIA, 8, // UCSI DS MGI A + MGIB, 8, // UCSI DS MGI B + MGIC, 8, // UCSI DS MGI C + MGID, 8, // UCSI DS MGI D + MGIE, 8, // UCSI DS MGI E + MGIF, 8, // UCSI DS MGI F + + Offset(0xc0), + MGO0, 8, // UCSI DS MGO 0 + MGO1, 8, // UCSI DS MGO 1 + MGO2, 8, // UCSI DS MGO 2 + MGO3, 8, // UCSI DS MGO 3 + MGO4, 8, // UCSI DS MGO 4 + MGO5, 8, // UCSI DS MGO 5 + MGO6, 8, // UCSI DS MGO 6 + MGO7, 8, // UCSI DS MGO 7 + MGO8, 8, // UCSI DS MGO 8 + MGO9, 8, // UCSI DS MGO 9 + MGOA, 8, // UCSI DS MGO A + MGOB, 8, // UCSI DS MGO B + MGOC, 8, // UCSI DS MGO C + MGOD, 8, // UCSI DS MGO D + MGOE, 8, // UCSI DS MGO E + MGOF, 8, // UCSI DS MGO F + + Offset(0xe6), + ECWD, 16, // EC Wakeup Delay + ECWE, 8, // EC Wakeup Enable +} diff --git a/src/ec/starlabs/merlin/variants/cml/events.asl b/src/ec/starlabs/merlin/variants/cml/events.asl new file mode 100644 index 0000000..9333c9e --- /dev/null +++ b/src/ec/starlabs/merlin/variants/cml/events.asl @@ -0,0 +1,143 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Method (_Q0D, 0, NotSerialized) // Event: Lid Opened +{ + \LIDS = LSTE + Notify (LID0, 0x80) +} + +Method (_Q0C, 0, NotSerialized) // Event: Lid Closed +{ + \LIDS = LSTE + Notify (LID0, 0x80) +} + +Method (_QA0, 0, NotSerialized) // Event: AC Power Connected +{ + Notify (BAT0, 0x81) + Notify (ADP1, 0x80) +} + +Method (_Q0B, 0, NotSerialized) // Event: AC Power Disconnected +{ + Notify (BAT0, 0x81) + Notify (BAT0, 0x80) +} + +Method (_Q06, 0, NotSerialized) // Event: Backlight Brightness Down +{ + ^^^^HIDD.HPEM (20) +} + +Method (_Q07, 0, NotSerialized) // Event: Backlight Brightness Up +{ + ^^^^HIDD.HPEM (19) +} + +Method (_Q08, 0, NotSerialized) // Event: Function Lock +{ + FLKS = FLKA +} + +Method (_Q04, 0, NotSerialized) // Event: Trackpad Lock +{ + TPLS = TPLA +} +// +// TODO: +// Below Q Events need to be added +// +Method (_Q11) // Event: Keyboard Backlight Brightness +{ + KLBC = KLBE +} + +Method (_Q99, 0, NotSerialized) // Event: Airplane Mode +{ + ^^^^HIDD.HPEM (8) +} + +Method (_QD5, 0, NotSerialized) // Event: 10 Second Power Button Pressed +{ + Notify (HIDD, 0xCE) +} + +Method (_QD6, 0, NotSerialized) // Event: 10 Second Power Button Released +{ + Notify (HIDD, 0xCF) +} + +Method (_Q22, 0, NotSerialized) // Event: CHARGER_T +{ + Store ("EC: CHARGER_T", Debug) +} + +Method (_Q40, 0, NotSerialized) // Event: AC and DC Power +{ + SMB2 = 0xC6 +} + +Method (_Q41, 0, NotSerialized) // Event: Battery Charge between 0% and 20% +{ + SMB2 = 0xC7 +} + +Method (_Q42, 0, NotSerialized) // Event: Battery Charge between 20% and 60% +{ + SMB2 = 0xC8 +} + +Method (_Q43, 0, NotSerialized) // Event: Battery Charge between 60% and 100% +{ + SMB2 = 0xC9 +} + +Method (_Q44, 0, NotSerialized) // Event: AC Power Only +{ + SMB2 = 0xCA +} + +Method (_Q80, 0, NotSerialized) // Event: Volume Up +{ + Store ("EC: VOLUME_UP", Debug) +} + +Method (_Q81, 0, NotSerialized) // Event: Volume Down +{ + Store ("EC: VOLUME_DOWN", Debug) +} + +Method (_Q54, 0, NotSerialized) // Event: Power Button Press +{ + Store ("EC: PWRBTN", Debug) +} + +Method (_QF0, 0, NotSerialized) // Event: Temperature Report +{ + Store ("EC: Temperature Report", Debug) +} + +Method (_QF1, 0, NotSerialized) // Event: Temperature Trigger +{ + // Notify (SEN3, 0x90) +} + +/* + * The below events are unique to this platform. + */ + + +Method (_Q02, 0, NotSerialized) // Event: APP +{ + Store ("EC: APP", Debug) +} + +Method (_Q82, 0, NotSerialized) // Event: MIC +{ + Store ("EC: MIC", Debug) +} + +Method (_Q83, 0, NotSerialized) // Event: MUTE +{ + Store ("EC: MUTE", Debug) +} diff --git a/src/ec/starlabs/merlin/variants/glk/ecdefs.h b/src/ec/starlabs/merlin/variants/glk/ecdefs.h new file mode 100644 index 0000000..5f43991 --- /dev/null +++ b/src/ec/starlabs/merlin/variants/glk/ecdefs.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <assert.h> +#include <stdint.h> + +/* + * EC communication interface for ITE Embedded Controller. + */ + +#ifndef _EC_STARLABS_GLK_EC_DEFS_H +#define _EC_STARLABS_GLK_EC_DEFS_H + +/* IT8987 chip ID byte values. */ +#define ITE_CHIPID_VAL 0x8987 + +/* EC RAM offsets. */ +#define ECRAM_TRACKPAD_STATE 0x14 +#define ECRAM_KBL_STATE 0x18 +#define ECRAM_KBL_BRIGHTNESS 0x19 +#define ECRAM_KBL_TIMEOUT 0x1a +#define ECRAM_FN_LOCK_STATE 0x2c +#define ECRAM_FN_CTRL_REVERSE 0x2d +#define ECRAM_MAX_CHARGE 0x46 +#define ECRAM_FAN_MODE dead_code_t(uint8_t) + +#endif diff --git a/src/ec/starlabs/merlin/variants/glk/emem.asl b/src/ec/starlabs/merlin/variants/glk/emem.asl new file mode 100644 index 0000000..8341bf2 --- /dev/null +++ b/src/ec/starlabs/merlin/variants/glk/emem.asl @@ -0,0 +1,173 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +OperationRegion (ECF2, EmbeddedControl, 0x00, 0x100) +Field (ECF2, ByteAcc, Lock, Preserve) +{ + Offset(0x00), + ECMV, 8, // Major Version Number + ECSV, 8, // Minor Version Number + KBVS, 8, // Keyboard Controller Version + ECTV, 8, // Test Version Number + FRMF, 8, // Force Mirror Flag + TXEL, 8, // TXE Lock + + Offset(0x10), + CPWR, 8, // Control Power + CDEV, 8, // Control Device + OSFG, 8, // OS Flag + CWFU, 8, // CW2015 Full + TPLA, 8, // Trackpad State + AFG3, 8, // After G3 + CLTP, 8, // Close Trackpad + WKOL, 8, // Wake on Lid + KLSE, 8, // Keyboard Backlight State + KLBE, 8, // Keyboard Backlight Brightness + + Offset(0x1a), + KLTE, 8, // Keyboard Backlight Timeout + + Offset(0x22), + ECT0, 8, // EC Build Time 0 + ECT1, 8, // EC Build Time 1 + ECT2, 8, // EC Build Time 2 + ECT3, 8, // EC Build Time 3 + ECT4, 8, // EC Build Time 4 + ECT5, 8, // EC Build Time 5 + ECT6, 8, // EC Build Time 6 + ECT7, 8, // EC Build Time 7 + ECT8, 8, // EC Build Time 8 + ECT9, 8, // EC Build Time 9 + + Offset(0x2c), + FLKA, 8, // Function Lock State + + Offset(0x30), + STEF, 8, // Sensor T Error F + ECD0, 8, // EC Build Date 0 + ECD1, 8, // EC Build Date 1 + ECD2, 8, // EC Build Date 2 + ECD3, 8, // EC Build Date 3 + ECD4, 8, // EC Build Date 4 + ECD5, 8, // EC Build Date 5 + ECD6, 8, // EC Build Date 6 + ECD7, 8, // EC Build Date 7 + ECD8, 8, // EC Build Date 8 + ECD9, 8, // EC Build Date 9 + + Offset(0x40), + SHIP, 8, // Shipping Mode Flag + LEDF, 8, // LED Control Flag + LIDF, 8, // Lid Flag + KBFL, 8, // Keyboard Flag + CYCC, 8, // Cycle Count + + Offset(0x46), + BFCP, 8, // Battery Full Charge Percentage + + Offset(0x62), + TSE2, 8, // Sensor 2 Temperature + SENF, 8, // Sensor F + TSHT, 8, // Thermal Sensor High Trip Point + TSLT, 8, // Thermal Sensor Low Trip Point + THER, 8, // Thermal Source + + Offset(0x70), + CPUT, 8, // PECI CPU Temperature + PMXT, 8, // PLMX Temperature + CHAR, 8, // Charger Temperature + + Offset(0x7e), + OCTF, 8, // OEM Control Flag + LSTE, 1, // Lid Status + , 7, // Reserved + + Offset(0x80), + ECPS, 8, // AC & Battery status + B1MN, 8, // Battery Model Number Code + B1SN, 16, // Battery Serial Number + B1DC, 16, // Battery Design Capacity + B1DV, 16, // Battery Design Voltage + B1FC, 16, // Battery Last Full Charge Capacity + B1TP, 16, // Battery Trip Point + B1ST, 8, // Battery State + B1PR, 16, // Battery Present Rate + B1RC, 16, // Battery Remaining Capacity + B1PV, 16, // Battery Present Voltage + BPRP, 8, // Battery Remaining percentage + BT1A, 8, // Bt1 ASOC + BT1T, 16, // Bt1 Temperature + BT1C, 8, // Bt1 Control + + // Unicorn - doesn't actually exist + Offset(0x9d), + OPWE, 8, // OPM write to EC flag for UCSI + // Unicorn - doesn't actually exist + + Offset(0xbf), + EJ8A, 8, // EJ898A Firmware Version + + Offset(0xc0), + MGI0, 8, // UCSI DS MGI 0 + MGI1, 8, // UCSI DS MGI 1 + MGI2, 8, // UCSI DS MGI 2 + MGI3, 8, // UCSI DS MGI 3 + MGI4, 8, // UCSI DS MGI 4 + MGI5, 8, // UCSI DS MGI 5 + MGI6, 8, // UCSI DS MGI 6 + MGI7, 8, // UCSI DS MGI 7 + MGI8, 8, // UCSI DS MGI 8 + MGI9, 8, // UCSI DS MGI 9 + MGIA, 8, // UCSI DS MGI A + MGIB, 8, // UCSI DS MGI B + MGIC, 8, // UCSI DS MGI C + MGID, 8, // UCSI DS MGI D + MGIE, 8, // UCSI DS MGI E + MGIF, 8, // UCSI DS MGI F + + Offset(0xd0), + MGO0, 8, // UCSI DS MGO 0 + MGO1, 8, // UCSI DS MGO 1 + MGO2, 8, // UCSI DS MGO 2 + MGO3, 8, // UCSI DS MGO 3 + MGO4, 8, // UCSI DS MGO 4 + MGO5, 8, // UCSI DS MGO 5 + MGO6, 8, // UCSI DS MGO 6 + MGO7, 8, // UCSI DS MGO 7 + MGO8, 8, // UCSI DS MGO 8 + MGO9, 8, // UCSI DS MGO 9 + MGOA, 8, // UCSI DS MGO A + MGOB, 8, // UCSI DS MGO B + MGOC, 8, // UCSI DS MGO C + MGOD, 8, // UCSI DS MGO D + MGOE, 8, // UCSI DS MGO E + MGOF, 8, // UCSI DS MGO F + + Offset(0xe0), + UCSV, 16, // UCSI DS Version + UCSD, 16, // UCSI DS Reserved + CCI0, 8, // UCSI DS CCI 0 + CCI1, 8, // UCSI DS CCI 1 + CCI2, 8, // UCSI DS CCI 2 + CCI3, 8, // UCSI DS CCI 3 + CTL0, 8, // UCSI DS Control 0 + CTL1, 8, // UCSI DS Control 0 + CTL2, 8, // UCSI DS Control 0 + CTL3, 8, // UCSI DS Control 0 + CTL4, 8, // UCSI DS Control 0 + CTL5, 8, // UCSI DS Control 0 + CTL6, 8, // UCSI DS Control 0 + CTL7, 8, // UCSI DS Control 0 + + Offset(0xf0), + P0SD, 8, // PD Port Status DD + P0S4, 8, // PD Port Status 4 + P0S5, 8, // PD Port Status 5 + P0SE, 8, // PD Port Status E + P0SA, 8, // PD Port Status 10 + P0SB, 8, // PD Port Status 11 + + Offset(0xfd), + STCD, 8, // Shutdown Code + EJ8R, 8, // EJ898A Need Reboot + EJ8E, 8, // EJ898A Error +} diff --git a/src/ec/starlabs/merlin/variants/glk/events.asl b/src/ec/starlabs/merlin/variants/glk/events.asl new file mode 100644 index 0000000..5271d8e --- /dev/null +++ b/src/ec/starlabs/merlin/variants/glk/events.asl @@ -0,0 +1,99 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Method (_Q0D, 0, NotSerialized) // Event: Lid Opened +{ + \LIDS = LSTE + Notify (LID0, 0x80) +} + +Method (_Q0C, 0, NotSerialized) // Event: Lid Closed +{ + \LIDS = LSTE + Notify (LID0, 0x80) +} + +Method (_Q0A, 0, NotSerialized) // Event: AC Power Connected +{ + Notify (BAT0, 0x81) + Notify (ADP1, 0x80) +} + +Method (_Q0B, 0, NotSerialized) // Event: AC Power Disconnected +{ + Notify (BAT0, 0x81) + Notify (BAT0, 0x80) +} + +Method (_Q06, 0, NotSerialized) // Event: Backlight Brightness Down +{ + ^^^^HIDD.HPEM (20) +} + +Method (_Q07, 0, NotSerialized) // Event: Backlight Brightness Up +{ + ^^^^HIDD.HPEM (19) +} + +Method (_Q08, 0, NotSerialized) // Event: Function Lock +{ + FLKS = FLKA +} +// +// TODO: +// Below Q Events need to be added +// +// Method (_Q04, 0, NotSerialized) // Event: Trackpad Lock +// { +// TPLS = TPLA +// } +// +// Method (_Q__, 0, NotSerialized) // Event: Keyboard Backlight Brightness +// { +// KLBC = KLBE +// } +// + +Method (_Q99, 0, NotSerialized) // Event: Airplane Mode +{ + ^^^^HIDD.HPEM (8) +} + +Method (_QD5, 0, NotSerialized) // Event: 10 Second Power Button Pressed +{ + Notify (HIDD, 0xCE) +} + +Method (_QD6, 0, NotSerialized) // Event: 10 Second Power Button Released +{ + Notify (HIDD, 0xCF) +} + +Method (_Q22, 0, NotSerialized) // Event: CHARGER_T +{ + Store ("EC: CHARGER_T", Debug) +} + +Method (_Q80, 0, NotSerialized) // Event: Volume Up +{ + Store ("EC: VOLUME_UP", Debug) +} + +Method (_Q81, 0, NotSerialized) // Event: Volume Down +{ + Store ("EC: VOLUME_DOWN", Debug) +} + +Method (_Q54, 0, NotSerialized) // Event: Power Button Press +{ + Store ("EC: PWRBTN", Debug) +} + +Method (_QF0, 0, NotSerialized) // Event: Temperature Report +{ + Store ("EC: Temperature Report", Debug) +} + +Method (_QF1, 0, NotSerialized) // Event: Temperature Trigger +{ + // Notify (SEN3, 0x90) +} diff --git a/src/ec/starlabs/merlin/variants/kbl/ecdefs.h b/src/ec/starlabs/merlin/variants/kbl/ecdefs.h new file mode 100644 index 0000000..36cd020 --- /dev/null +++ b/src/ec/starlabs/merlin/variants/kbl/ecdefs.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* + * EC communication interface for ITE Embedded Controller + */ + +#ifndef _EC_STARLABS_KBL_EC_DEFS_H +#define _EC_STARLABS_KBL_EC_DEFS_H + +/* IT8987 chip ID byte values */ +#define ITE_CHIPID_VAL 0x8987 + +/* EC RAM offsets */ +#define ECRAM_TRACKPAD_STATE 0x14 +#define ECRAM_KBL_STATE 0x18 +#define ECRAM_KBL_BRIGHTNESS 0x19 +#define ECRAM_KBL_TIMEOUT 0x1a +#define ECRAM_FN_LOCK_STATE 0x2c +#define ECRAM_FAN_MODE 0x42 +#define ECRAM_FN_CTRL_REVERSE 0x43 +#define ECRAM_MAX_CHARGE 0xff /* TODO: Add */ + +#endif diff --git a/src/ec/starlabs/merlin/variants/kbl/emem.asl b/src/ec/starlabs/merlin/variants/kbl/emem.asl new file mode 100644 index 0000000..2959632 --- /dev/null +++ b/src/ec/starlabs/merlin/variants/kbl/emem.asl @@ -0,0 +1,160 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +OperationRegion (ECF2, EmbeddedControl, 0x00, 0x100) +Field (ECF2, ByteAcc, Lock, Preserve) +{ + Offset(0x00), + ECMV, 8, // Major Version Number + ECSV, 8, // Minor Version Number + KBVS, 8, // Keyboard Controller Version + ECTV, 8, // Test Version Number + FRMF, 8, // Force Mirror Flag + + Offset(0x0c), + ECBY, 8, // Build Year + ECBM, 8, // Build Month + ECBD, 8, // Build Day + ECBI, 8, // Build Index + + Offset(0x10), + CPWR, 8, // Control Power + CDEV, 8, // Control Device + OSFG, 8, // OS Flag + + Offset(0x14), + TPLA, 8, // Trackpad State + + Offset(0x18), + KLSE, 8, // Keyboard Backlight State + KLBE, 8, // Keyboard Backlight Brightness + KLTE, 8, // Keyboard Backlight Timeout + + Offset(0x20), + TCHC, 8, // Thermal Charge CMD + TCHF, 8, // Thermal Charge Flag + + Offset(0x2c), + FLKA, 8, // Function Lock State + + Offset(0x30), + STEF, 8, // Sensor T Error F + + Offset(0x40), + SHIP, 8, // Shipping Mode Flag + + Offset(0x42), + FANM, 8, // Fan Mode + KBFL, 8, // Keyboard Flag + + Offset(0x50), + CHRA, 16, // Charge Rate + CHIC, 16, // Charge Input Current + CHVL, 16, // Charge Vlot + CHOP, 16, // Charge Option + + Offset(0x62), + TSE2, 8, // Sensor 2 Temperature + SENF, 8, // Sensor F + TSHT, 8, // Thermal Sensor High Trip Point + TSLT, 8, // Thermal Sensor Low Trip Point + THER, 8, // Thermal Source + + + Offset(0x70), + CPUT, 8, // PECI CPU Temperature + PMXT, 8, // PLMX Temperature + CHAR, 8, // Charger Temperature + + Offset(0x7e), + OCTF, 8, // OEM Control Flag + LSTE, 1, // Lid Status + , 7, // Reserved + + Offset(0x80), + ECPS, 8, // AC & Battery status + B1MN, 8, // Battery Model Number Code + B1SN, 16, // Battery Serial Number + B1DC, 16, // Battery Design Capacity + B1DV, 16, // Battery Design Voltage + B1FC, 16, // Battery Last Full Charge Capacity + B1TP, 16, // Battery Trip Point + B1ST, 8, // Battery State + B1PR, 16, // Battery Present Rate + B1RC, 16, // Battery Remaining Capacity + B1PV, 16, // Battery Present Voltage + BPRP, 8, // Battery Remaining percentage + BT1A, 8, // Bt1 ASOC + + // Unicorn - doesn't actually exist + Offset(0x9d), + OPWE, 8, // OPM write to EC flag for UCSI + // Unicorn - doesn't actually exist + + Offset(0xbf), + EJ8A, 8, // EJ898A Firmware Version + + Offset(0xc0), + MGI0, 8, // UCSI DS MGI 0 + MGI1, 8, // UCSI DS MGI 1 + MGI2, 8, // UCSI DS MGI 2 + MGI3, 8, // UCSI DS MGI 3 + MGI4, 8, // UCSI DS MGI 4 + MGI5, 8, // UCSI DS MGI 5 + MGI6, 8, // UCSI DS MGI 6 + MGI7, 8, // UCSI DS MGI 7 + MGI8, 8, // UCSI DS MGI 8 + MGI9, 8, // UCSI DS MGI 9 + MGIA, 8, // UCSI DS MGI A + MGIB, 8, // UCSI DS MGI B + MGIC, 8, // UCSI DS MGI C + MGID, 8, // UCSI DS MGI D + MGIE, 8, // UCSI DS MGI E + MGIF, 8, // UCSI DS MGI F + + Offset(0xd0), + MGO0, 8, // UCSI DS MGO 0 + MGO1, 8, // UCSI DS MGO 1 + MGO2, 8, // UCSI DS MGO 2 + MGO3, 8, // UCSI DS MGO 3 + MGO4, 8, // UCSI DS MGO 4 + MGO5, 8, // UCSI DS MGO 5 + MGO6, 8, // UCSI DS MGO 6 + MGO7, 8, // UCSI DS MGO 7 + MGO8, 8, // UCSI DS MGO 8 + MGO9, 8, // UCSI DS MGO 9 + MGOA, 8, // UCSI DS MGO A + MGOB, 8, // UCSI DS MGO B + MGOC, 8, // UCSI DS MGO C + MGOD, 8, // UCSI DS MGO D + MGOE, 8, // UCSI DS MGO E + MGOF, 8, // UCSI DS MGO F + + Offset(0xe0), + UCSV, 16, // UCSI DS Version + UCSD, 16, // UCSI DS Reserved + CCI0, 8, // UCSI DS CCI 0 + CCI1, 8, // UCSI DS CCI 1 + CCI2, 8, // UCSI DS CCI 2 + CCI3, 8, // UCSI DS CCI 3 + CTL0, 8, // UCSI DS Control 0 + CTL1, 8, // UCSI DS Control 0 + CTL2, 8, // UCSI DS Control 0 + CTL3, 8, // UCSI DS Control 0 + CTL4, 8, // UCSI DS Control 0 + CTL5, 8, // UCSI DS Control 0 + CTL6, 8, // UCSI DS Control 0 + CTL7, 8, // UCSI DS Control 0 + + Offset(0xf0), + P0SD, 8, // PD Port Status DD + P0S4, 8, // PD Port Status 4 + P0S5, 8, // PD Port Status 5 + P0SE, 8, // PD Port Status E + P0SA, 8, // PD Port Status 10 + P0SB, 8, // PD Port Status 11 + + Offset(0xfd), + STCD, 8, // Shutdown Code + EJ8R, 8, // EJ898A Need Reboot + EJ8E, 8, // EJ898A Error +} diff --git a/src/ec/starlabs/merlin/variants/kbl/events.asl b/src/ec/starlabs/merlin/variants/kbl/events.asl new file mode 100644 index 0000000..d546632 --- /dev/null +++ b/src/ec/starlabs/merlin/variants/kbl/events.asl @@ -0,0 +1,275 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Method (_Q0D, 0, NotSerialized) // Event: Lid Opened +{ + \LIDS = LSTE + Notify (LID0, 0x80) +} + +Method (_Q0C, 0, NotSerialized) // Event: Lid Closed +{ + \LIDS = LSTE + Notify (LID0, 0x80) +} + +Method (_Q0A, 0, NotSerialized) // Event: AC Power Connected +{ + Notify (BAT0, 0x81) + Notify (ADP1, 0x80) +} + +Method (_Q0B, 0, NotSerialized) // Event: AC Power Disconnected +{ + Notify (BAT0, 0x81) + Notify (BAT0, 0x80) +} + +Method (_Q06, 0, NotSerialized) // Event: Backlight Brightness Down +{ + ^^^^HIDD.HPEM (20) +} + +Method (_Q07, 0, NotSerialized) // Event: Backlight Brightness Up +{ + ^^^^HIDD.HPEM (19) +} + +Method (_Q08, 0, NotSerialized) // Event: Function Lock +{ + FLKS = FLKA +} +// +// TODO: +// Below Q Events need to be added +// +// Method (_Q04, 0, NotSerialized) // Event: Trackpad Lock +// { +// TPLS = TPLA +// } +// +// Method (_Q__, 0, NotSerialized) // Event: Keyboard Backlight Brightness +// { +// KLBC = KLBE +// KLSC = KLSE +// } +// + +Method (_Q99, 0, NotSerialized) // Event: Airplane Mode +{ + ^^^^HIDD.HPEM (8) +} + +Method (_QD5, 0, NotSerialized) // Event: 10 Second Power Button Pressed +{ + Notify (HIDD, 0xCE) +} + +Method (_QD6, 0, NotSerialized) // Event: 10 Second Power Button Released +{ + Notify (HIDD, 0xCF) +} + +Method (_Q22, 0, NotSerialized) // Event: CHARGER_T +{ + Store ("EC: CHARGER_T", Debug) +} + +// +// TODO: +// Below Q Events need to be added +// +// Method (_Q40, 0, NotSerialized) // Event: AC and DC Power +// { +// SMB2 = 0xC6 +// } +// +// Method (_Q41, 0, NotSerialized) // Event: Battery Charge between 0% and 20% +// { +// SMB2 = 0xC7 +// } +// +// Method (_Q42, 0, NotSerialized) // Event: Battery Charge between 20% and 60% +// { +// SMB2 = 0xC8 +// } +// +// Method (_Q43, 0, NotSerialized) // Event: Battery Charge between 60% and 100% +// { +// SMB2 = 0xC9 +// } +// +// Method (_Q44, 0, NotSerialized) // Event: AC Power Only +// { +// SMB2 = 0xCA +// } + +Method (_Q80, 0, NotSerialized) // Event: Volume Up +{ + Store ("EC: VOLUME_UP", Debug) +} + +Method (_Q81, 0, NotSerialized) // Event: Volume Down +{ + Store ("EC: VOLUME_DOWN", Debug) +} + +Method (_Q54, 0, NotSerialized) // Event: Power Button Press +{ + Store ("EC: PWRBTN", Debug) +} + +Method (_QF0, 0, NotSerialized) // Event: Temperature Report +{ + Store ("EC: Temperature Report", Debug) +} + +Method (_QF1, 0, NotSerialized) // Event: Temperature Trigger +{ + // Notify (SEN3, 0x90) +} + +/* + * The below events are unique to this platform. + */ + + +Method (_Q85, 0, NotSerialized) // Event: HOME +{ + Store ("EC: HOME", Debug) +} + +Method (_Q79, 0, NotSerialized) // Event: USB Type-C +{ + Store ("EC: USB Type-C", Debug) + UCEV() +} + +Method (_Q0E, 0, NotSerialized) // Event: SLEEP +{ + Store ("EC: SLEEP", Debug) +} + +Method (_Q13, 0, NotSerialized) // Event: BRIGHTNESS +{ + Store ("EC: BRIGHTNESS", Debug) +} + +Method (_Q20, 0, NotSerialized) // Event: CPU_T +{ + Store ("EC: CPU_T", Debug) +} + +Method (_Q21, 0, NotSerialized) // Event: SKIN_T +{ + Store ("EC: SKIN_T", Debug) +} + +Method (_Q30, 0, NotSerialized) // Event: THROT_OFF +{ + Store ("EC: THROT_OFF", Debug) +} + +Method (_Q31, 0, NotSerialized) // Event: THROT_LV1 +{ + Store ("EC: THROT_LV1", Debug) +} + +Method (_Q32, 0, NotSerialized) // Event: THROT_LV2 +{ + Store ("EC: THROT_LV2", Debug) +} + +Method (_Q33, 0, NotSerialized) // Event: THROT_LV3 +{ + Store ("EC: THROT_LV3", Debug) +} + +Method (_Q34, 0, NotSerialized) // Event: THROT_LV4 +{ + Store ("EC: THROT_LV4", Debug) +} + +Method (_Q35, 0, NotSerialized) // Event: THROT_LV5 +{ + Store ("EC: THROT_LV5", Debug) +} + +Method (_Q36, 0, NotSerialized) // Event: THROT_LV6 +{ + Store ("EC: THROT_LV6", Debug) +} + +Method (_Q37, 0, NotSerialized) // Event: THROT_LV7 +{ + Store ("EC: THROT_LV7", Debug) +} + +Method (_Q38, 0, NotSerialized) // Event: CPU_DN_SPEED +{ + Store ("EC: CPU_DN_SPEED", Debug) +} + +Method (_Q3C, 0, NotSerialized) // Event: CPU_UP_SPEED +{ + Store ("EC: CPU_UP_SPEED", Debug) +} + +Method (_Q3D, 0, NotSerialized) // Event: CPU_TURBO_OFF +{ + Store ("EC: CPU_TURBO_OFF", Debug) +} + +Method (_Q3E, 0, NotSerialized) // Event: CPU_TURBO_ON +{ + Store ("EC: CPU_TURBO_ON", Debug) +} + +Method (_Q3F, 0, NotSerialized) // Event: SHUTDOWN +{ + Store ("EC: SHUTDOWN", Debug) +} + +Method (_Q01, 0, NotSerialized) // Event: F1 Hot Key +{ + Store ("EC: F1", Debug) +} + +Method (_Q02, 0, NotSerialized) // Event: F2 Hot Key +{ + Store ("EC: F2", Debug) +} + +Method (_Q03, 0, NotSerialized) // Event: F3 Hot Key +{ + Store ("EC: F3", Debug) +} + +Method (_Q04, 0, NotSerialized) // Event: F4 Hot Key +{ + Store ("EC: F4", Debug) +} + +Method (_Q05, 0, NotSerialized) // Event: F5 Hot Key +{ + Store ("EC: F5", Debug) +} + +Method (_Q09, 0, NotSerialized) // Event: F9 Hot Key +{ + Store ("EC: F9", Debug) +} + +Method (_Q10, 0, NotSerialized) // Event: F10 Hot Key +{ + Store ("EC: F10", Debug) +} + +Method (_Q11, 0, NotSerialized) // Event: F11 Hot Key +{ + Store ("EC: F11", Debug) +} + +Method (_Q12, 0, NotSerialized) // Event: F12 Hot Key +{ + Store ("EC: F6", Debug) +} diff --git a/src/ec/starlabs/merlin/variants/merlin/ecdefs.h b/src/ec/starlabs/merlin/variants/merlin/ecdefs.h new file mode 100644 index 0000000..48357d9 --- /dev/null +++ b/src/ec/starlabs/merlin/variants/merlin/ecdefs.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* + * EC communication interface for ITE Embedded Controller + */ + +#ifndef _EC_STARLABS_MERLIN_EC_DEFS_H +#define _EC_STARLABS_MERLIN_EC_DEFS_H + +/* IT5570 chip ID byte values */ +#define ITE_CHIPID_VAL 0x5570 + +/* EC RAM offsets */ +#define ECRAM_FN_CTRL_REVERSE 0x30 +#define ECRAM_FN_LOCK_STATE 0x31 +#define ECRAM_TRACKPAD_STATE 0x32 +#define ECRAM_KBL_BRIGHTNESS 0x33 +#define ECRAM_KBL_STATE 0x34 +#define ECRAM_KBL_TIMEOUT 0x35 +#define ECRAM_FAN_MODE 0x50 +#define ECRAM_MAX_CHARGE 0x51 + +#endif diff --git a/src/ec/starlabs/merlin/variants/merlin/emem.asl b/src/ec/starlabs/merlin/variants/merlin/emem.asl new file mode 100644 index 0000000..9af8464 --- /dev/null +++ b/src/ec/starlabs/merlin/variants/merlin/emem.asl @@ -0,0 +1,161 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +OperationRegion (ECF2, EmbeddedControl, 0x00, 0x100) +Field (ECF2, ByteAcc, Lock, Preserve) +{ + Offset(0x00), // Versions: + SKUI, 8, // SKU ID + BDID, 8, // Board ID + ECMV, 8, // Major Version Number + ECSV, 8, // Minor Version Number + KBVS, 8, // Keyboard Controller Version + ECTV, 8, // Test Version Number + OSFG, 8, // OS Flag + + Offset(0x10), // Build Time: + ECT0, 8, // EC Build Time 0 + ECT1, 8, // EC Build Time 1 + ECT2, 8, // EC Build Time 2 + ECT3, 8, // EC Build Time 3 + ECT4, 8, // EC Build Time 4 + ECT5, 8, // EC Build Time 5 + ECT6, 8, // EC Build Time 6 + ECT7, 8, // EC Build Time 7 + ECT8, 8, // EC Build Time 8 + ECT9, 8, // EC Build Time 9 + + Offset(0x20), // Build Date: + ECD0, 8, // EC Build Date 0 + ECD1, 8, // EC Build Date 1 + ECD2, 8, // EC Build Date 2 + ECD3, 8, // EC Build Date 3 + ECD4, 8, // EC Build Date 4 + ECD5, 8, // EC Build Date 5 + ECD6, 8, // EC Build Date 6 + ECD7, 8, // EC Build Date 7 + ECD8, 8, // EC Build Date 8 + ECD9, 8, // EC Build Date 9 + + Offset(0x30), // Keyboard: + FCLA, 8, // Fn Ctrl Reverse + FLKA, 8, // Function Lock State + TPLA, 8, // Trackpad State + KLBE, 8, // Keyboard Backlight Brightness + KLSE, 8, // Keyboard Backlight State + KLTE, 8, // Keyboard Backlight Timeout + + Offset(0x40), // Flags: + SHIP, 8, // Shipping Mode Flag + CSFG, 8, // Modern Standby Flag + KBCD, 8, // Rotate Flag + WIFI, 8, // WiFi Enable + AUDI, 8, // Control Audio + + Offset(0x50), // Devices: + FANM, 8, // Fan Mode + BFCP, 8, // Battery Full Charge Percentage + + Offset(0x60), // Recovery: + BSRC, 8, // BIOS Recover + + Offset(0x70), // Temperatures: + TSE1, 8, // Sensor 1 Temperature + TSE2, 8, // Sensor 2 Temperature + TSE3, 8, // Sensor 3 Temperature + SENF, 8, // Sensor F + TSHT, 8, // Thermal Sensor High Trip Point + TSLT, 8, // Thermal Sensor Low Trip Point + THER, 8, // Thermal Source + SURF, 8, // Chassis Surface Temperature + CHAR, 8, // Charger Temperature + CPUT, 8, // PECI CPU Temperature + PMXT, 8, // PLMX Temperature + + Offset(0x7f), // Lid: + LSTE, 1, // Lid Status + , 7, // Reserved + + Offset(0x80), // Battery: + ECPS, 8, // AC & Battery status + B1MN, 8, // Battery Model Number Code + B1SN, 16, // Battery Serial Number + B1DC, 16, // Battery Design Capacity + B1DV, 16, // Battery Design Voltage + B1FC, 16, // Battery Last Full Charge Capacity + B1TP, 16, // Battery Trip Point + B1ST, 8, // Battery State + B1PR, 16, // Battery Present Rate + B1RC, 16, // Battery Remaining Capacity + B1PV, 16, // Battery Present Voltage + BPRP, 8, // Battery Remaining percentage + BATT, 16, // Battery Temperature + BATC, 8, // Battery Temperature Ces + + // Unicorn - doesn't actually exist + Offset(0x9d), // OPM: + OPWE, 8, // OPM write to EC flag for UCSI + // Unicorn - doesn't actually exist + + Offset(0xb0), // MGO; + MGO0, 8, // UCSI DS MGO 0 + MGO1, 8, // UCSI DS MGO 1 + MGO2, 8, // UCSI DS MGO 2 + MGO3, 8, // UCSI DS MGO 3 + MGO4, 8, // UCSI DS MGO 4 + MGO5, 8, // UCSI DS MGO 5 + MGO6, 8, // UCSI DS MGO 6 + MGO7, 8, // UCSI DS MGO 7 + MGO8, 8, // UCSI DS MGO 8 + MGO9, 8, // UCSI DS MGO 9 + MGOA, 8, // UCSI DS MGO A + MGOB, 8, // UCSI DS MGO B + MGOC, 8, // UCSI DS MGO C + MGOD, 8, // UCSI DS MGO D + MGOE, 8, // UCSI DS MGO E + MGOF, 8, // UCSI DS MGO F + + Offset(0xc0), // CCI: + UCSV, 16, // UCSI DS Version + UCSD, 16, // UCSI DS Reserved + CCI0, 8, // UCSI DS CCI 0 + CCI1, 8, // UCSI DS CCI 1 + CCI2, 8, // UCSI DS CCI 2 + CCI3, 8, // UCSI DS CCI 3 + CTL0, 8, // UCSI DS Control 0 + CTL1, 8, // UCSI DS Control 0 + CTL2, 8, // UCSI DS Control 0 + CTL3, 8, // UCSI DS Control 0 + CTL4, 8, // UCSI DS Control 0 + CTL5, 8, // UCSI DS Control 0 + CTL6, 8, // UCSI DS Control 0 + CTL7, 8, // UCSI DS Control 0 + + Offset(0xd0), // MGI: + MGI0, 8, // UCSI DS MGI 0 + MGI1, 8, // UCSI DS MGI 1 + MGI2, 8, // UCSI DS MGI 2 + MGI3, 8, // UCSI DS MGI 3 + MGI4, 8, // UCSI DS MGI 4 + MGI5, 8, // UCSI DS MGI 5 + MGI6, 8, // UCSI DS MGI 6 + MGI7, 8, // UCSI DS MGI 7 + MGI8, 8, // UCSI DS MGI 8 + MGI9, 8, // UCSI DS MGI 9 + MGIA, 8, // UCSI DS MGI A + MGIB, 8, // UCSI DS MGI B + MGIC, 8, // UCSI DS MGI C + MGID, 8, // UCSI DS MGI D + MGIE, 8, // UCSI DS MGI E + MGIF, 8, // UCSI DS MGI F + + Offset(0xe6), // Delays: + ECWD, 16, // EC Wakeup Delay + ECWE, 8, // EC Wakeup Enable + + Offset(0xf7), // Thunderbolt: + TBTC, 8, // Thunderbolt Command + TBTP, 8, // Thunderbolt Data Port + TBTD, 8, // Thunderbolt Data + TBTA, 8, // Thunderbolt Acknowledge + TBTG, 16, // Thunderbolt DBG Data +} diff --git a/src/ec/starlabs/merlin/variants/merlin/events.asl b/src/ec/starlabs/merlin/variants/merlin/events.asl new file mode 100644 index 0000000..bd1516e --- /dev/null +++ b/src/ec/starlabs/merlin/variants/merlin/events.asl @@ -0,0 +1,280 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Method (_Q0D) // Event: Lid Opened +{ + \LIDS = LSTE + Notify (LID0, 0x80) +} + +Method (_Q0C) // Event: Lid Closed +{ + \LIDS = LSTE + Notify (LID0, 0x80) +} + +Method (_Q0A) // Event: AC Power Connected +{ + Notify (BAT0, 0x81) + Notify (ADP1, 0x80) +} + +Method (_Q0B, 0, NotSerialized) // Event: AC Power Disconnected +{ + Notify (BAT0, 0x81) + Notify (BAT0, 0x80) +} + +Method (_Q05) // Event: Backlight Brightness Down +{ + ^^^^HIDD.HPEM (20) +} + +Method (_Q06) // Event: Backlight Brightness Up +{ + ^^^^HIDD.HPEM (19) +} + +Method (_Q87) // Event: Function Lock +{ + FLKS = FLKA +} + +Method (_Q88) // Event: Trackpad Lock +{ + TPLS = TPLA +} +Method (_Q11) // Event: Keyboard Backlight Brightness +{ + KLBC = KLBE + KLSC = KLSE +} + +Method (_Q99) // Event: Airplane Mode +{ + ^^^^HIDD.HPEM (8) +} + +Method (_QD5) // Event: 10 Second Power Button Pressed +{ + Store ("EC: 10 Second Power Button Pressed", Debug) +} + +Method (_QD6) // Event: 10 Second Power Button Released +{ + Store ("EC: 10 Second Power Button Release", Debug) +} + +Method (_Q22, 0, NotSerialized) // Event: CHARGER_T +{ + Store ("EC: CHARGER_T", Debug) +} + +Method (_Q40) // Event: AC_DC +{ + SMB2 = 0xC6 +} + +Method (_Q41) // Event: DC_20_0 +{ + SMB2 = 0xC7 +} + +Method (_Q42) // Event: DC_60_20 +{ + SMB2 = 0xC9 +} + +Method (_Q43) // Event: DC_100_60 +{ + SMB2 = 0xC9 +} + +Method (_Q44) // Event: AC_ONLY +{ + SMB2 = 0xCA +} + +Method (_Q80, 0, NotSerialized) // Event: VOLUME_UP +{ + Store ("EC: VOLUME_UP", Debug) +} + +Method (_Q81, 0, NotSerialized) // Event: VOLUME_DOWN +{ + Store ("EC: VOLUME_DOWN", Debug) +} + +Method (_Q54, 0, NotSerialized) // Event: PWRBTN +{ + Store ("EC: PWRBTN", Debug) +} + +Method (_QF0) // Event: Temperature Report +{ + Store ("EC: Temperature Report", Debug) +} + +Method (_QF1) // Event: Temperature Trigger +{ + // Notify (SEN3, 0x90) +} + +/* + * The below events are unique to this platform. + */ + +Method (_Q79, 0, NotSerialized) // Event: USB Type-C +{ + Store ("EC: USB Type-C", Debug) + UCEV() +} + +Method (_Q85, 0, NotSerialized) // Event: HOME +{ + Store ("EC: HOME", Debug) +} + +Method (_Q01) // Event: F1 Hot Key +{ + Store ("EC: F1", Debug) +} + +Method (_Q02) // Event: F2 Hot Key +{ + Store ("EC: F2", Debug) +} + +Method (_Q03) // Event: F3 Hot Key +{ + Store ("EC: F3", Debug) +} + +Method (_Q04) // Event: F4 Hot Key +{ + Store ("EC: F4", Debug) +} + +Method (_Q08) // Event: F5 Hot Key +{ + Store ("EC: F5", Debug) +} + +Method (_Q09) // Event: F6 Hot Key +{ + Store ("EC: F6", Debug) +} + +Method (_Q07) // Event: F7 Hot Key +{ + Store ("EC: F7", Debug) +} + +Method (_Q10) // Event: F10 Hot Key +{ + Store ("EC: F10", Debug) +} + +Method (_Q12) // Event: F12 Hot Key +{ + Store ("EC: F6", Debug) +} + +Method (_Q0E, 0, NotSerialized) // Event: SLEEP +{ + Store ("EC: SLEEP", Debug) +} + +Method (_Q13, 0, NotSerialized) // Event: BRIGHTNESS +{ + Store ("EC: BRIGHTNESS", Debug) +} + +Method (_Q20, 0, NotSerialized) // Event: CPU_T +{ + Store ("EC: CPU_T", Debug) +} + +Method (_Q21, 0, NotSerialized) // Event: SKIN_T +{ + Store ("EC: SKIN_T", Debug) +} + +Method (_Q30, 0, NotSerialized) // Event: THROT_OFF +{ + Store ("EC: THROT_OFF", Debug) +} + +Method (_Q31, 0, NotSerialized) // Event: THROT_LV1 +{ + Store ("EC: THROT_LV1", Debug) +} + +Method (_Q32, 0, NotSerialized) // Event: THROT_LV2 +{ + Store ("EC: THROT_LV2", Debug) +} + +Method (_Q33, 0, NotSerialized) // Event: THROT_LV3 +{ + Store ("EC: THROT_LV3", Debug) +} + +Method (_Q34, 0, NotSerialized) // Event: THROT_LV4 +{ + Store ("EC: THROT_LV4", Debug) +} + +Method (_Q35, 0, NotSerialized) // Event: THROT_LV5 +{ + Store ("EC: THROT_LV5", Debug) +} + +Method (_Q36, 0, NotSerialized) // Event: THROT_LV6 +{ + Store ("EC: THROT_LV6", Debug) +} + +Method (_Q37, 0, NotSerialized) // Event: THROT_LV7 +{ + Store ("EC: THROT_LV7", Debug) +} + +Method (_Q38, 0, NotSerialized) // Event: CPU_DN_SPEED +{ + Store ("EC: CPU_DN_SPEED", Debug) +} + +Method (_Q3C, 0, NotSerialized) // Event: CPU_UP_SPEED +{ + Store ("EC: CPU_UP_SPEED", Debug) +} + +Method (_Q3D, 0, NotSerialized) // Event: CPU_TURBO_OFF +{ + Store ("EC: CPU_TURBO_OFF", Debug) +} + +Method (_Q3E, 0, NotSerialized) // Event: CPU_TURBO_ON +{ + Store ("EC: CPU_TURBO_ON", Debug) +} + +Method (_Q3F, 0, NotSerialized) // Event: SHUTDOWN +{ + Store ("EC: SHUTDOWN", Debug) +} + +Method (_Q45) // Event: SENSOR_T76 +{ + SMB2 = 0xCB +} + +Method (_Q48, 0, NotSerialized) // Event: Fan Turbo On +{ + Store ("EC: Fan Turbo On", Debug) +} + +Method (_Q49, 0, NotSerialized) // Event: Fan Turbo Off +{ + Store ("EC: Fan Turbo Off", Debug) +} diff --git a/src/ec/starlabs/merlin/variants/tgl/ecdefs.h b/src/ec/starlabs/merlin/variants/tgl/ecdefs.h new file mode 100644 index 0000000..3441bc0 --- /dev/null +++ b/src/ec/starlabs/merlin/variants/tgl/ecdefs.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* + * EC communication interface for ITE Embedded Controller + */ + +#ifndef _EC_STARLABS_TGL_EC_DEFS_H +#define _EC_STARLABS_TGL_EC_DEFS_H + +/* IT5570 chip ID byte values */ +#define ITE_CHIPID_VAL 0x5570 + +/* EC RAM offsets */ +#define ECRAM_KBL_BRIGHTNESS 0x09 +#define ECRAM_KBL_TIMEOUT 0x10 +#define ECRAM_KBL_STATE 0x0a +#define ECRAM_TRACKPAD_STATE 0x0c +#define ECRAM_FN_LOCK_STATE 0x0f +#define ECRAM_FN_CTRL_REVERSE 0x17 +#define ECRAM_MAX_CHARGE 0x1a +#define ECRAM_FAN_MODE 0x1b + +#endif diff --git a/src/ec/starlabs/merlin/variants/tgl/emem.asl b/src/ec/starlabs/merlin/variants/tgl/emem.asl new file mode 100644 index 0000000..f5eb1d0 --- /dev/null +++ b/src/ec/starlabs/merlin/variants/tgl/emem.asl @@ -0,0 +1,168 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +OperationRegion (ECF2, EmbeddedControl, 0x00, 0x100) +Field (ECF2, ByteAcc, Lock, Preserve) +{ + Offset(0x00), + ECMV, 8, // Major Version Number + ECSV, 8, // Minor Version Number + KBVS, 8, // Keyboard Controller Version + ECTV, 8, // Test Version Number + OSFG, 8, // OS Flag + FRMF, 8, // Force Mirror Flag + + Offset(0x07), + SKUI, 8, // SKU ID + CSFG, 8, // Modern Standby Flag + KLBE, 8, // Keyboard Backlight Brightness + KLSE, 8, // Keyboard Backlight State + BDID, 8, // Board ID + TPLA, 8, // Trackpad State + KBCD, 8, // Rotate Flag + WIFI, 8, // WiFi Enable + FLKA, 8, // Function Lock State + KLTE, 8, // Keyboard Backlight Timeout + + Offset(0x13), + AUDI, 8, // Control Audio + + Offset(0x15), + SURF, 8, // Chassis Surface Temperature + CHAR, 8, // Charger Temperature + FCLA, 8, // Fn Ctrl Reverse + + Offset(0x1a), + BFCP, 8, // Battery Full Charge Percentage + FANM, 8, // Fan Mode + + Offset(0x1d), + BSRC, 8, // BIOS Recover + + Offset(0x40), + SHIP, 8, // Shipping Mode Flag + ECT0, 8, // EC Build Time 0 + ECT1, 8, // EC Build Time 1 + ECT2, 8, // EC Build Time 2 + ECT3, 8, // EC Build Time 3 + ECT4, 8, // EC Build Time 4 + ECT5, 8, // EC Build Time 5 + ECT6, 8, // EC Build Time 6 + ECT7, 8, // EC Build Time 7 + ECT8, 8, // EC Build Time 8 + ECT9, 8, // EC Build Time 9 + + Offset(0x4B), + ECD0, 8, // EC Build Date 0 + ECD1, 8, // EC Build Date 1 + ECD2, 8, // EC Build Date 2 + ECD3, 8, // EC Build Date 3 + ECD4, 8, // EC Build Date 4 + ECD5, 8, // EC Build Date 5 + ECD6, 8, // EC Build Date 6 + ECD7, 8, // EC Build Date 7 + ECD8, 8, // EC Build Date 8 + ECD9, 8, // EC Build Date 9 + + Offset(0x62), + TSE2, 8, // Sensor 2 Temperature + SENF, 8, // Sensor F + TSHT, 8, // Thermal Sensor High Trip Point + TSLT, 8, // Thermal Sensor Low Trip Point + THER, 8, // Thermal Source + + Offset(0x68), + BATT, 16, // Battery Temperature + BATC, 8, // Battery Temperature Ces + + Offset(0x70), + CPUT, 8, // PECI CPU Temperature + PMXT, 8, // PLMX Temperature + TSE1, 8, // Sensor 1 Temperature + TSE3, 8, // Sensor 3 Temperature + + Offset(0x7f), + LSTE, 1, // Lid Status + , 7, // Reserved + + Offset(0x80), + ECPS, 8, // AC & Battery status + B1MN, 8, // Battery Model Number Code + B1SN, 16, // Battery Serial Number + B1DC, 16, // Battery Design Capacity + B1DV, 16, // Battery Design Voltage + B1FC, 16, // Battery Last Full Charge Capacity + B1TP, 16, // Battery Trip Point + B1ST, 8, // Battery State + B1PR, 16, // Battery Present Rate + B1RC, 16, // Battery Remaining Capacity + B1PV, 16, // Battery Present Voltage + BPRP, 8, // Battery Remaining percentage + + // Unicorn - doesn't actually exist + Offset(0x9d), + OPWE, 8, // OPM write to EC flag for UCSI + // Unicorn - doesn't actually exist + + Offset(0xb0), + MGO0, 8, // UCSI DS MGO 0 + MGO1, 8, // UCSI DS MGO 1 + MGO2, 8, // UCSI DS MGO 2 + MGO3, 8, // UCSI DS MGO 3 + MGO4, 8, // UCSI DS MGO 4 + MGO5, 8, // UCSI DS MGO 5 + MGO6, 8, // UCSI DS MGO 6 + MGO7, 8, // UCSI DS MGO 7 + MGO8, 8, // UCSI DS MGO 8 + MGO9, 8, // UCSI DS MGO 9 + MGOA, 8, // UCSI DS MGO A + MGOB, 8, // UCSI DS MGO B + MGOC, 8, // UCSI DS MGO C + MGOD, 8, // UCSI DS MGO D + MGOE, 8, // UCSI DS MGO E + MGOF, 8, // UCSI DS MGO F + + Offset(0xc0), + UCSV, 16, // UCSI DS Version + UCSD, 16, // UCSI DS Reserved + CCI0, 8, // UCSI DS CCI 0 + CCI1, 8, // UCSI DS CCI 1 + CCI2, 8, // UCSI DS CCI 2 + CCI3, 8, // UCSI DS CCI 3 + CTL0, 8, // UCSI DS Control 0 + CTL1, 8, // UCSI DS Control 0 + CTL2, 8, // UCSI DS Control 0 + CTL3, 8, // UCSI DS Control 0 + CTL4, 8, // UCSI DS Control 0 + CTL5, 8, // UCSI DS Control 0 + CTL6, 8, // UCSI DS Control 0 + CTL7, 8, // UCSI DS Control 0 + + Offset(0xd0), + MGI0, 8, // UCSI DS MGI 0 + MGI1, 8, // UCSI DS MGI 1 + MGI2, 8, // UCSI DS MGI 2 + MGI3, 8, // UCSI DS MGI 3 + MGI4, 8, // UCSI DS MGI 4 + MGI5, 8, // UCSI DS MGI 5 + MGI6, 8, // UCSI DS MGI 6 + MGI7, 8, // UCSI DS MGI 7 + MGI8, 8, // UCSI DS MGI 8 + MGI9, 8, // UCSI DS MGI 9 + MGIA, 8, // UCSI DS MGI A + MGIB, 8, // UCSI DS MGI B + MGIC, 8, // UCSI DS MGI C + MGID, 8, // UCSI DS MGI D + MGIE, 8, // UCSI DS MGI E + MGIF, 8, // UCSI DS MGI F + + Offset(0xe6), + ECWD, 16, // EC Wakeup Delay + ECWE, 8, // EC Wakeup Enable + + Offset(0xf7), + TBTC, 8, // Thunderbolt Command + TBTP, 8, // Thunderbolt Data Port + TBTD, 8, // Thunderbolt Data + TBTA, 8, // Thunderbolt Acknowledge + TBTG, 16, // Thunderbolt DBG Data +} diff --git a/src/ec/starlabs/merlin/variants/tgl/events.asl b/src/ec/starlabs/merlin/variants/tgl/events.asl new file mode 100644 index 0000000..ba09c8a --- /dev/null +++ b/src/ec/starlabs/merlin/variants/tgl/events.asl @@ -0,0 +1,279 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Method (_Q0D, 0, NotSerialized) // Event: Lid Opened +{ + \LIDS = LSTE + Notify (LID0, 0x80) +} + +Method (_Q0C, 0, NotSerialized) // Event: Lid Closed +{ + \LIDS = LSTE + Notify (LID0, 0x80) +} + +Method (_Q0A, 0, NotSerialized) // Event: AC Power Connected +{ + Notify (BAT0, 0x81) + Notify (ADP1, 0x80) +} + +Method (_Q0B, 0, NotSerialized) // Event: AC Power Disconnected +{ + Notify (BAT0, 0x81) + Notify (BAT0, 0x80) +} + +Method (_Q05, 0, NotSerialized) // Event: Backlight Brightness Down +{ + ^^^^HIDD.HPEM (20) +} + +Method (_Q06, 0, NotSerialized) // Event: Backlight Brightness Up +{ + ^^^^HIDD.HPEM (19) +} + +Method (_Q87, 0, NotSerialized) // Event: Function Lock +{ + FLKS = FLKA +} + +Method (_Q88, 0, NotSerialized) // Event: Trackpad Lock +{ + TPLS = TPLA +} +Method (_Q11) // Event: Keyboard Backlight Brightness +{ + KLBC = KLBE +} + +Method (_Q99, 0, NotSerialized) // Event: Airplane Mode +{ + ^^^^HIDD.HPEM (8) +} + +Method (_QD5, 0, NotSerialized) // Event: 10 Second Power Button Pressed +{ + Notify (HIDD, 0xCE) +} + +Method (_QD6, 0, NotSerialized) // Event: 10 Second Power Button Released +{ + Notify (HIDD, 0xCF) +} + +Method (_Q22, 0, NotSerialized) // Event: CHARGER_T +{ + Store ("EC: CHARGER_T", Debug) +} + +Method (_Q40, 0, NotSerialized) // Event: AC and DC Power +{ + SMB2 = 0xC6 +} + +Method (_Q41, 0, NotSerialized) // Event: Battery Charge between 0% and 20% +{ + SMB2 = 0xC7 +} + +Method (_Q42, 0, NotSerialized) // Event: Battery Charge between 20% and 60% +{ + SMB2 = 0xC8 +} + +Method (_Q43, 0, NotSerialized) // Event: Battery Charge between 60% and 100% +{ + SMB2 = 0xC9 +} + +Method (_Q44, 0, NotSerialized) // Event: AC Power Only +{ + SMB2 = 0xCA +} + +Method (_Q80, 0, NotSerialized) // Event: Volume Up +{ + Store ("EC: VOLUME_UP", Debug) +} + +Method (_Q81, 0, NotSerialized) // Event: Volume Down +{ + Store ("EC: VOLUME_DOWN", Debug) +} + +Method (_Q54, 0, NotSerialized) // Event: Power Button Press +{ + Store ("EC: PWRBTN", Debug) +} + +Method (_QF0, 0, NotSerialized) // Event: Temperature Report +{ + Store ("EC: Temperature Report", Debug) +} + +Method (_QF1, 0, NotSerialized) // Event: Temperature Trigger +{ + // Notify (SEN3, 0x90) +} + +/* + * The below events are unique to this platform. + */ + +Method (_Q79, 0, NotSerialized) // Event: USB Type-C +{ + Store ("EC: USB Type-C", Debug) + UCEV() +} + +Method (_Q85, 0, NotSerialized) // Event: HOME +{ + Store ("EC: HOME", Debug) +} + +Method (_Q01, 0, NotSerialized) // Event: F1 Hot Key +{ + Store ("EC: F1", Debug) +} + +Method (_Q02, 0, NotSerialized) // Event: F2 Hot Key +{ + Store ("EC: F2", Debug) +} + +Method (_Q03, 0, NotSerialized) // Event: F3 Hot Key +{ + Store ("EC: F3", Debug) +} + +Method (_Q04, 0, NotSerialized) // Event: F4 Hot Key +{ + Store ("EC: F4", Debug) +} + +Method (_Q08, 0, NotSerialized) // Event: F5 Hot Key +{ + Store ("EC: F5", Debug) +} + +Method (_Q09, 0, NotSerialized) // Event: F6 Hot Key +{ + Store ("EC: F6", Debug) +} + +Method (_Q07, 0, NotSerialized) // Event: F7 Hot Key +{ + Store ("EC: F7", Debug) +} + +Method (_Q10, 0, NotSerialized) // Event: F10 Hot Key +{ + Store ("EC: F10", Debug) +} + +Method (_Q12, 0, NotSerialized) // Event: F12 Hot Key +{ + Store ("EC: F6", Debug) +} + +Method (_Q0E, 0, NotSerialized) // Event: SLEEP +{ + Store ("EC: SLEEP", Debug) +} + +Method (_Q13, 0, NotSerialized) // Event: BRIGHTNESS +{ + Store ("EC: BRIGHTNESS", Debug) +} + +Method (_Q20, 0, NotSerialized) // Event: CPU_T +{ + Store ("EC: CPU_T", Debug) +} + +Method (_Q21, 0, NotSerialized) // Event: SKIN_T +{ + Store ("EC: SKIN_T", Debug) +} + +Method (_Q30, 0, NotSerialized) // Event: THROT_OFF +{ + Store ("EC: THROT_OFF", Debug) +} + +Method (_Q31, 0, NotSerialized) // Event: THROT_LV1 +{ + Store ("EC: THROT_LV1", Debug) +} + +Method (_Q32, 0, NotSerialized) // Event: THROT_LV2 +{ + Store ("EC: THROT_LV2", Debug) +} + +Method (_Q33, 0, NotSerialized) // Event: THROT_LV3 +{ + Store ("EC: THROT_LV3", Debug) +} + +Method (_Q34, 0, NotSerialized) // Event: THROT_LV4 +{ + Store ("EC: THROT_LV4", Debug) +} + +Method (_Q35, 0, NotSerialized) // Event: THROT_LV5 +{ + Store ("EC: THROT_LV5", Debug) +} + +Method (_Q36, 0, NotSerialized) // Event: THROT_LV6 +{ + Store ("EC: THROT_LV6", Debug) +} + +Method (_Q37, 0, NotSerialized) // Event: THROT_LV7 +{ + Store ("EC: THROT_LV7", Debug) +} + +Method (_Q38, 0, NotSerialized) // Event: CPU_DN_SPEED +{ + Store ("EC: CPU_DN_SPEED", Debug) +} + +Method (_Q3C, 0, NotSerialized) // Event: CPU_UP_SPEED +{ + Store ("EC: CPU_UP_SPEED", Debug) +} + +Method (_Q3D, 0, NotSerialized) // Event: CPU_TURBO_OFF +{ + Store ("EC: CPU_TURBO_OFF", Debug) +} + +Method (_Q3E, 0, NotSerialized) // Event: CPU_TURBO_ON +{ + Store ("EC: CPU_TURBO_ON", Debug) +} + +Method (_Q3F, 0, NotSerialized) // Event: SHUTDOWN +{ + Store ("EC: SHUTDOWN", Debug) +} + +Method (_Q45, 0, NotSerialized) // Event: SENSOR_T76 +{ + SMB2 = 0xCB +} + +Method (_Q48, 0, NotSerialized) // Event: Fan Turbo On +{ + Store ("EC: Fan Turbo On", Debug) +} + +Method (_Q49, 0, NotSerialized) // Event: Fan Turbo Off +{ + Store ("EC: Fan Turbo Off", Debug) +} -- To view, visit https://review.coreboot.org/c/coreboot/+/58343 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8023c26de23c874c84106fda96e64dcfa0c5ba32 Gerrit-Change-Number: 58343 Gerrit-PatchSet: 58 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/prodrive/hermes: Update r04 front audio config
by Arthur Heymans (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Patrick Rudolph, Christian Walter, Angel Pons. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59545 ) Change subject: mb/prodrive/hermes: Update r04 front audio config ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59545 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3760f0a25e964cf0eba99d180fd6f3e8488af868 Gerrit-Change-Number: 59545 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:28:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/prodrive/hermes: Number Ethernet devices
by Arthur Heymans (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Patrick Rudolph, Christian Walter, Angel Pons. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58628 ) Change subject: mb/prodrive/hermes: Number Ethernet devices ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58628 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a527298f84172f9135006083ad7e748dcc27911 Gerrit-Change-Number: 58628 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:28:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/prodrive/hermes: Number Ethernet devices
by Angel Pons (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Patrick Rudolph, Christian Walter, Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58628 ) Change subject: mb/prodrive/hermes: Number Ethernet devices ...................................................................... Patch Set 4: (1 comment) Patchset: PS3: > needs manual rebase Done -- To view, visit https://review.coreboot.org/c/coreboot/+/58628 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a527298f84172f9135006083ad7e748dcc27911 Gerrit-Change-Number: 58628 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:26:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/prodrive/hermes: Number Ethernet devices
by Angel Pons (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Patrick Rudolph, Christian Walter, Arthur Heymans. Hello build bot (Jenkins), Patrick Rudolph, Christian Walter, Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58628 to look at the new patch set (#4). Change subject: mb/prodrive/hermes: Number Ethernet devices ...................................................................... mb/prodrive/hermes: Number Ethernet devices The Prodrive Hermes mainboard has four i211 Ethernet NICs and an i210 Ethernet NIC, but their numbering isn't consistent with the PCIe root port function numbers. With only a M.2 SSD plugged in, Linux uses the following names: PHY 0 ---> enp6s0 PHY 1 ---> enp4s0 PHY 2 ---> enp3s0 PHY 3 ---> enp1s0 PHY 4 ---> enp2s0 These names change after adding or removing PCIe devices in slots connected to root ports that get enumerated before the NICs' root ports, because the assignment of secondary bus numbers depends on the enumeration order. Because of this, the "predictable" network interface names are not at all predictable, which is awful. To avoid this, describe the NICs using SMBIOS Type41 entries with the correct instance numbers. With this patch, Linux uses these names: PHY 0 ---> eno0 PHY 1 ---> eno1 PHY 2 ---> eno2 PHY 3 ---> eno3 PHY 4 ---> eno4 No matter what PCIe devices are present, these names don't change. Change-Id: I7a527298f84172f9135006083ad7e748dcc27911 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/prodrive/hermes/Kconfig M src/mainboard/prodrive/hermes/devicetree.cb 2 files changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/58628/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/58628 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a527298f84172f9135006083ad7e748dcc27911 Gerrit-Change-Number: 58628 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: security/intel/txt: Fix GETSEC checks in romstage
by Michał Żygowski (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Angel Pons. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59520 ) Change subject: security/intel/txt: Fix GETSEC checks in romstage ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59520/comment/57916b2b_4a7579eb PS3, Line 11: Also noticed that the lock bit : of IA32_FEATURE_CONTROL cannot be cleared by issuing neither global : reset nor full reset on Sandybridge/Ivybridge platforms which results : in a reset loop. > Huh, this is very unusual. SNB BWG says the MSR is locked "until an S5 reset occurs". Well, I was also surprised I cannot unlock this MSR with full_reset on Dell OptiPlex 9010. Fortunately, this MSR does not need to be set to call GETSEC CAPABILITIES or ENTERACCS according to Intel SDM -- To view, visit https://review.coreboot.org/c/coreboot/+/59520 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie9103041498f557b85019a56e1252090a4fcd0c9 Gerrit-Change-Number: 59520 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:24:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: security/intel/txt/ramstage.c: Fix HEAP_ACM element size calculation
by Michał Żygowski (Code Review) 22 Nov '21

22 Nov '21

Attention is currently required from: Angel Pons. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59519 ) Change subject: security/intel/txt/ramstage.c: Fix HEAP_ACM element size calculation ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59519/comment/855be015_bc855cc3 PS3, Line 7: Fix > Why is the original code wrong? I have explained that in the comment inside the code. In short the structure is too long if we have only the BIOS ACM -- To view, visit https://review.coreboot.org/c/coreboot/+/59519 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0c37a66d96e1ca3fb4d3f665e3ad35c6f1c5c1e Gerrit-Change-Number: 59519 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 22 Nov 2021 14:16:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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coreboot-gerrit November 2021