coreboot-gerrit November 2021

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Change in coreboot[master]: arch/arm64: Add PCI configuration interface
by Jianjun Wang (Code Review) 26 Nov '21

26 Nov '21

Jianjun Wang has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/56790 ) Change subject: arch/arm64: Add PCI configuration interface ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/56790 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccb3fd1f1f9c5074aea94db6c55d75df0789f5df Gerrit-Change-Number: 56790 Gerrit-PatchSet: 1 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: mb/google/brya/var/vell: update gpio override
by build bot (Jenkins) (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Kevin Chiu, Nick Vaccaro, Shon Wang. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59305 ) Change subject: mb/google/brya/var/vell: update gpio override ...................................................................... Patch Set 9: (7 comments) File src/mainboard/google/brya/variants/vell/gpio.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134423): https://review.coreboot.org/c/coreboot/+/59305/comment/0438e648_ce20eb2c PS9, Line 151: /* B4 : PROC_GP3 ==> SSD_PERST_L */ code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134423): https://review.coreboot.org/c/coreboot/+/59305/comment/2eca19ea_f18d8f92 PS9, Line 152: PAD_CFG_GPO(GPP_B4, 1, DEEP), code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134423): https://review.coreboot.org/c/coreboot/+/59305/comment/51568b14_567d51e5 PS9, Line 152: PAD_CFG_GPO(GPP_B4, 1, DEEP), please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134423): https://review.coreboot.org/c/coreboot/+/59305/comment/9ba6427d_d7b4fd02 PS9, Line 157: *num = ARRAY_SIZE(romstage_gpio_table); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134423): https://review.coreboot.org/c/coreboot/+/59305/comment/50c8a8c2_a873ef40 PS9, Line 157: *num = ARRAY_SIZE(romstage_gpio_table); please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134423): https://review.coreboot.org/c/coreboot/+/59305/comment/6282bb67_750b8360 PS9, Line 158: return romstage_gpio_table; code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134423): https://review.coreboot.org/c/coreboot/+/59305/comment/63fc1124_00d7bdaa PS9, Line 158: return romstage_gpio_table; please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/59305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc91866f7555c294af7eed9e5d1550e73d8059d0 Gerrit-Change-Number: 59305 Gerrit-PatchSet: 9 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Fri, 26 Nov 2021 02:27:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/vell: update gpio override
by Shon Wang (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Kevin Chiu, Nick Vaccaro, Shon Wang. Shon Wang has uploaded a new patch set (#9) to the change originally created by Kevin Chiu. ( https://review.coreboot.org/c/coreboot/+/59305 ) Change subject: mb/google/brya/var/vell: update gpio override ...................................................................... mb/google/brya/var/vell: update gpio override Configure GPIOs according to schematics Update initial gpio configuration for redrix BUG=b:205908918 TEST=emerge-brya coreboot Change-Id: Icc91866f7555c294af7eed9e5d1550e73d8059d0 Signed-off-by: Kevin Chiu <Kevin.Chiu(a)quantatw.com> --- A src/mainboard/google/brya/variants/vell/Makefile.inc A src/mainboard/google/brya/variants/vell/gpio.c 2 files changed, 174 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/59305/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/59305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc91866f7555c294af7eed9e5d1550e73d8059d0 Gerrit-Change-Number: 59305 Gerrit-PatchSet: 9 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: device/pci_device.c: Scan only one device for PCIe
by Jianjun Wang (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Shelley Chen, Furquan Shaikh, Paul Menzel. Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56788 ) Change subject: device/pci_device.c: Scan only one device for PCIe ...................................................................... Patch Set 3: (6 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56788/comment/3c21157d_7edd671b PS2, Line 9: device > downstream port. Done https://review.coreboot.org/c/coreboot/+/56788/comment/dce7dbd4_37301cbb PS2, Line 10: > Please document the motivation in the commit message. Done File src/device/pci_device.c: https://review.coreboot.org/c/coreboot/+/56788/comment/873716d2_d62d9e12 PS2, Line 1208: 3.1 > nit: spec r5.0 also has this section 7.3. […] Done https://review.coreboot.org/c/coreboot/+/56788/comment/df1db16f_7b6663c9 PS2, Line 1226: if > You don't really need an if here. It can be simply: […] Done https://review.coreboot.org/c/coreboot/+/56788/comment/4ed30eff_2cc1cb4a PS2, Line 1228: PCI_EXP_TYPE_PCI_BRIDGE > Yes, I made a mistake, this should be PCI_EXP_TYPE_PCIE_BRIDGE, thanks for the review. Done https://review.coreboot.org/c/coreboot/+/56788/comment/daa41fb2_2904af05 PS2, Line 1264: bus_only_one_child = pci_bus_only_one_child(bus); > I am thinking that we should have a check here: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/56788 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id184d03b33e1742b18efb3f11aa9b2f81fa03806 Gerrit-Change-Number: 56788 Gerrit-PatchSet: 3 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 26 Nov 2021 02:19:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Enable PCIe support for mt8195
by Jianjun Wang (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Hung-Te Lin. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56793 to look at the new patch set (#3). Change subject: soc/mediatek: Enable PCIe support for mt8195 ...................................................................... soc/mediatek: Enable PCIe support for mt8195 Enable PCIe support for mt8195. Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com> Change-Id: I314572955f1021abe9f2f0f4635670135ed08fff --- M src/soc/mediatek/mt8195/Kconfig M src/soc/mediatek/mt8195/Makefile.inc M src/soc/mediatek/mt8195/soc.c 3 files changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/56793/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/56793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I314572955f1021abe9f2f0f4635670135ed08fff Gerrit-Change-Number: 56793 Gerrit-PatchSet: 3 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek: Add PCIe support
by Jianjun Wang (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Hung-Te Lin. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56791 to look at the new patch set (#3). Change subject: soc/mediatek: Add PCIe support ...................................................................... soc/mediatek: Add PCIe support Add PCIe support for MediaTek platform and the prototype of pcicfg for the platforms not support ECAM. Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com> Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 --- M src/include/device/pci_mmio_cfg.h A src/soc/mediatek/common/include/soc/pcie_common.h A src/soc/mediatek/common/pcie.c 3 files changed, 376 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/56791/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/56791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 Gerrit-Change-Number: 56791 Gerrit-PatchSet: 3 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: device/pci_device.c: Scan only one device for PCIe
by Jianjun Wang (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Hung-Te Lin, Furquan Shaikh, Jianjun Wang. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56788 to look at the new patch set (#3). Change subject: device/pci_device.c: Scan only one device for PCIe ...................................................................... device/pci_device.c: Scan only one device for PCIe Only scan one device if it's a PCIe downstream port. A PCIe downstream port normally leads to a link with only device 0 on it. As an optimization, scan only for device 0 in that case. Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com> Change-Id: Id184d03b33e1742b18efb3f11aa9b2f81fa03806 --- M src/device/pci_device.c M src/include/device/pci_def.h M src/include/device/pciexp.h 3 files changed, 36 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/56788/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/56788 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id184d03b33e1742b18efb3f11aa9b2f81fa03806 Gerrit-Change-Number: 56788 Gerrit-PatchSet: 3 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Revert "util/crossgcc: Update gcc to 11.2"
by Iru Cai (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Nico Huber, Branden Waldner, Idwer Vollering, Mike Banon, Arthur Heymans, Jacob Garber, Werner Zeh, Iru Cai, Harshit Sharma. Iru Cai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59636 ) Change subject: Revert "util/crossgcc: Update gcc to 11.2" ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > I may try to use UBSAN (General Setup -> Undefined behavior sanitizer support) to check if there's a […] I just find some UBs with emulation/qemu-i440fx. I don't know whether there's one making coreboot unable to boot on real hardware. -- To view, visit https://review.coreboot.org/c/coreboot/+/59636 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I09a789f9ccb284ac7cad32b12bbf60ecb82efb44 Gerrit-Change-Number: 59636 Gerrit-PatchSet: 1 Gerrit-Owner: Mike Banon <mikebdp2(a)gmail.com> Gerrit-Reviewer: Branden Waldner <scruffy99(a)gmail.com> Gerrit-Reviewer: Harshit Sharma <harshitsharmajs(a)gmail.com> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Branden Waldner <scruffy99(a)gmail.com> Gerrit-Attention: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Attention: Mike Banon <mikebdp2(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Attention: Harshit Sharma <harshitsharmajs(a)gmail.com> Gerrit-Comment-Date: Fri, 26 Nov 2021 02:08:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Iru Cai <mytbk920423(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/vell: update memory settings
by Shon Wang (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Kevin Chiu, YH Lin, Paul Menzel, Tim Wawrzynczak, Nick Vaccaro, Patrick Rudolph. Shon Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59334 ) Change subject: mb/google/brya/var/vell: update memory settings ...................................................................... Patch Set 12: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59334/comment/fa2df24e_3785edac PS11, Line 8: > Please elaborate, where you got these from. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59334 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic0bbac5eaebc77639be6c1bc399658ac90e72fbb Gerrit-Change-Number: 59334 Gerrit-PatchSet: 12 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 26 Nov 2021 01:58:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/vell: update memory settings
by Shon Wang (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Kevin Chiu, YH Lin, Tim Wawrzynczak, Nick Vaccaro, Shon Wang, Patrick Rudolph. Hello build bot (Jenkins), YH Lin, Tim Wawrzynczak, Nick Vaccaro, Nick Vaccaro, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59334 to look at the new patch set (#12). Change subject: mb/google/brya/var/vell: update memory settings ...................................................................... mb/google/brya/var/vell: update memory settings DQ/DQS info from Intel_Platform_DQ_DQS_RCOMP_Info_Utility GPIO_MEN_CONFIG_0 GPP_E11 to GPP_E3 GPIO_MEN_CONFIG_3 GPP_E12 to GPP_E7 GPIO_MEM_CH_SEL_GPP_E5 GPP_E13 to GPP_E5 BUG=b:205908918 TEST=emerge-brya coreboot Change-Id: Ic0bbac5eaebc77639be6c1bc399658ac90e72fbb Signed-off-by: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/vell/Makefile.inc A src/mainboard/google/brya/variants/vell/memory.c 2 files changed, 103 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/59334/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/59334 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic0bbac5eaebc77639be6c1bc399658ac90e72fbb Gerrit-Change-Number: 59334 Gerrit-PatchSet: 12 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2021