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Hello build bot (Jenkins), Tim Wawrzynczak, Subrata Banik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#14).
Change subject: soc/intel/alderlake: Trigger cse_fw_sync before DRAM Init
......................................................................
soc/intel/alderlake: Trigger cse_fw_sync before DRAM Init
The patch enables cse_fw_sync() before DRAM initialization.
cse_fw_sync() sends HECI commands in order to set CSE's boot partition
and to trigger CSE firmware update.
As part of CSE firmware update, coreboot sends HMRPFO_ENABLE HECI
command. Since CSE supports the command after DRAM Initialization,
cse_fw_sync() is called after DRAM initialization.
Starting from CSE Litev16.0.15.1545, CSE support HMRFPO_ENABLE command
before DRAM initialization too. So, cse_fw_sync() is called before DRAM
initialization.
BUG=b:175516533
TEST=Dependency with CSE Litev16.0.15.1545 integration
Change-Id: Iad7403650df8bc4e40aa6e48ccfeba95a5789a2d
Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
---
M src/soc/intel/alderlake/romstage/romstage.c
1 file changed, 4 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/55364/14
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Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59667 )
Change subject: soc/mediatek: move bustracker_init before watchdog resets again
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59667/comment/2933ff22_448c0ff2
PS2, Line 10: before resetting again
from ramstage to bootblock, before triggering watchdog
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Change subject: mb/google/brya/var/vell: update gpio override
......................................................................
Patch Set 11:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59305/comment/4e515c8e_6258ddef
PS8, Line 2: Author: Kevin Chiu <kevin.chiu.17802(a)gmail.com>
> Use your work email?
Done
https://review.coreboot.org/c/coreboot/+/59305/comment/d75b4c8e_426a0b26
PS8, Line 8:
> Please list the sources for the changes.
Done
https://review.coreboot.org/c/coreboot/+/59305/comment/11a65add_b81e2a6e
PS8, Line 8:
> Please list the sources for the changes.
Done
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Change subject: mb/google/brya/var/vell: update overridetree
......................................................................
Patch Set 5:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59304/comment/cc47dd2c_bfafdce5
PS3, Line 8:
> Please list the changes, and the sources for these.
Done
File src/mainboard/google/brya/Kconfig.name:
https://review.coreboot.org/c/coreboot/+/59304/comment/e132f1a0_f46347c1
PS2, Line 73: BOARD_GOOGLE_BASEBOARD_BRY
> `BOARD_GOOGLE_BASEBOARD_BRYA`
Done
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Change subject: mb/google/brya/var/vell: update overridetree
......................................................................
mb/google/brya/var/vell: update overridetree
Init basic override devicetree based on schematice
BUG=b:205908918
TEST=emerge-brya coreboot
Change-Id: Ibaa910eb1c5584197907963781258035c668298e
Signed-off-by: Kevin Chiu <Kevin.Chiu(a)quantatw.com>
---
M src/mainboard/google/brya/Kconfig.name
M src/mainboard/google/brya/variants/vell/overridetree.cb
2 files changed, 376 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/59304/5
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Change subject: mb/google/brya/var/vell: update overridetree
......................................................................
mb/google/brya/var/vell: update overridetree
Init basic override devicetree based on schematice
BUG=b:205908918
TEST=emerge-brya coreboot
Change-Id: Ibaa910eb1c5584197907963781258035c668298e
Signed-off-by: Kevin Chiu <Kevin.Chiu(a)quantatw.com>
---
M src/mainboard/google/brya/Kconfig.name
M src/mainboard/google/brya/variants/vell/overridetree.cb
2 files changed, 376 insertions(+), 2 deletions(-)
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Change subject: mb/google/brya/var/vell: update gpio override
......................................................................
Patch Set 11:
(3 comments)
File src/mainboard/google/brya/variants/vell/gpio.c:
https://review.coreboot.org/c/coreboot/+/59305/comment/ce41bbb9_f4714012
PS8, Line 10: /* A6 : ESPI_ALERT1# ==> ESPI_ALERT1 */
: PAD_CFG_GPI(GPP_A6, NONE, DEEP),
> I don't think we use ESPI Alert1 on chrome EC platforms?
Done
https://review.coreboot.org/c/coreboot/+/59305/comment/7e1c5d41_be55912d
PS8, Line 17: /* B2 : VRALERT# ==> RGB_RST_ODL */
: PAD_CFG_GPI(GPP_B2, NONE, DEEP),
> Is this used to reset something or to read the reset state? It is programmed as an input here, so I […]
This for RGB keyboard to reset
https://review.coreboot.org/c/coreboot/+/59305/comment/1d1decaf_49f71676
PS8, Line 151:
> You probably want to consider having a romstage GPIO table too, for the SSD PERST# deassertion, e.g. […]
Done
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Change subject: mb/google/brya/var/vell: update gpio override
......................................................................
mb/google/brya/var/vell: update gpio override
Configure GPIOs according to schematics
Update initial gpio configuration for redrix
BUG=b:205908918
TEST=emerge-brya coreboot
Change-Id: Icc91866f7555c294af7eed9e5d1550e73d8059d0
Signed-off-by: Kevin Chiu <Kevin.Chiu(a)quantatw.com>
---
A src/mainboard/google/brya/variants/vell/Makefile.inc
A src/mainboard/google/brya/variants/vell/gpio.c
2 files changed, 196 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/59305/11
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Change subject: mb/google/brya/var/vell: update gpio override
......................................................................
Patch Set 10:
(7 comments)
File src/mainboard/google/brya/variants/vell/gpio.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134424):
https://review.coreboot.org/c/coreboot/+/59305/comment/d921c3d0_0d829a59
PS10, Line 173: /* B4 : PROC_GP3 ==> SSD_PERST_L */
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134424):
https://review.coreboot.org/c/coreboot/+/59305/comment/97c1f05e_9ae7e31c
PS10, Line 174: PAD_CFG_GPO(GPP_B4, 1, DEEP),
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134424):
https://review.coreboot.org/c/coreboot/+/59305/comment/dfa2c516_eb7f5bee
PS10, Line 174: PAD_CFG_GPO(GPP_B4, 1, DEEP),
please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134424):
https://review.coreboot.org/c/coreboot/+/59305/comment/d3586edd_77e8ef2c
PS10, Line 179: *num = ARRAY_SIZE(romstage_gpio_table);
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134424):
https://review.coreboot.org/c/coreboot/+/59305/comment/becc77ad_a6e83559
PS10, Line 179: *num = ARRAY_SIZE(romstage_gpio_table);
please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134424):
https://review.coreboot.org/c/coreboot/+/59305/comment/e4e9f3a4_cae2c190
PS10, Line 180: return romstage_gpio_table;
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134424):
https://review.coreboot.org/c/coreboot/+/59305/comment/3a2b81b8_d7b41d6a
PS10, Line 180: return romstage_gpio_table;
please, no spaces at the start of a line
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Change subject: mb/google/brya/var/vell: update gpio override
......................................................................
mb/google/brya/var/vell: update gpio override
Configure GPIOs according to schematics
Update initial gpio configuration for redrix
BUG=b:205908918
TEST=emerge-brya coreboot
Change-Id: Icc91866f7555c294af7eed9e5d1550e73d8059d0
Signed-off-by: Kevin Chiu <Kevin.Chiu(a)quantatw.com>
---
A src/mainboard/google/brya/variants/vell/Makefile.inc
A src/mainboard/google/brya/variants/vell/gpio.c
2 files changed, 196 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/59305/10
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