coreboot-gerrit October 2021

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Change in coreboot[master]: src/soc/intel/alderlake: Add PsysPmax setting
by Ryan Lin (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Hou-hsun Lee, Ryan Lin, Kane Chen, Patrick Rudolph. Hello build bot (Jenkins), Hou-hsun Lee, Tim Wawrzynczak, Kane Chen, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58008 to look at the new patch set (#6). Change subject: src/soc/intel/alderlake: Add PsysPmax setting ...................................................................... src/soc/intel/alderlake: Add PsysPmax setting This patch feeds PsysPmax setting to FSP through UPD and adds a PsysPmax member in chip information so that we can set PsysPmax through devicetree. The PsysPmax needs to be set correctly mapping to maximum system power. Otherwise, system performance would be limited due to the default PsysPmax setting in FSP is only 21W. BUG=b:193864533, b:195615830 TEST=Set PsysPmax to an example value eg 145 in devicetree && put debug code in FSP to print the PsysPmax value before sending to Pcode, ensure the setting is correctly programmed. Change-Id: Ia07aa815f90739240f110cab984068237c02d896 Signed-off-by: Ryan Lin <ryan.lin(a)intel.com> --- M src/soc/intel/alderlake/chip.h M src/soc/intel/alderlake/fsp_params.c 2 files changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/58008/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/58008 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia07aa815f90739240f110cab984068237c02d896 Gerrit-Change-Number: 58008 Gerrit-PatchSet: 6 Gerrit-Owner: Ryan Lin <ryan.lin(a)intel.com> Gerrit-Reviewer: Hou-hsun Lee <hou-hsun.lee(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Hou-hsun Lee <hou-hsun.lee(a)intel.com> Gerrit-Attention: Ryan Lin <ryan.lin(a)intel.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: security/vboot: Remove vb2ex_hwcrypto stubs
by Yu-Ping Wu (Code Review) 04 Oct '21

04 Oct '21

Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58095 ) Change subject: security/vboot: Remove vb2ex_hwcrypto stubs ...................................................................... security/vboot: Remove vb2ex_hwcrypto stubs Now that the vb2ex_hwcrypto_* stub functions are included in vboot fwlib (CL:2353775), we can remove the same stubs from coreboot. BUG=none TEST=emerge-brya coreboot TEST=emerge-cherry coreboot BRANCH=none Change-Id: I62bdc647eb3e34c581cc1b8d15e7f271211e6156 Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M src/security/vboot/vboot_logic.c 1 file changed, 0 insertions(+), 21 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/58095/1 diff --git a/src/security/vboot/vboot_logic.c b/src/security/vboot/vboot_logic.c index ff93d0b..91d42b2 100644 --- a/src/security/vboot/vboot_logic.c +++ b/src/security/vboot/vboot_logic.c @@ -54,27 +54,6 @@ return VB2_SUCCESS; } -/* No-op stubs that can be overridden by SoCs with hardware crypto support. */ -__weak vb2_error_t vb2ex_hwcrypto_digest_init(enum vb2_hash_algorithm hash_alg, - uint32_t data_size) -{ - return VB2_ERROR_EX_HWCRYPTO_UNSUPPORTED; -} - -__weak vb2_error_t vb2ex_hwcrypto_digest_extend(const uint8_t *buf, - uint32_t size) -{ - BUG(); /* Should never get called if init() returned an error. */ - return VB2_ERROR_UNKNOWN; -} - -__weak vb2_error_t vb2ex_hwcrypto_digest_finalize(uint8_t *digest, - uint32_t digest_size) -{ - BUG(); /* Should never get called if init() returned an error. */ - return VB2_ERROR_UNKNOWN; -} - static int handle_digest_result(void *slot_hash, size_t slot_hash_sz) { int is_resume; -- To view, visit https://review.coreboot.org/c/coreboot/+/58095 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62bdc647eb3e34c581cc1b8d15e7f271211e6156 Gerrit-Change-Number: 58095 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: arch/x86/mmu: Port armv8 MMU to x86_64
by Patrick Rudolph (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Patrick Rudolph. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30119 ) Change subject: arch/x86/mmu: Port armv8 MMU to x86_64 ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/30119 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e8b46e65925823a84b8ccd647c7d6848aa20992 Gerrit-Change-Number: 30119 Gerrit-PatchSet: 16 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 04 Oct 2021 05:31:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp{p,m}: Enable dynamic GPIO PM
by Meera Ravindranath (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Maulik V Vaghela, Paul Menzel, Nick Vaccaro, Tim Wawrzynczak, Angel Pons. Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57411 ) Change subject: mb/intel/adlrvp{p,m}: Enable dynamic GPIO PM ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > Meera, I believe all comments need to be resolved first before this CL can be submitted as coreboot. […] Sure, done now. Thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/57411 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b7b66b5525d8b80775ab7578ce6b12181af7882 Gerrit-Change-Number: 57411 Gerrit-PatchSet: 3 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Comment-Date: Mon, 04 Oct 2021 05:02:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp{p,m}: Enable dynamic GPIO PM
by Meera Ravindranath (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Maulik V Vaghela, Paul Menzel, Tim Wawrzynczak, Angel Pons. Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57411 ) Change subject: mb/intel/adlrvp{p,m}: Enable dynamic GPIO PM ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57411/comment/84fbd4df_83e3e5f9 PS1, Line 14: TEST=Boot adlrvp to OS, ensure no TPM errors. > What is the exact error? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/57411 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b7b66b5525d8b80775ab7578ce6b12181af7882 Gerrit-Change-Number: 57411 Gerrit-PatchSet: 3 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Comment-Date: Mon, 04 Oct 2021 05:01:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp{p,m}: Enable dynamic GPIO PM
by Meera Ravindranath (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Maulik V Vaghela, Meera Ravindranath, Tim Wawrzynczak, Angel Pons. Hello build bot (Jenkins), Furquan Shaikh, Maulik V Vaghela, Tim Wawrzynczak, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57411 to look at the new patch set (#3). Change subject: mb/intel/adlrvp{p,m}: Enable dynamic GPIO PM ...................................................................... mb/intel/adlrvp{p,m}: Enable dynamic GPIO PM GPIO PM was disabled for adlrvp to evaluate if longer interrupt pulses are required for ADL. Since ADL requires 4us long pulses (EDS:626817), GPIO PM can be enabled. This change drops the GPIO PM override and re-enables dynamic GPIO PM. TEST=Boot adlrvp to OS, ensure no TPM timeout errors. Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I0b7b66b5525d8b80775ab7578ce6b12181af7882 --- M src/mainboard/intel/adlrvp/devicetree.cb M src/mainboard/intel/adlrvp/devicetree_m.cb 2 files changed, 0 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/57411/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/57411 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b7b66b5525d8b80775ab7578ce6b12181af7882 Gerrit-Change-Number: 57411 Gerrit-PatchSet: 3 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/{apl,jsl,adl,tgl}: Remove smihandler_soc_disable_busmaster
by Kane Chen (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph. Hello Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58094 to look at the new patch set (#2). Change subject: soc/intel/{apl,jsl,adl,tgl}: Remove smihandler_soc_disable_busmaster ...................................................................... soc/intel/{apl,jsl,adl,tgl}: Remove smihandler_soc_disable_busmaster Using default smihandler_soc_disable_busmaster function and remove duplicated code TEST=power button shutdown ok before and after depthcharge on brya Change-Id: Iec86bb8cac20c31e4283f7da3467fe09788f8044 Signed-off-by: Kane Chen <kane.chen(a)intel.corp-partner.google.com> --- M src/soc/intel/alderlake/smihandler.c M src/soc/intel/apollolake/smihandler.c M src/soc/intel/jasperlake/smihandler.c M src/soc/intel/tigerlake/smihandler.c 4 files changed, 0 insertions(+), 31 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/58094/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58094 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec86bb8cac20c31e4283f7da3467fe09788f8044 Gerrit-Change-Number: 58094 Gerrit-PatchSet: 2 Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common: Implement __weak smihandler_soc_disable_busmaster
by Kane Chen (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Kane Chen, Patrick Rudolph. Hello build bot (Jenkins), Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58093 to look at the new patch set (#2). Change subject: soc/intel/common: Implement __weak smihandler_soc_disable_busmaster ...................................................................... soc/intel/common: Implement __weak smihandler_soc_disable_busmaster Currently all implemented smihandler_soc_disable_busmaster functions are actually doing exactly same thing to avoid bus master disable on PMC. To remove duplicated code, this commit changes the default function to skip pmc device bus master disable. Change-Id: I8ed7e6a3f60588bfb90481ea493495080dbbfd58 Signed-off-by: Kane Chen <kane.chen(a)intel.corp-partner.google.com> --- M src/soc/intel/common/block/smm/smihandler.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/58093/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8ed7e6a3f60588bfb90481ea493495080dbbfd58 Gerrit-Change-Number: 58093 Gerrit-PatchSet: 2 Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/{apl,jsl,adl,tgl}: Remove smihandler_soc_disable_busmaster
by Kane Chen (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph. Kane Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58094 ) Change subject: soc/intel/{apl,jsl,adl,tgl}: Remove smihandler_soc_disable_busmaster ...................................................................... soc/intel/{apl,jsl,adl,tgl}: Remove smihandler_soc_disable_busmaster Using default smihandler_soc_disable_busmaster function and remove duplicated code TEST=power button shutdown ok before and after depthcharge on brya Change-Id: Iec86bb8cac20c31e4283f7da3467fe09788f8044 Signed-off-by: Kane Chen <kane.chen(a)intel.corp-partner.google.com> --- M src/soc/intel/alderlake/smihandler.c M src/soc/intel/apollolake/smihandler.c M src/soc/intel/jasperlake/smihandler.c M src/soc/intel/tigerlake/smihandler.c 4 files changed, 0 insertions(+), 31 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/58094/1 diff --git a/src/soc/intel/alderlake/smihandler.c b/src/soc/intel/alderlake/smihandler.c index 5b53038..a072138 100644 --- a/src/soc/intel/alderlake/smihandler.c +++ b/src/soc/intel/alderlake/smihandler.c @@ -24,14 +24,6 @@ heci_disable(); } -int smihandler_soc_disable_busmaster(pci_devfn_t dev) -{ - /* Skip disabling PMC bus master to keep IO decode enabled */ - if (dev == PCH_DEV_PMC) - return 0; - return 1; -} - const smi_handler_t southbridge_smi[SMI_STS_BITS] = { [SMI_ON_SLP_EN_STS_BIT] = smihandler_southbridge_sleep, [APM_STS_BIT] = smihandler_southbridge_apmc, diff --git a/src/soc/intel/apollolake/smihandler.c b/src/soc/intel/apollolake/smihandler.c index bcbc819..0d8c9d9 100644 --- a/src/soc/intel/apollolake/smihandler.c +++ b/src/soc/intel/apollolake/smihandler.c @@ -8,13 +8,6 @@ #include <soc/pci_devs.h> #include <soc/pm.h> -int smihandler_soc_disable_busmaster(pci_devfn_t dev) -{ - if (dev == PCH_DEV_PMC) - return 0; - return 1; -} - const struct smm_save_state_ops *get_smm_save_state_ops(void) { return &em64t100_smm_ops; diff --git a/src/soc/intel/jasperlake/smihandler.c b/src/soc/intel/jasperlake/smihandler.c index 2e38b68..448c053 100644 --- a/src/soc/intel/jasperlake/smihandler.c +++ b/src/soc/intel/jasperlake/smihandler.c @@ -24,14 +24,6 @@ heci_disable(); } -int smihandler_soc_disable_busmaster(pci_devfn_t dev) -{ - /* Skip disabling PMC bus master to keep IO decode enabled */ - if (dev == PCH_DEV_PMC) - return 0; - return 1; -} - const smi_handler_t southbridge_smi[SMI_STS_BITS] = { [SMI_ON_SLP_EN_STS_BIT] = smihandler_southbridge_sleep, [APM_STS_BIT] = smihandler_southbridge_apmc, diff --git a/src/soc/intel/tigerlake/smihandler.c b/src/soc/intel/tigerlake/smihandler.c index 6280fb2..67d21f8 100644 --- a/src/soc/intel/tigerlake/smihandler.c +++ b/src/soc/intel/tigerlake/smihandler.c @@ -24,14 +24,6 @@ heci_disable(); } -int smihandler_soc_disable_busmaster(pci_devfn_t dev) -{ - /* Skip disabling PMC bus master to keep IO decode enabled */ - if (dev == PCH_DEV_PMC) - return 0; - return 1; -} - const smi_handler_t southbridge_smi[SMI_STS_BITS] = { [SMI_ON_SLP_EN_STS_BIT] = smihandler_southbridge_sleep, [APM_STS_BIT] = smihandler_southbridge_apmc, -- To view, visit https://review.coreboot.org/c/coreboot/+/58094 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec86bb8cac20c31e4283f7da3467fe09788f8044 Gerrit-Change-Number: 58094 Gerrit-PatchSet: 1 Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/common: Implement __weak smihandler_soc_disable_busmaster
by Kane Chen (Code Review) 04 Oct '21

04 Oct '21

Kane Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58093 ) Change subject: soc/intel/common: Implement __weak smihandler_soc_disable_busmaster ...................................................................... soc/intel/common: Implement __weak smihandler_soc_disable_busmaster Currently all implemented smihandler_soc_disable_busmaster functions are actually doing exactly same thing to avoid bus master disable on PMC. To remove duplicated code, this commit changes the default function to skip pmc device bus master disable. Change-Id: I8ed7e6a3f60588bfb90481ea493495080dbbfd58 --- M src/soc/intel/common/block/smm/smihandler.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/58093/1 diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c index e1eadb6..32afc92 100644 --- a/src/soc/intel/common/block/smm/smihandler.c +++ b/src/soc/intel/common/block/smm/smihandler.c @@ -44,6 +44,8 @@ __weak int smihandler_soc_disable_busmaster(pci_devfn_t dev) { + if (dev == PCH_DEV_PMC) + return 0; return 1; } -- To view, visit https://review.coreboot.org/c/coreboot/+/58093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8ed7e6a3f60588bfb90481ea493495080dbbfd58 Gerrit-Change-Number: 58093 Gerrit-PatchSet: 1 Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-MessageType: newchange

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coreboot-gerrit October 2021