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Change subject: mb/prodrive/hermes: Fix PCIe ClkSrc configuration
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
Patchset:
PS2:
Tested on Hermes board at Prodrive. All PCIe devices are enumerated.
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Change subject: soc/intel: drop P_BLK support
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Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58096/comment/cbde6fb8_8b967b5e
PS5, Line 9: ee
Just one `e`
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Change subject: util/autoport/bd82x6x.go: Fix includes
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58210/comment/8083055d_a66b2a04
PS3, Line 10: commit 661ad4666ca0e78195f6901fce7b44a7e56e6331;
> It’d be great if you used short hashes and added the commit message summary in brackets.
Why short hashes?
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Change subject: mb/siemens/mc_ehl: Use SPD data from HW-Info in the first place
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
File src/mainboard/siemens/mc_ehl/romstage_fsp_params.c:
https://review.coreboot.org/c/coreboot/+/58176/comment/e4bb8aec_e843e089
PS1, Line 33: printk(BIOS_WARNING, "SPD in HW-Info not valid, fall back to spd.bin!\n");
It’d be great, if the specific failure reason could be mentioned in the log message. On the other hand, you are the only users, so if it works for you, then great!
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Change subject: mb/siemens/mc_ehl: Remove unneeded 'half_populated' variable
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Patch Set 1: Code-Review+1
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Change subject: util/autoport/bd82x6x.go: Fix includes
......................................................................
Patch Set 3: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58210/comment/350e5836_f4b5885d
PS3, Line 10: commit 661ad4666ca0e78195f6901fce7b44a7e56e6331;
It’d be great if you used short hashes and added the commit message summary in brackets.
https://review.coreboot.org/c/coreboot/+/58210/comment/5ff256ea_3cf1ed52
PS3, Line 12: commit 0aad0531dcbdd0628f9d16e27e34abb3f6e183aa,
Ditto.
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Change subject: util/autoport/bd82x6x.go: Fix includes
......................................................................
Patch Set 3: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58210/comment/7fdd5002_6b26563c
PS1, Line 9: CB:49344
> Done, hope I did this correctly.
Yes, exactly. Note that Gerrit automatically turns `commit <hash>` into a link to the corresponding Gerrit change.
[Note: The following section is just for informational purposes. I don't think anything needs to be changed, but I believe you may find this information useful and/or interesting.]
People usually put the commit summary after the commit hash like this:
commit 661ad4666ca0e78195f6901fce7b44a7e56e6331 (ACPI: Select ACPI_SOC_NVS only where suitable)
I prefer this form when using abbreviated commit hashes (in case the abbreviated hash collides in the future), but I don't think it's needed with full commit hashes.
A drawback of full commit hashes is that they can't be split over multiple lines, which can result in oddly-shaped commit messages (e.g. unusually short lines). This gets worse with full commit hashes followed by their commit summary: coreboot commit summaries begin with a filepath, which can't be split over multiple lines either. This is just aesthetic, though.
I typically go with full commit hashes followed by their commit summary, and then I find a way to avoid unusually short lines in the commit message. Sometimes, I even make "rectangular" paragraphs, where all lines have the same length. That being said, writing a commit message like this sometimes takes longer than making the actual commit...
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Change subject: arch/x86/mmu: Port armv8 MMU to x86_64
......................................................................
Patch Set 17:
(1 comment)
File src/arch/x86/mmu.c:
https://review.coreboot.org/c/coreboot/+/30119/comment/86dc3a37_49a4641e
PS16, Line 335: (uint64_t *)cbmem_add(CBMEM_ID_PAGE, pages * 4 * KiB);
> It might be even better to have page tables in heap. That would make it easier to reuse this code in all _RAM_ stages.
I think only ramstage has a heap. + a cbmem entry might be quite handy to pass it to smm?
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Change subject: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time
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Patch Set 10: Code-Review+2
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Change subject: soc/intel/alderlake: [WIP]Trigger cse_fw_sync before DRAM Init
......................................................................
Patch Set 8: Verified-1
(1 comment)
File src/soc/intel/alderlake/romstage/romstage.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130198):
https://review.coreboot.org/c/coreboot/+/55364/comment/cccb332c_d6db3d36
PS8, Line 140: if (!s3wake) {
braces {} are not necessary for single statement blocks
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