coreboot-gerrit August 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/kontron/mal10: add nct7802y HWM IC support
by Maxim Polyakov (Code Review) 16 Aug '20

16 Aug '20

Maxim Polyakov has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/39001 ) Change subject: mb/kontron/mal10: add nct7802y HWM IC support ...................................................................... Abandoned Added to CB:39133 -- To view, visit https://review.coreboot.org/c/coreboot/+/39001 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icdaac4836decb03c6f9b6ed003e0e78d5cf211a9 Gerrit-Change-Number: 39001 Gerrit-PatchSet: 37 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: abandon

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Change in coreboot[master]: mb/kontron/mal10: increase I2C bus frequency
by Maxim Polyakov (Code Review) 16 Aug '20

16 Aug '20

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39846 ) Change subject: mb/kontron/mal10: increase I2C bus frequency ...................................................................... mb/kontron/mal10: increase I2C bus frequency In accordance with the changes in kontron-ec [1], we can increase the frequency of the I2C bus to reduce the read time of the EEPROM during initialization of the board. Change-Id: Iaa194b9497fe046744e1e298535e2493ab75b6cd Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M src/mainboard/kontron/mal10/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/39846/1 diff --git a/src/mainboard/kontron/mal10/variants/baseboard/devicetree.cb b/src/mainboard/kontron/mal10/variants/baseboard/devicetree.cb index a2cd3b3..47537ea 100644 --- a/src/mainboard/kontron/mal10/variants/baseboard/devicetree.cb +++ b/src/mainboard/kontron/mal10/variants/baseboard/devicetree.cb @@ -98,6 +98,8 @@ chip ec/kontron/kempld register "uart[0]" = "{ KEMPLD_UART_3F8, 4 }" register "uart[1]" = "{ KEMPLD_UART_2F8, 3 }" + register "i2c_freq" = "400" # kHz + device generic 0.0 on end # UART #0 device generic 0.1 on end # UART #1 device generic 1.0 on end # I2C -- To view, visit https://review.coreboot.org/c/coreboot/+/39846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa194b9497fe046744e1e298535e2493ab75b6cd Gerrit-Change-Number: 39846 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/kontron: Add the Kontron mAL10 COMe module support
by Maxim Polyakov (Code Review) 16 Aug '20

16 Aug '20

Hello Felix Singer, build bot (Jenkins), Patrick Georgi, Angel Pons, Andrey Petrov, Patrick Rudolph, Aaron Durbin, Lance Zhao, Nico Huber, Martin Roth, Werner Zeh, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39133 to look at the new patch set (#40). Change subject: mb/kontron: Add the Kontron mAL10 COMe module support ...................................................................... mb/kontron: Add the Kontron mAL10 COMe module support This patch adds support for the Kontron mAL10 COMe module with the Apollo Lake SoC together with Kontron T10-TNI carrierboard. Working: - Console (Kontron CPLD/EC) - I2C (Kontron CPLD/EC) - USB2/3 - Ethernet network - eMMC - SATA - PCIe ports - IGD/DP Not tested: - IGD/LVDS - SDIO TODO: - HDA (codec IDT 92HD73C1X5, currently disabled) - Documentation As the payload was used: - SeaBIOS - Tianocore [*] [*] UEFIPayload - without video, EFI-shell in console only Tested on COMe module with Intel Atom x5-E3940 processor (4 Core, 1.6/1.8GHz, 9.5W TDP). Xubuntu 18.04.2 was used as a bootable OS (5.0.0-32-generic linux kernel) Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- A src/mainboard/kontron/mal10/Kconfig A src/mainboard/kontron/mal10/Kconfig.name A src/mainboard/kontron/mal10/Makefile.inc A src/mainboard/kontron/mal10/acpi/cpld.asl A src/mainboard/kontron/mal10/acpi/dptf.asl A src/mainboard/kontron/mal10/board_info.txt A src/mainboard/kontron/mal10/bootblock.c A src/mainboard/kontron/mal10/carriers/t10-tni/Makefile.inc A src/mainboard/kontron/mal10/carriers/t10-tni/board_info.txt A src/mainboard/kontron/mal10/carriers/t10-tni/gpio.c A src/mainboard/kontron/mal10/carriers/t10-tni/include/carrier/gpio.h A src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb A src/mainboard/kontron/mal10/cmos.default A src/mainboard/kontron/mal10/cmos.layout A src/mainboard/kontron/mal10/data.vbt A src/mainboard/kontron/mal10/dsdt.asl A src/mainboard/kontron/mal10/mal10.fmd A src/mainboard/kontron/mal10/ramstage.c A src/mainboard/kontron/mal10/romstage.c A src/mainboard/kontron/mal10/variants/mal10/Makefile.inc A src/mainboard/kontron/mal10/variants/mal10/board_info.txt A src/mainboard/kontron/mal10/variants/mal10/devicetree.cb A src/mainboard/kontron/mal10/variants/mal10/gma-mainboard.ads A src/mainboard/kontron/mal10/variants/mal10/gpio.c A src/mainboard/kontron/mal10/variants/mal10/include/variant/gpio.h 25 files changed, 1,466 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/39133/40 -- To view, visit https://review.coreboot.org/c/coreboot/+/39133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea Gerrit-Change-Number: 39133 Gerrit-PatchSet: 40 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <anpetrov(a)fb.com> Gerrit-CC: Michael Niewöhner Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/kontron: Add the Kontron mAL10 COMe module support
by Michael Niewöhner (Code Review) 16 Aug '20

16 Aug '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39133 ) Change subject: mb/kontron: Add the Kontron mAL10 COMe module support ...................................................................... Patch Set 39: (1 comment) https://review.coreboot.org/c/coreboot/+/39133/39/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/carriers/t10-tni/gpio.c: https://review.coreboot.org/c/coreboot/+/39133/39/src/mainboard/kontron/mal… PS39, Line 6: static const struct pad_config gpio_table[] = { Just curious, is there a specific reason for having that in gpio.c with a function returning it instead of relying on the variants include mechanism? -- To view, visit https://review.coreboot.org/c/coreboot/+/39133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea Gerrit-Change-Number: 39133 Gerrit-PatchSet: 39 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <anpetrov(a)fb.com> Gerrit-CC: Michael Niewöhner Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sun, 16 Aug 2020 10:15:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/boot: Jump to payload in protected mode
by Patrick Rudolph (Code Review) 16 Aug '20

16 Aug '20

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30118 ) Change subject: arch/x86/boot: Jump to payload in protected mode ...................................................................... Patch Set 32: (2 comments) Fixed comments and used exit32.inc instead, which reduces duplicated code a lot. https://review.coreboot.org/c/coreboot/+/30118/32/Documentation/arch/x86/in… File Documentation/arch/x86/index.md: https://review.coreboot.org/c/coreboot/+/30118/32/Documentation/arch/x86/in… PS32, Line 18: run > called/'jumped to' is more accurate? Done https://review.coreboot.org/c/coreboot/+/30118/32/src/include/program_loadi… File src/include/program_loading.h: https://review.coreboot.org/c/coreboot/+/30118/32/src/include/program_loadi… PS32, Line 177: /* : * Jump to function in protected mode. : * @arg func_ptr Function to jump to in protected mode : * @arg Argument to pass to called function : * : * @noreturn : */ : void protected_mode_jump(uint32_t func_ptr, : uint32_t argument); > I'm not sure if this generic program loading file is supposed to hold x86 specific function declarat […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/30118 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6552ac30f1b6205e08e16d251328e01ce3fbfd14 Gerrit-Change-Number: 30118 Gerrit-PatchSet: 32 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sun, 16 Aug 2020 06:27:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/boot: Jump to payload in protected mode
by Patrick Rudolph (Code Review) 16 Aug '20

16 Aug '20

Patrick Rudolph has uploaded a new patch set (#33) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/30118 ) Change subject: arch/x86/boot: Jump to payload in protected mode ...................................................................... arch/x86/boot: Jump to payload in protected mode * On ARCH_RAMSTAGE_X86_64 jump to the payload in protected mode. * Add a helper function to jump to arbitrary code in protected mode, similar to the real mode call handler. * Doesn't affect existing x86_32 code. * Add a macro to cast pointer to uint32_t that dies if it would overflow on conversion Tested on QEMU Q35 using SeaBIOS as payload. Tested on Lenovo T410 with additional x86_64 patches. Change-Id: I6552ac30f1b6205e08e16d251328e01ce3fbfd14 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M Documentation/arch/x86/index.md M src/arch/x86/Makefile.inc M src/arch/x86/boot.c A src/arch/x86/c_exit.S M src/arch/x86/include/arch/boot/boot.h M src/include/assert.h 6 files changed, 74 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/30118/33 -- To view, visit https://review.coreboot.org/c/coreboot/+/30118 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6552ac30f1b6205e08e16d251328e01ce3fbfd14 Gerrit-Change-Number: 30118 Gerrit-PatchSet: 33 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/purism/librem_whl: Add new board Librem Mini (WHL-U)
by Matt DeVillier (Code Review) 15 Aug '20

15 Aug '20

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40278 ) Change subject: mb/purism/librem_whl: Add new board Librem Mini (WHL-U) ...................................................................... Patch Set 10: (1 comment) https://review.coreboot.org/c/coreboot/+/40278/8/src/mainboard/purism/libre… File src/mainboard/purism/librem_whl/devicetree.cb: https://review.coreboot.org/c/coreboot/+/40278/8/src/mainboard/purism/libre… PS8, Line 96: Type-A front left upper > thanks, added the port descriptions. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/40278 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I36af42766f85eb17f86f6ec9b48b87125fb911e6 Gerrit-Change-Number: 40278 Gerrit-PatchSet: 10 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sat, 15 Aug 2020 21:25:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Comment-In-Reply-To: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/purism/librem_whl: Add new board Librem Mini (WHL-U)
by Duncan Laurie (Code Review) 15 Aug '20

15 Aug '20

Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40278 ) Change subject: mb/purism/librem_whl: Add new board Librem Mini (WHL-U) ...................................................................... Patch Set 10: Code-Review+2 (1 comment) https://review.coreboot.org/c/coreboot/+/40278/8/src/mainboard/purism/libre… File src/mainboard/purism/librem_whl/devicetree.cb: https://review.coreboot.org/c/coreboot/+/40278/8/src/mainboard/purism/libre… PS8, Line 136: AcousticNoiseMitigation > looks like if I enable AcousticNoiseMitigation but don't set the slew rates, they default to fast/2. […] Ah you are right, I guess I've never used fast/2 before. -- To view, visit https://review.coreboot.org/c/coreboot/+/40278 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I36af42766f85eb17f86f6ec9b48b87125fb911e6 Gerrit-Change-Number: 40278 Gerrit-PatchSet: 10 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sat, 15 Aug 2020 19:05:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Comment-In-Reply-To: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb: remove unnecessary FADT flag devicetree entries for Picasso
by Felix Held (Code Review) 15 Aug '20

15 Aug '20

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44449 ) Change subject: mb: remove unnecessary FADT flag devicetree entries for Picasso ...................................................................... mb: remove unnecessary FADT flag devicetree entries for Picasso Those flags already get unconditionally set in soc/amd/picasso/acpi.c. Change-Id: I978c7d67480499d92c193d5bb87bc876211187db Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb 3 files changed, 5 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/44449/1 diff --git a/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb b/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb index 40d622b..ffc18a0 100644 --- a/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb +++ b/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb @@ -5,15 +5,7 @@ # Set FADT Configuration register "fadt_boot_arch" = "ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042" - register "fadt_flags" = "ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */ - ACPI_FADT_C1_SUPPORTED | - ACPI_FADT_SLEEP_BUTTON | - ACPI_FADT_S4_RTC_WAKE | - ACPI_FADT_32BIT_TIMER | - ACPI_FADT_PCI_EXPRESS_WAKE | - ACPI_FADT_PLATFORM_CLOCK | - ACPI_FADT_S4_RTC_VALID | - ACPI_FADT_REMOTE_POWER_ON" + register "fadt_flags" = "ACPI_FADT_SLEEP_BUTTON" # See table 5-34 ACPI 6.3 spec register "sd_emmc_config" = "SD_EMMC_DISABLE" diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index c60373b..caac426 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -3,14 +3,8 @@ # Set FADT Configuration register "fadt_boot_arch" = "ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042" - register "fadt_flags" = "ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */ - ACPI_FADT_C1_SUPPORTED | - ACPI_FADT_SLEEP_BUTTON | - ACPI_FADT_S4_RTC_WAKE | - ACPI_FADT_32BIT_TIMER | - ACPI_FADT_SEALED_CASE | - ACPI_FADT_PCI_EXPRESS_WAKE | - ACPI_FADT_REMOTE_POWER_ON" + # See table 5-34 ACPI 6.3 spec + register "fadt_flags" = "ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_SEALED_CASE" register "acp_pin_cfg" = "I2S_PINS_I2S_TDM" register "acp_i2s_wake_enable" = "1" diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index d38aaf2..3b3f353 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -3,14 +3,8 @@ # Set FADT Configuration register "fadt_boot_arch" = "ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042" - register "fadt_flags" = "ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */ - ACPI_FADT_C1_SUPPORTED | - ACPI_FADT_SLEEP_BUTTON | - ACPI_FADT_S4_RTC_WAKE | - ACPI_FADT_32BIT_TIMER | - ACPI_FADT_SEALED_CASE | - ACPI_FADT_PCI_EXPRESS_WAKE | - ACPI_FADT_REMOTE_POWER_ON" + # See table 5-34 ACPI 6.3 spec + register "fadt_flags" = "ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_SEALED_CASE" register "acp_pin_cfg" = "I2S_PINS_I2S_TDM" register "acp_i2s_wake_enable" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/44449 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I978c7d67480499d92c193d5bb87bc876211187db Gerrit-Change-Number: 44449 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/picasso: use FADT devicetree configuration options
by Felix Held (Code Review) 15 Aug '20

15 Aug '20

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43418 ) Change subject: soc/amd/picasso: use FADT devicetree configuration options ...................................................................... soc/amd/picasso: use FADT devicetree configuration options Two of the items in the FADT ACPI table frequently need to be updated by the platform, so let's make it easy to update them by putting them into the devicetree. - fadt_boot_arch 0="legacy free" which while reasonable, probably isn't what will be wanted by most platforms, so this should generally get updated in the platform code. - fadt_flags 0 is definitely NOT a reasonable default, so supply a better default value of what was previously being set. The fadt_pm_profile option is removed from this patch. See commit 56da63c3dc3f50cfac541c779b608e1bae9e635c which removed overriding that field. Change-Id: I6e8d0c60cadfdd24b6926703b252abbc56d436de Signed-off-by: Martin Roth <martinroth(a)chromium.org> Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Reviewed-on: https://chromium-review.googlesource.com/1944624 --- M src/soc/amd/picasso/acpi.c 1 file changed, 7 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/43418/1 diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 3c22f1d..2eff4fe 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -88,6 +88,8 @@ */ void acpi_fill_fadt(acpi_fadt_t *fadt) { + const struct soc_amd_picasso_config *cfg = config_of_soc(); + printk(BIOS_DEBUG, "pm_base: 0x%04x\n", PICASSO_ACPI_IO_BASE); fadt->sci_int = 9; /* IRQ 09 - ACPI SCI */ @@ -124,9 +126,12 @@ fadt->day_alrm = 0; /* 0x7d these have to be */ fadt->mon_alrm = 0; /* 0x7e added to cmos.layout */ fadt->century = 0; /* 0x7f to make rtc alarm work */ - fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; + fadt->iapc_boot_arch = cfg->fadt_boot_arch; /* legacy free default */ fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */ - fadt->flags = ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */ + if (cfg->fadt_flags) + fadt->flags = cfg->fadt_flags; + else + fadt->flags = ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */ ACPI_FADT_C1_SUPPORTED | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE | -- To view, visit https://review.coreboot.org/c/coreboot/+/43418 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e8d0c60cadfdd24b6926703b252abbc56d436de Gerrit-Change-Number: 43418 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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coreboot-gerrit August 2020