coreboot-gerrit June 2020

coreboot-gerrit@coreboot.org

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2826 discussions

Change in coreboot[master]: soc/intel/jasperlake: set SerialIoUartDebugMode to skip Uart Init
by Karthik Ramasubramanian (Code Review) 22 Jun '20

22 Jun '20

Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42462 ) Change subject: soc/intel/jasperlake: set SerialIoUartDebugMode to skip Uart Init ...................................................................... Patch Set 4: (1 comment) https://review.coreboot.org/c/coreboot/+/42462/4/src/soc/intel/jasperlake/r… File src/soc/intel/jasperlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/42462/4/src/soc/intel/jasperlake/r… PS4, Line 84: SerialIoUartDebugMode I believe FSP has been initializing the debug UART in its current form. If so, what is the impact? -- To view, visit https://review.coreboot.org/c/coreboot/+/42462 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0fda2ace3b1f63159e9809d6a3044a3bad452f07 Gerrit-Change-Number: 42462 Gerrit-PatchSet: 4 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamirbohra(a)gmail.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 22 Jun 2020 18:21:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: ACPI: Add framework for GNVS initialisation
by Aaron Durbin (Code Review) 22 Jun '20

22 Jun '20

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42423 ) Change subject: ACPI: Add framework for GNVS initialisation ...................................................................... Patch Set 6: (2 comments) https://review.coreboot.org/c/coreboot/+/42423/5/src/acpi/chromeos-gnvs.c File src/acpi/chromeos-gnvs.c: https://review.coreboot.org/c/coreboot/+/42423/5/src/acpi/chromeos-gnvs.c@14 PS5, Line 14: gnvs_chromeos->vbt2 = ACTIVE_ECFW_RO; Why not just put this inside chromeos_init_chromeos_acpi()? https://review.coreboot.org/c/coreboot/+/42423/5/src/acpi/gnvs.c File src/acpi/gnvs.c: https://review.coreboot.org/c/coreboot/+/42423/5/src/acpi/gnvs.c@55 PS5, Line 55: gnvs_assign_chromeos(); > Does it matter if we call this twice until CB:42493 lands? I have it here in case there was a need t […] Briefly looking it's just assigning to fields. I don't see any side effects. -- To view, visit https://review.coreboot.org/c/coreboot/+/42423 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccad533c3824d70f6cbae52cc8dd79f142ece944 Gerrit-Change-Number: 42423 Gerrit-PatchSet: 6 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 22 Jun 2020 18:14:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2194
by Karthik Ramasubramanian (Code Review) 22 Jun '20

22 Jun '20

Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42471 ) Change subject: vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2194 ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/c/coreboot/+/42471/1//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/42471/1//COMMIT_MSG@14 PS1, Line 14: Cq-Depend: TBD Nit: Leave a blank line between TEST and Cq-Depend lines. Move it immediately above Change-Id line. -- To view, visit https://review.coreboot.org/c/coreboot/+/42471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0cd84fdb0089bf8ea3f4440e89fdee7f11119751 Gerrit-Change-Number: 42471 Gerrit-PatchSet: 1 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 22 Jun 2020 18:12:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/mipi_camera: Add camera power resource to SSDT
by Tim Wawrzynczak (Code Review) 22 Jun '20

22 Jun '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41624 ) Change subject: drivers/intel/mipi_camera: Add camera power resource to SSDT ...................................................................... Patch Set 24: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/41624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31e198b50acf2c64035aff9cb054fbe3602dd83e Gerrit-Change-Number: 41624 Gerrit-PatchSet: 24 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kiran2 Kumar <kiran2.kumar(a)intel.corp-partner.google.com> Gerrit-CC: Matt Delco <delco(a)chromium.org> Gerrit-Comment-Date: Mon, 22 Jun 2020 18:06:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/mipi_camera: Add camera power resource to SSDT
by Tim Wawrzynczak (Code Review) 22 Jun '20

22 Jun '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41624 ) Change subject: drivers/intel/mipi_camera: Add camera power resource to SSDT ...................................................................... Patch Set 24: (1 comment) https://review.coreboot.org/c/coreboot/+/41624/24/src/drivers/intel/mipi_ca… File src/drivers/intel/mipi_camera/camera.c: https://review.coreboot.org/c/coreboot/+/41624/24/src/drivers/intel/mipi_ca… PS24, Line 604: acpigen_write_package(1); : if (config->pr0) : acpigen_emit_namestring(config->pr0); /* External power resource */ : else : acpigen_emit_namestring(POWER_RESOURCE_NAME); > Fixing formatting of the SSDT data in the previous reply […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/41624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31e198b50acf2c64035aff9cb054fbe3602dd83e Gerrit-Change-Number: 41624 Gerrit-PatchSet: 24 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kiran2 Kumar <kiran2.kumar(a)intel.corp-partner.google.com> Gerrit-CC: Matt Delco <delco(a)chromium.org> Gerrit-Comment-Date: Mon, 22 Jun 2020 18:05:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/mipi_camera: Add camera power resource to SSDT
by Sugnan Prabhu S (Code Review) 22 Jun '20

22 Jun '20

Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41624 ) Change subject: drivers/intel/mipi_camera: Add camera power resource to SSDT ...................................................................... Patch Set 24: (1 comment) https://review.coreboot.org/c/coreboot/+/41624/24/src/drivers/intel/mipi_ca… File src/drivers/intel/mipi_camera/camera.c: https://review.coreboot.org/c/coreboot/+/41624/24/src/drivers/intel/mipi_ca… PS24, Line 604: acpigen_write_package(1); : if (config->pr0) : acpigen_emit_namestring(config->pr0); /* External power resource */ : else : acpigen_emit_namestring(POWER_RESOURCE_NAME); > pr0 is set only for the device that does not have it's own power resource and have reference to powe […] Fixing formatting of the SSDT data in the previous reply Before moving the power resource to device scope Scope (\_SB.PCI0.I2C5) { PowerResource (RCPR, 0x00, 0x0000) { } Device (CAM1) { Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { RCPR }) } Device (VCM0) { Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { RCPR }) } } After moving the power resource to device scope Scope (\_SB.PCI0.I2C5) { Device (CAM1) { PowerResource (RCPR, 0x00, 0x0000) { } Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { RCPR }) } Device (VCM0) { Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { ^CAM1.RCPR }) } } -- To view, visit https://review.coreboot.org/c/coreboot/+/41624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31e198b50acf2c64035aff9cb054fbe3602dd83e Gerrit-Change-Number: 41624 Gerrit-PatchSet: 24 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kiran2 Kumar <kiran2.kumar(a)intel.corp-partner.google.com> Gerrit-CC: Matt Delco <delco(a)chromium.org> Gerrit-Comment-Date: Mon, 22 Jun 2020 17:31:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/mipi_camera: Add camera power resource to SSDT
by Sugnan Prabhu S (Code Review) 22 Jun '20

22 Jun '20

Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41624 ) Change subject: drivers/intel/mipi_camera: Add camera power resource to SSDT ...................................................................... Patch Set 24: (1 comment) https://review.coreboot.org/c/coreboot/+/41624/24/src/drivers/intel/mipi_ca… File src/drivers/intel/mipi_camera/camera.c: https://review.coreboot.org/c/coreboot/+/41624/24/src/drivers/intel/mipi_ca… PS24, Line 604: acpigen_write_package(1); : if (config->pr0) : acpigen_emit_namestring(config->pr0); /* External power resource */ : else : acpigen_emit_namestring(POWER_RESOURCE_NAME); > If config->pr0 is set, should _PR0 contain both the generated power resource & the one specified in […] pr0 is set only for the device that does not have it's own power resource and have reference to power resource defined in other device. In the VCM0 has reference to the power resource defined in CAM1 Before moving the powere resource to device scope Scope (\_SB.PCI0.I2C5) { PowerResource (RCPR, 0x00, 0x0000) { } Device (CAM1) { Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { RCPR }) } Device (VCM0) { Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { RCPR }) } } After moving the power resource to device scope Scope (\_SB.PCI0.I2C5) { Device (CAM1) { PowerResource (RCPR, 0x00, 0x0000) { } Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { RCPR }) } Device (VCM0) { Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { ^CAM1.RCPR }) } } -- To view, visit https://review.coreboot.org/c/coreboot/+/41624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31e198b50acf2c64035aff9cb054fbe3602dd83e Gerrit-Change-Number: 41624 Gerrit-PatchSet: 24 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kiran2 Kumar <kiran2.kumar(a)intel.corp-partner.google.com> Gerrit-CC: Matt Delco <delco(a)chromium.org> Gerrit-Comment-Date: Mon, 22 Jun 2020 17:28:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/mipi_camera: Add camera power resource to SSDT
by Tim Wawrzynczak (Code Review) 22 Jun '20

22 Jun '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41624 ) Change subject: drivers/intel/mipi_camera: Add camera power resource to SSDT ...................................................................... Patch Set 24: (1 comment) https://review.coreboot.org/c/coreboot/+/41624/24/src/drivers/intel/mipi_ca… File src/drivers/intel/mipi_camera/camera.c: https://review.coreboot.org/c/coreboot/+/41624/24/src/drivers/intel/mipi_ca… PS24, Line 604: acpigen_write_package(1); : if (config->pr0) : acpigen_emit_namestring(config->pr0); /* External power resource */ : else : acpigen_emit_namestring(POWER_RESOURCE_NAME); If config->pr0 is set, should _PR0 contain both the generated power resource & the one specified in config->pr0 ? -- To view, visit https://review.coreboot.org/c/coreboot/+/41624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31e198b50acf2c64035aff9cb054fbe3602dd83e Gerrit-Change-Number: 41624 Gerrit-PatchSet: 24 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kiran2 Kumar <kiran2.kumar(a)intel.corp-partner.google.com> Gerrit-CC: Matt Delco <delco(a)chromium.org> Gerrit-Comment-Date: Mon, 22 Jun 2020 17:18:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: src/mainboard: Remove unused include 'sandybridge.h'
by HAOUAS Elyes (Code Review) 22 Jun '20

22 Jun '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42353 ) Change subject: src/mainboard: Remove unused include 'sandybridge.h' ...................................................................... src/mainboard: Remove unused include 'sandybridge.h' Change-Id: I9356a56c34d1c6746cf8acfe931386ffed58ba74 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/apple/macbookair4_2/early_init.c M src/mainboard/asus/h61m-cs/early_init.c M src/mainboard/asus/maximus_iv_gene-z/early_init.c M src/mainboard/asus/p8h61-m_lx/early_init.c M src/mainboard/asus/p8h61-m_lx3_r2_0/early_init.c M src/mainboard/asus/p8h61-m_pro/early_init.c M src/mainboard/asus/p8z77-v_lx2/early_init.c M src/mainboard/gigabyte/ga-b75m-d3h/early_init.c M src/mainboard/gigabyte/ga-h61m-series/early_init.c M src/mainboard/hp/compaq_8200_elite_sff/early_init.c M src/mainboard/hp/snb_ivb_laptops/variants/2570p/early_init.c M src/mainboard/hp/snb_ivb_laptops/variants/2760p/early_init.c M src/mainboard/hp/snb_ivb_laptops/variants/8460p/early_init.c M src/mainboard/hp/snb_ivb_laptops/variants/8470p/early_init.c M src/mainboard/hp/snb_ivb_laptops/variants/8770w/early_init.c M src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/early_init.c M src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/early_init.c M src/mainboard/hp/z220_sff_workstation/early_init.c M src/mainboard/lenovo/l520/early_init.c M src/mainboard/lenovo/s230u/early_init.c M src/mainboard/lenovo/x1_carbon_gen1/early_init.c M src/mainboard/lenovo/x230/variants/x230/early_init.c M src/mainboard/sapphire/pureplatinumh61/early_init.c 23 files changed, 0 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/42353/1 diff --git a/src/mainboard/apple/macbookair4_2/early_init.c b/src/mainboard/apple/macbookair4_2/early_init.c index 63670e5..9da6702 100644 --- a/src/mainboard/apple/macbookair4_2/early_init.c +++ b/src/mainboard/apple/macbookair4_2/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <string.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <cbfs.h> diff --git a/src/mainboard/asus/h61m-cs/early_init.c b/src/mainboard/asus/h61m-cs/early_init.c index e8adc82..cb8daaf 100644 --- a/src/mainboard/asus/h61m-cs/early_init.c +++ b/src/mainboard/asus/h61m-cs/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootblock_common.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <device/pnp_ops.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> diff --git a/src/mainboard/asus/maximus_iv_gene-z/early_init.c b/src/mainboard/asus/maximus_iv_gene-z/early_init.c index 96f74ab..df0a99b 100644 --- a/src/mainboard/asus/maximus_iv_gene-z/early_init.c +++ b/src/mainboard/asus/maximus_iv_gene-z/early_init.c @@ -4,7 +4,6 @@ #include <device/pnp_ops.h> #include <device/dram/ddr3.h> #include <northbridge/intel/sandybridge/raminit_native.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/nct6776/nct6776.h> diff --git a/src/mainboard/asus/p8h61-m_lx/early_init.c b/src/mainboard/asus/p8h61-m_lx/early_init.c index 1290fe3..5e54d08 100644 --- a/src/mainboard/asus/p8h61-m_lx/early_init.c +++ b/src/mainboard/asus/p8h61-m_lx/early_init.c @@ -3,7 +3,6 @@ #include <bootblock_common.h> #include <device/dram/ddr3.h> #include <northbridge/intel/sandybridge/raminit_native.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/nct6776/nct6776.h> diff --git a/src/mainboard/asus/p8h61-m_lx3_r2_0/early_init.c b/src/mainboard/asus/p8h61-m_lx3_r2_0/early_init.c index 330cf9a..33efaf6 100644 --- a/src/mainboard/asus/p8h61-m_lx3_r2_0/early_init.c +++ b/src/mainboard/asus/p8h61-m_lx3_r2_0/early_init.c @@ -3,7 +3,6 @@ #include <bootblock_common.h> #include <device/pnp_ops.h> #include <northbridge/intel/sandybridge/raminit_native.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/nct6779d/nct6779d.h> diff --git a/src/mainboard/asus/p8h61-m_pro/early_init.c b/src/mainboard/asus/p8h61-m_pro/early_init.c index 4253b58..05e87c1 100644 --- a/src/mainboard/asus/p8h61-m_pro/early_init.c +++ b/src/mainboard/asus/p8h61-m_pro/early_init.c @@ -3,7 +3,6 @@ #include <bootblock_common.h> #include <device/pnp_ops.h> #include <northbridge/intel/sandybridge/raminit_native.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/nct6776/nct6776.h> diff --git a/src/mainboard/asus/p8z77-v_lx2/early_init.c b/src/mainboard/asus/p8z77-v_lx2/early_init.c index ecfb542..3a297f9e 100644 --- a/src/mainboard/asus/p8z77-v_lx2/early_init.c +++ b/src/mainboard/asus/p8z77-v_lx2/early_init.c @@ -2,7 +2,6 @@ #include <bootblock_common.h> #include <device/pnp_ops.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/nuvoton/common/nuvoton.h> diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/early_init.c b/src/mainboard/gigabyte/ga-b75m-d3h/early_init.c index 96a0609..a88abf8 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/early_init.c +++ b/src/mainboard/gigabyte/ga-b75m-d3h/early_init.c @@ -2,7 +2,6 @@ #include <bootblock_common.h> #include <northbridge/intel/sandybridge/raminit_native.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8728f/it8728f.h> diff --git a/src/mainboard/gigabyte/ga-h61m-series/early_init.c b/src/mainboard/gigabyte/ga-h61m-series/early_init.c index 78aff7b..e50ce6b 100644 --- a/src/mainboard/gigabyte/ga-h61m-series/early_init.c +++ b/src/mainboard/gigabyte/ga-h61m-series/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootblock_common.h> -#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/ite/common/ite.h> diff --git a/src/mainboard/hp/compaq_8200_elite_sff/early_init.c b/src/mainboard/hp/compaq_8200_elite_sff/early_init.c index 873eeb3..ffff01a 100644 --- a/src/mainboard/hp/compaq_8200_elite_sff/early_init.c +++ b/src/mainboard/hp/compaq_8200_elite_sff/early_init.c @@ -3,7 +3,6 @@ #include <bootblock_common.h> #include <superio/nuvoton/npcd378/npcd378.h> #include <superio/nuvoton/common/nuvoton.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2570p/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/2570p/early_init.c index b3d371f..686601e 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/2570p/early_init.c +++ b/src/mainboard/hp/snb_ivb_laptops/variants/2570p/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootblock_common.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <ec/hp/kbc1126/ec.h> diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2760p/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/2760p/early_init.c index 631a914..563371d 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/2760p/early_init.c +++ b/src/mainboard/hp/snb_ivb_laptops/variants/2760p/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootblock_common.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <ec/hp/kbc1126/ec.h> diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8460p/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/8460p/early_init.c index c559e0b..b31f515 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/8460p/early_init.c +++ b/src/mainboard/hp/snb_ivb_laptops/variants/8460p/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootblock_common.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/smsc/lpc47n217/lpc47n217.h> diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8470p/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/8470p/early_init.c index 6364303..df3b9e1 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/8470p/early_init.c +++ b/src/mainboard/hp/snb_ivb_laptops/variants/8470p/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootblock_common.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/smsc/lpc47n217/lpc47n217.h> diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8770w/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/8770w/early_init.c index 2e5d149..3f81340 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/8770w/early_init.c +++ b/src/mainboard/hp/snb_ivb_laptops/variants/8770w/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootblock_common.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/smsc/lpc47n217/lpc47n217.h> diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/early_init.c index bea9275..bf59f26 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/early_init.c +++ b/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootblock_common.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <ec/hp/kbc1126/ec.h> diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/early_init.c index f7c4ca6..a7c894b 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/early_init.c +++ b/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/early_init.c @@ -4,7 +4,6 @@ #include <string.h> #include <cbfs.h> #include <console/console.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <ec/hp/kbc1126/ec.h> diff --git a/src/mainboard/hp/z220_sff_workstation/early_init.c b/src/mainboard/hp/z220_sff_workstation/early_init.c index 0a75614..c0d84f5 100644 --- a/src/mainboard/hp/z220_sff_workstation/early_init.c +++ b/src/mainboard/hp/z220_sff_workstation/early_init.c @@ -3,7 +3,6 @@ #include <bootblock_common.h> #include <superio/nuvoton/npcd378/npcd378.h> #include <superio/nuvoton/common/nuvoton.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> diff --git a/src/mainboard/lenovo/l520/early_init.c b/src/mainboard/lenovo/l520/early_init.c index ef8ccef..b6202c7 100644 --- a/src/mainboard/lenovo/l520/early_init.c +++ b/src/mainboard/lenovo/l520/early_init.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> diff --git a/src/mainboard/lenovo/s230u/early_init.c b/src/mainboard/lenovo/s230u/early_init.c index bbf0c2f..155b02e 100644 --- a/src/mainboard/lenovo/s230u/early_init.c +++ b/src/mainboard/lenovo/s230u/early_init.c @@ -5,7 +5,6 @@ #include <cbfs.h> #include <device/pci_ops.h> #include <console/console.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> diff --git a/src/mainboard/lenovo/x1_carbon_gen1/early_init.c b/src/mainboard/lenovo/x1_carbon_gen1/early_init.c index f5299ea..f49a59f8 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/early_init.c +++ b/src/mainboard/lenovo/x1_carbon_gen1/early_init.c @@ -3,7 +3,6 @@ #include <stdint.h> #include <string.h> #include <console/console.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> diff --git a/src/mainboard/lenovo/x230/variants/x230/early_init.c b/src/mainboard/lenovo/x230/variants/x230/early_init.c index e6c4ffa..9c97a19 100644 --- a/src/mainboard/lenovo/x230/variants/x230/early_init.c +++ b/src/mainboard/lenovo/x230/variants/x230/early_init.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> diff --git a/src/mainboard/sapphire/pureplatinumh61/early_init.c b/src/mainboard/sapphire/pureplatinumh61/early_init.c index 3e65273..f2ab137 100644 --- a/src/mainboard/sapphire/pureplatinumh61/early_init.c +++ b/src/mainboard/sapphire/pureplatinumh61/early_init.c @@ -2,7 +2,6 @@ #include <device/pci_ops.h> #include <device/pci_def.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/42353 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9356a56c34d1c6746cf8acfe931386ffed58ba74 Gerrit-Change-Number: 42353 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 11

Change in coreboot[master]: mb/amd/mandolin/hda_verb: use AZALIA_RESET and AZALIA_PIN_CFG macros
by Felix Held (Code Review) 22 Jun '20

22 Jun '20

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42610 ) Change subject: mb/amd/mandolin/hda_verb: use AZALIA_RESET and AZALIA_PIN_CFG macros ...................................................................... mb/amd/mandolin/hda_verb: use AZALIA_RESET and AZALIA_PIN_CFG macros TEST=Doesn't change the resulting binary for BUILD_TIMELESS=1. Change-Id: I9fccc53c3d56116027e28a9eec6ec27202017a79 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/mainboard/amd/mandolin/hda_verb.c 1 file changed, 29 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/42610/1 diff --git a/src/mainboard/amd/mandolin/hda_verb.c b/src/mainboard/amd/mandolin/hda_verb.c index 61ae400..e6c2813 100644 --- a/src/mainboard/amd/mandolin/hda_verb.c +++ b/src/mainboard/amd/mandolin/hda_verb.c @@ -10,22 +10,22 @@ AZALIA_SUBVENDOR(0, 0x1022D001), // HDA Codec Subsystem ID: 0x1022D001 - 0x0017ff00, 0x0017ff00, 0x0017ff00, 0x0017ff00, // Widget node 0x01 : - 0x01271c40, 0x01271d01, 0x01271ea6, 0x01271fb7, // Pin widget 0x12 - DMIC - 0x01371c00, 0x01371d00, 0x01371e00, 0x01371f40, // Pin widget 0x13 - DMIC - 0x01471c10, 0x01471d01, 0x01471e17, 0x01471f90, // Pin widget 0x14 - FRONT (Port-D) - 0x01571cf0, 0x01571d11, 0x01571e11, 0x01571f41, // Pin widget 0x15 - I2S-OUT - 0x01671cf0, 0x01671d11, 0x01671e11, 0x01671f41, // Pin widget 0x16 - LINE3 (Port-B) - 0x01771cf0, 0x01771d11, 0x01771e11, 0x01771f41, // Pin widget 0x17 - I2S-OUT - 0x01871cf0, 0x01871d11, 0x01871e11, 0x01871f41, // Pin widget 0x18 - I2S-IN - 0x01971cf0, 0x01971d11, 0x01971e11, 0x01971f41, // Pin widget 0x19 - MIC2 (Port-F) - 0x01a71cf0, 0x01a71d11, 0x01a71e11, 0x01a71f41, // Pin widget 0x1A - LINE1 (Port-C) - 0x01b71c50, 0x01b71d10, 0x01b71ea1, 0x01b71f04, // Pin widget 0x1B - LINE2 (Port-E) - 0x01d71c01, 0x01d71d00, 0x01d71e60, 0x01d71f40, // Pin widget 0x1D - PC-BEEP - 0x01e71c30, 0x01e71d11, 0x01e71e45, 0x01e71f04, // Pin widget 0x1E - S/PDIF-OUT - 0x01f71cf0, 0x01f71d11, 0x01f71e11, 0x01f71f41, // Pin widget 0x1F - S/PDIF-IN - 0x02171c20, 0x02171d10, 0x02171e21, 0x02171f04, // Pin widget 0x21 - HP-OUT (Port-I) - 0x02971cf0, 0x02971d11, 0x02971e11, 0x02971f41, // Pin widget 0x29 - I2S-IN + AZALIA_RESET(1), // Widget node 0x01 : + AZALIA_PIN_CFG(0, 0x12, 0xb7a60140), // Pin widget 0x12 - DMIC + AZALIA_PIN_CFG(0, 0x13, 0x40000000), // Pin widget 0x13 - DMIC + AZALIA_PIN_CFG(0, 0x14, 0x90170110), // Pin widget 0x14 - FRONT (Port-D) + AZALIA_PIN_CFG(0, 0x15, 0x411111f0), // Pin widget 0x15 - I2S-OUT + AZALIA_PIN_CFG(0, 0x16, 0x411111f0), // Pin widget 0x16 - LINE3 (Port-B) + AZALIA_PIN_CFG(0, 0x17, 0x411111f0), // Pin widget 0x17 - I2S-OUT + AZALIA_PIN_CFG(0, 0x18, 0x411111f0), // Pin widget 0x18 - I2S-IN + AZALIA_PIN_CFG(0, 0x19, 0x411111f0), // Pin widget 0x19 - MIC2 (Port-F) + AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), // Pin widget 0x1A - LINE1 (Port-C) + AZALIA_PIN_CFG(0, 0x1b, 0x04a11050), // Pin widget 0x1B - LINE2 (Port-E) + AZALIA_PIN_CFG(0, 0x1d, 0x40600001), // Pin widget 0x1D - PC-BEEP + AZALIA_PIN_CFG(0, 0x1e, 0x04451130), // Pin widget 0x1E - S/PDIF-OUT + AZALIA_PIN_CFG(0, 0x1f, 0x411111f0), // Pin widget 0x1F - S/PDIF-IN + AZALIA_PIN_CFG(0, 0x21, 0x04211020), // Pin widget 0x21 - HP-OUT (Port-I) + AZALIA_PIN_CFG(0, 0x29, 0x411111f0), // Pin widget 0x29 - I2S-IN 0x02050038, 0x02047901, 0x0205006b, 0x02040260, // NID 0x20 -0 Set Class-D output // power as 2.2W@4 Ohm, and // MIC2-VREFO-R is controlled by @@ -42,19 +42,19 @@ AZALIA_SUBVENDOR(0, 0x1022D002), - 0x0017ff00, 0x0017ff00, 0x0017ff00, 0x0017ff00, // Widget node 0x01 : - 0x01271c40, 0x01271d01, 0x01271ea6, 0x01271fb7, // Pin widget 0x12 - DMIC - 0x01371c00, 0x01371d00, 0x01371e00, 0x01371f40, // Pin widget 0x13 - DMIC - 0x01471c10, 0x01471d01, 0x01471e17, 0x01471f90, // Pin widget 0x14 - Front (Port-D) - 0x01671cf0, 0x01671d11, 0x01671e11, 0x01671f41, // Pin widget 0x16 - NPC - 0x01771cf0, 0x01771d11, 0x01771e11, 0x01771f41, // Pin widget 0x17 - I2S OUT - 0x01871cf0, 0x01871d11, 0x01871e11, 0x01871f41, // Pin widget 0x18 - I2S IN - 0x01971cf0, 0x01971d11, 0x01971e11, 0x01971f41, // Pin widget 0x19 - MIC2 (Port-F) - 0x01a71cf0, 0x01a71d11, 0x01a71e11, 0x01a71f41, // Pin widget 0x1A - NPC - 0x01b71c30, 0x01b71d90, 0x01b71ea1, 0x01b71f04, // Pin widget 0x1B - LINE2 (Port-E) - 0x01d71c2d, 0x01d71d19, 0x01d71e66, 0x01d71f40, // Pin widget 0x1D - BEEP-IN - 0x01e71cf0, 0x01e71d11, 0x01e71e11, 0x01e71f41, // Pin widget 0x1E - S/PDIF-OUT - 0x02171c20, 0x02171d10, 0x02171e21, 0x02171f04, // Pin widget 0x21 - HP1-OUT (Port-I) + AZALIA_RESET(0x01), // Widget node 0x01 : + AZALIA_PIN_CFG(0, 0x12, 0xb7a60140), // Pin widget 0x12 - DMIC + AZALIA_PIN_CFG(0, 0x13, 0x40000000), // Pin widget 0x13 - DMIC + AZALIA_PIN_CFG(0, 0x14, 0x90170110), // Pin widget 0x14 - Front (Port-D) + AZALIA_PIN_CFG(0, 0x16, 0x411111f0), // Pin widget 0x16 - NPC + AZALIA_PIN_CFG(0, 0x17, 0x411111f0), // Pin widget 0x17 - I2S OUT + AZALIA_PIN_CFG(0, 0x18, 0x411111f0), // Pin widget 0x18 - I2S IN + AZALIA_PIN_CFG(0, 0x19, 0x411111f0), // Pin widget 0x19 - MIC2 (Port-F) + AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), // Pin widget 0x1A - NPC + AZALIA_PIN_CFG(0, 0x1b, 0x04a19030), // Pin widget 0x1B - LINE2 (Port-E) + AZALIA_PIN_CFG(0, 0x1d, 0x4066192d), // Pin widget 0x1D - BEEP-IN + AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), // Pin widget 0x1E - S/PDIF-OUT + AZALIA_PIN_CFG(0, 0x21, 0x04211020), // Pin widget 0x21 - HP1-OUT (Port-I) 0x05c50011, 0x05c40003, 0x05c50011, 0x05c40003, // dis. Silence detect delay turn off 0x0205003c, 0x0204f254, 0x0205003c, 0x0204f214, // Class-D power on reset 0x02050045, 0x0204b009, 0x02050063, 0x02040020, // Set TRS + turn off MIC2 VREFO -- To view, visit https://review.coreboot.org/c/coreboot/+/42610 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9fccc53c3d56116027e28a9eec6ec27202017a79 Gerrit-Change-Number: 42610 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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coreboot-gerrit June 2020