Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41607 )
Change subject: drivers/intel/mipi_camera: Handle acpi_name and common code
......................................................................
Patch Set 29:
(3 comments)
https://review.coreboot.org/c/coreboot/+/41607/28//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/41607/28//COMMIT_MSG@10
PS28, Line 10: , if acpi_name is not set in the devicetree and
> Add comma after *devicetree*?
@Paul, the second statement "moves some of the common code to separate methods." is not related to camera_acpi_name method.
https://review.coreboot.org/c/coreboot/+/41607/28/src/drivers/intel/mipi_ca…
File src/drivers/intel/mipi_camera/camera.c:
https://review.coreboot.org/c/coreboot/+/41607/28/src/drivers/intel/mipi_ca…
PS28, Line 18: printk(BIOS_ERR, "CIO2/IMGU devices require PCI\n");
> Extend it a little, as it’s an error message? […]
Done
https://review.coreboot.org/c/coreboot/+/41607/28/src/drivers/intel/mipi_ca…
PS28, Line 39: printk(BIOS_ERR, "Non-CIO2/IMGU devices require I2C\n");
> Ditto.
Done
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Hello Varshit B Pandya, build bot (Jenkins), Matt Delco, Daniel Kang, Furquan Shaikh, Wonkyu Kim, Paul Menzel, Tim Wawrzynczak, Rizwan Qureshi, Tim Wawrzynczak, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41607
to look at the new patch set (#29).
Change subject: drivers/intel/mipi_camera: Handle acpi_name and common code
......................................................................
drivers/intel/mipi_camera: Handle acpi_name and common code
This change updates the mipi_camera driver to handle acpi_name based on
device_type, if acpi_name is not set in the devicetree and moves some of
the common code to a separate methods.
Change-Id: I15979f345fb823df2560db269e902a1ea650b69e
Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com>
---
M src/drivers/intel/mipi_camera/camera.c
M src/drivers/intel/mipi_camera/chip.h
2 files changed, 130 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/41607/29
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Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42902 )
Change subject: mb/google/volteer: set tcc_offset value to 10
......................................................................
mb/google/volteer: set tcc_offset value to 10
Set tcc_offset value to 10 in devicetree for Thermal Control
Circuit (TCC) activation feature.
BUG=None
BRANCH=None
TEST=Built for volteer platform and verified the MSR value
Change-Id: I6438547e09a3ff3a1c01addfcc01383e89f5b435
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com>
---
M src/mainboard/google/volteer/variants/baseboard/devicetree.cb
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/42902/1
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index 0c581a5..300fb7e 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -222,6 +222,8 @@
register "Device4Enable" = "1"
+ register "tcc_offset" = "10" # TCC of 90
+
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
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Jonathan Zhang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42895 )
Change subject: mb/facebook/watson: select VPD_SMBIOS_VERSION
......................................................................
mb/facebook/watson: select VPD_SMBIOS_VERSION
Select VPD_SMBIOS_VERSION so that "firmware_version" key value in
RO_VPD is reported in smbios type 0 as BIOS version.
TEST=Build coreboot image for WatsonV2, run "vpd -s
firmware_version=FB_OSF_1.2 -i RO_VPD -f build/coreboot.rom"
command to add firmware_version key value pair in RO_VPD,
flash the image to WatsonV2 and reboot it, run dmidecode to verify:
[root@localhost ~]# dmidecode -t 0
...
BIOS Information
Vendor: coreboot
Version: FB_OSF_1.2
...
Signed-off-by: Jonathan Zhang <jonzhang(a)fb.com>
Change-Id: Id559904bfc0afec0668cfaa28303242da4fccf5c
---
M src/mainboard/facebook/watson/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/42895/1
diff --git a/src/mainboard/facebook/watson/Kconfig b/src/mainboard/facebook/watson/Kconfig
index f8f93df..ffccdbe 100644
--- a/src/mainboard/facebook/watson/Kconfig
+++ b/src/mainboard/facebook/watson/Kconfig
@@ -24,6 +24,7 @@
select VBOOT if BOARD_FACEBOOK_WATSON_V2
select VBOOT_MEASURED_BOOT if BOARD_FACEBOOK_WATSON_V2
select VBOOT_STARTS_IN_ROMSTAGE if BOARD_FACEBOOK_WATSON_V2
+ select VPD_SMBIOS_VERSION
config MAINBOARD_DIR
string
--
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Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42688 )
Change subject: soc/amd/common/gpio: Use gpio_setbits32()
......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42688/6/src/soc/amd/common/block/g…
File src/soc/amd/common/block/gpio_banks/gpio.c:
https://review.coreboot.org/c/coreboot/+/42688/6/src/soc/amd/common/block/g…
PS6, Line 221: __gpio_setbits32
> I think CB:42875 is the way to go, I would abandon this.
I picked this change up since __gpio_setbits32() is still useful for preserving the pad strength and reserved bits.
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Furquan Shaikh has uploaded a new patch set (#7) to the change originally created by Kyösti Mälkki. ( https://review.coreboot.org/c/coreboot/+/42688 )
Change subject: soc/amd/common/gpio: Use gpio_setbits32()
......................................................................
soc/amd/common/gpio: Use gpio_setbits32()
Some codepaths want to set selected bits of a hardware register
to match those of a given variable in memory. Provide a helper
function for this purpose and use it in gpio_set(),
gpio_input_pulldown() and gpio_input_pullup().
This change also adds GPIO_PULL_MASK and updates GPIO_OUTPUT_MASK to
include all bits dealing with pull and output respectively.
Change-Id: I4413d113dff550900348a44f71b949b7547a9cfc
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Signed-off-by: Furquan Shaikh <furquan(a)google.com>
---
M src/soc/amd/common/block/gpio_banks/gpio.c
M src/soc/amd/common/block/include/amdblocks/gpio_banks.h
2 files changed, 12 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/42688/7
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41624 )
Change subject: drivers/intel/mipi_camera: Add camera power resource to SSDT
......................................................................
Patch Set 29:
(8 comments)
https://review.coreboot.org/c/coreboot/+/41624/12/src/drivers/intel/mipi_ca…
File src/drivers/intel/mipi_camera/camera.c:
https://review.coreboot.org/c/coreboot/+/41624/12/src/drivers/intel/mipi_ca…
PS12, Line 537: acpigen_write_store_op_to_namestr(0, "STA");
> OS can guarantee for a specific device, _ON and _OFF are called appropriately. […]
Ack
https://review.coreboot.org/c/coreboot/+/41624/12/src/drivers/intel/mipi_ca…
PS12, Line 513: acpigen_write_name_integer("STA", 0);
: acpigen_write_STA_ext("STA");
:
: acpigen_write_method_serialized("_ON", 0);
: acpigen_write_if();
: acpigen_emit_byte(LEQUAL_OP);
: acpigen_emit_namestring("STA");
: acpigen_write_integer(0);
:
: add_power_resource(config, &config->on_seq);
:
: acpigen_write_store_op_to_namestr(1, "STA");
: acpigen_pop_len(); /* if */
: acpigen_pop_len(); /* _ON */
:
: /* _OFF operations */
: acpigen_write_method_serialized("_OFF", 0);
: acpigen_write_if();
: acpigen_emit_byte(LEQUAL_OP);
: acpigen_emit_namestring("STA");
: acpigen_write_integer(1);
:
: add_power_resource(config, &config->off_seq);
:
: acpigen_write_store_op_to_namestr(0, "STA");
> Why is the extra "STA" "variable" necessary? The OS should only call _ON and _OFF as appropriate, I […]
Ack
https://review.coreboot.org/c/coreboot/+/41624/12/src/drivers/intel/mipi_ca…
PS12, Line 599: acpigen_write_name("_DEP");
: acpigen_write_package(1);
: acpigen_emit_namestring(config->dep);
: acpigen_pop_len();
> I think this can be removed. I will test once and remove it from SSDT generation patch.
Done
https://review.coreboot.org/c/coreboot/+/41624/18/src/drivers/intel/mipi_ca…
File src/drivers/intel/mipi_camera/camera.c:
https://review.coreboot.org/c/coreboot/+/41624/18/src/drivers/intel/mipi_ca…
PS18, Line 516: acpigen_write_name_integer
> Yes it is required as per the camera team. Please find my earlier answer. […]
Ack
https://review.coreboot.org/c/coreboot/+/41624/12/src/drivers/intel/mipi_ca…
File src/drivers/intel/mipi_camera/chip.h:
https://review.coreboot.org/c/coreboot/+/41624/12/src/drivers/intel/mipi_ca…
PS12, Line 85: struct gp_ct gps[4];
> struct gp_ct can be extended to include other properties related to GPIO in the future.
Ack
https://review.coreboot.org/c/coreboot/+/41624/12/src/drivers/intel/mipi_ca…
PS12, Line 90: index
> This is index to items in clock_ctrl_panel or gp_ctrl_panel
Done
https://review.coreboot.org/c/coreboot/+/41624/12/src/drivers/intel/mipi_ca…
PS12, Line 91: enum action_type action;
> There are plan to extend the operations types, so we might add more actions other than ENABLE/DISABL […]
Done
https://review.coreboot.org/c/coreboot/+/41624/4/src/drivers/intel/mipi_cam…
File src/drivers/intel/mipi_camera/chip.h:
https://review.coreboot.org/c/coreboot/+/41624/4/src/drivers/intel/mipi_cam…
PS4, Line 37:
: struct clk_ct {
: /* IMGCLKOUT_x being used for a port */
: uint32_t clknum;
: /* frequency setting: 0:24Mhz, 1:19.2 Mhz */
: uint32_t freq;
: } __packed;
:
: struct gp_ct {
: uint32_t gp_num;
: } __packed;
:
: struct clock_ctrl_panel {
: struct clk_ct clks[2];
: } __packed;
:
: struct gp_ctrl_panel {
: struct gp_ct gps[4];
: } __packed;
:
: struct operation_type {
: enum ctrl_type type;
: uint32_t index;
: enum action_type action;
: uint32_t delay_ms;
: } __packed;
:
: struct operation_seq {
: struct operation_type ops[5];
: uint32_t delay_ms[6];
: uint8_t ops_cnt;
: } __packed;
> I was planning to update clk_ct and gp_cnt to uint8_t but missed updating in last patch. […]
Done
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41607 )
Change subject: drivers/intel/mipi_camera: Handle acpi_name and common code
......................................................................
Patch Set 28: Code-Review+1
(3 comments)
https://review.coreboot.org/c/coreboot/+/41607/28//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/41607/28//COMMIT_MSG@10
PS28, Line 10: , if acpi_name is not set in the devicetree and
Add comma after *devicetree*?
https://review.coreboot.org/c/coreboot/+/41607/28/src/drivers/intel/mipi_ca…
File src/drivers/intel/mipi_camera/camera.c:
https://review.coreboot.org/c/coreboot/+/41607/28/src/drivers/intel/mipi_ca…
PS28, Line 18: printk(BIOS_ERR, "CIO2/IMGU devices require PCI\n");
Extend it a little, as it’s an error message?
> … No ACPI device(?) is created. The OS might not detect the camera.
https://review.coreboot.org/c/coreboot/+/41607/28/src/drivers/intel/mipi_ca…
PS28, Line 39: printk(BIOS_ERR, "Non-CIO2/IMGU devices require I2C\n");
Ditto.
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41624 )
Change subject: drivers/intel/mipi_camera: Add camera power resource to SSDT
......................................................................
Patch Set 29: Code-Review+2
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