coreboot-gerrit March 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/tigerlake: Add Jasper lake GPIO support
by Subrata Banik (Code Review) 03 Mar '20

03 Mar '20

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39111 ) Change subject: soc/intel/tigerlake: Add Jasper lake GPIO support ...................................................................... Patch Set 16: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/39111 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iae4e694ecb30658e43c5ed99e5436579fd7d2ed2 Gerrit-Change-Number: 39111 Gerrit-PatchSet: 16 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sooraj Govindan <sooraj.govindan(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 03 Mar 2020 07:03:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add Jasper lake GPIO support
by Maulik V Vaghela (Code Review) 03 Mar '20

03 Mar '20

Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Justin TerAvest, Rizwan Qureshi, Subrata Banik, Balaji Manigandan, Sooraj Govindan, Aamir Bohra, Patrick Rudolph, Martin Roth, Tim Wawrzynczak, Meera Ravindranath, Ronak Kanabar, Usha P, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39111 to look at the new patch set (#16). Change subject: soc/intel/tigerlake: Add Jasper lake GPIO support ...................................................................... soc/intel/tigerlake: Add Jasper lake GPIO support Add gpio definition for Jasper Lake gpio controller. Also created a separate file for JSL and TGL gpio keeping common asl file. gpio_soc_defs.h must pass correct information/macro values to asl file for code to work. GPIO controller includes 4 gpio community and 10 groups. Patch adds definition for all gpio within community and groups Updated IRQ mapping for all gpios TEST=Check if jslrvp and tglrvp code is compiling Change-Id: Iae4e694ecb30658e43c5ed99e5436579fd7d2ed2 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> Signed-off-by: Usha P <usha.p(a)intel.com> --- M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/tigerlake/acpi/gpio.asl A src/soc/intel/tigerlake/acpi/gpio_op.asl M src/soc/intel/tigerlake/chip.h A src/soc/intel/tigerlake/gpio_jsl.c R src/soc/intel/tigerlake/gpio_tgl.c M src/soc/intel/tigerlake/include/soc/gpio.h M src/soc/intel/tigerlake/include/soc/gpio_defs.h A src/soc/intel/tigerlake/include/soc/gpio_defs_jsl.h A src/soc/intel/tigerlake/include/soc/gpio_defs_tgl.h M src/soc/intel/tigerlake/include/soc/gpio_soc_defs.h A src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h A src/soc/intel/tigerlake/include/soc/gpio_soc_defs_tgl.h M src/soc/intel/tigerlake/include/soc/pmc.h 14 files changed, 1,792 insertions(+), 769 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/39111/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/39111 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iae4e694ecb30658e43c5ed99e5436579fd7d2ed2 Gerrit-Change-Number: 39111 Gerrit-PatchSet: 16 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sooraj Govindan <sooraj.govindan(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/tigerlake: Add Jasper lake GPIO support
by Maulik V Vaghela (Code Review) 03 Mar '20

03 Mar '20

Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39111 ) Change subject: soc/intel/tigerlake: Add Jasper lake GPIO support ...................................................................... Patch Set 15: (6 comments) https://review.coreboot.org/c/coreboot/+/39111/12/src/soc/intel/common/acpi… File src/soc/intel/common/acpi/gpio_op.asl: https://review.coreboot.org/c/coreboot/+/39111/12/src/soc/intel/common/acpi… PS12, Line 4: Copyright (C) 2020 Intel Corporation. > Done […] Ack https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/a… File src/soc/intel/tigerlake/acpi/gpio_op.asl: PS15: > I think this file should be converted to ASL 2.0 syntax as well. […] Ack https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/i… File src/soc/intel/tigerlake/include/soc/gpio.h: https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/i… PS15, Line 24: #define CROS_GPIO_DEVICE_NAME "GCM0" > This is not correct. There are multiple GPIO devices for TGL. Yes, this is not required since we are naming devices as GCM0 and kernel driver should be able to bind it from HID and UID https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/i… PS15, Line 41: /* Common macro definition for gpio_op.asl file */ > Aren't these macros already defined in some header file? No Furquan, these marcros are not defined in another header file. Since these macros gets changed over soc, we have kept it inside soc folder. https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/i… File src/soc/intel/tigerlake/include/soc/gpio_soc_defs.h: PS15: > Shouldn't this file be renamed as gpio_soc_defs_tgl. […] Ack and Done https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/i… File src/soc/intel/tigerlake/include/soc/pmc.h: https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/i… PS15, Line 135: #define PMC_GPP_B 0x1 : #define PMC_GPP_A 0x0 : #define PMC_GPP_R 0x4 : #define PMC_GPP_S 0x6 : #define PMC_GPD 0x3 : #define PMC_GPP_H 0xA : #define PMC_GPP_D 0x7 : #define PMC_GPP_F 0x2 : #define PMC_GPP_C 0x8 : #define PMC_GPP_E 0xF > Shouldn't these be ordered by number? Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/39111 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iae4e694ecb30658e43c5ed99e5436579fd7d2ed2 Gerrit-Change-Number: 39111 Gerrit-PatchSet: 15 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sooraj Govindan <sooraj.govindan(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 03 Mar 2020 07:00:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: md/kontron/mal10: Add COMe-mAL10 minimal support
by Andrey Petrov (Code Review) 03 Mar '20

03 Mar '20

Andrey Petrov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39133 ) Change subject: md/kontron/mal10: Add COMe-mAL10 minimal support ...................................................................... Patch Set 8: (2 comments) https://review.coreboot.org/c/coreboot/+/39133/8//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39133/8//COMMIT_MSG@7 PS8, Line 7: md mb? https://review.coreboot.org/c/coreboot/+/39133/8/src/mainboard/kontron/mal1… File src/mainboard/kontron/mal10/gpio.h: https://review.coreboot.org/c/coreboot/+/39133/8/src/mainboard/kontron/mal1… PS8, Line 161: #if 0 : PAD_CFG_NF_IOSSTATE(GPIO_196, NATIVE, DEEP, NF1, MASK), /* PNL1_VDDEN */ : PAD_CFG_NF_IOSSTATE(GPIO_197, NATIVE, DEEP, NF1, MASK), /* PNL1_BKLTEN */ : PAD_CFG_NF_IOSSTATE(GPIO_198, NATIVE, DEEP, NF1, MASK), /* PNL1_BKLTCTL */ why dead code? -- To view, visit https://review.coreboot.org/c/coreboot/+/39133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea Gerrit-Change-Number: 39133 Gerrit-PatchSet: 8 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <anpetrov(a)fb.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 03 Mar 2020 06:41:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add Jasper lake GPIO support
by Furquan Shaikh (Code Review) 03 Mar '20

03 Mar '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39111 ) Change subject: soc/intel/tigerlake: Add Jasper lake GPIO support ...................................................................... Patch Set 15: (6 comments) https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/a… File src/soc/intel/tigerlake/acpi/gpio_op.asl: PS15: I think this file should be converted to ASL 2.0 syntax as well. Feel free to do that as a follow-up. https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/g… File src/soc/intel/tigerlake/gpio_jsl.c: https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/g… PS15, Line 50: INTEL_GPP_BASE Just a note: This works currently based on the kernel driver implementation that is being pushed for JSL. I had posted a comment on the kernel driver that we should align the implementation with TGL. So, this driver in coreboot will have to be updated to match the kernel expectations once it changes. https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/i… File src/soc/intel/tigerlake/include/soc/gpio.h: https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/i… PS15, Line 24: #define CROS_GPIO_DEVICE_NAME "GCM0" This is not correct. There are multiple GPIO devices for TGL. https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/i… PS15, Line 41: /* Common macro definition for gpio_op.asl file */ Aren't these macros already defined in some header file? https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/i… File src/soc/intel/tigerlake/include/soc/gpio_soc_defs.h: PS15: Shouldn't this file be renamed as gpio_soc_defs_tgl.h just like the JSL one? https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/i… File src/soc/intel/tigerlake/include/soc/pmc.h: https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/i… PS15, Line 135: #define PMC_GPP_B 0x1 : #define PMC_GPP_A 0x0 : #define PMC_GPP_R 0x4 : #define PMC_GPP_S 0x6 : #define PMC_GPD 0x3 : #define PMC_GPP_H 0xA : #define PMC_GPP_D 0x7 : #define PMC_GPP_F 0x2 : #define PMC_GPP_C 0x8 : #define PMC_GPP_E 0xF Shouldn't these be ordered by number? -- To view, visit https://review.coreboot.org/c/coreboot/+/39111 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iae4e694ecb30658e43c5ed99e5436579fd7d2ed2 Gerrit-Change-Number: 39111 Gerrit-PatchSet: 15 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sooraj Govindan <sooraj.govindan(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 03 Mar 2020 06:29:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/intel/fsp/fsp2_0/tgl: Update FSP header for Tiger Lake
by caveh jalali (Code Review) 03 Mar '20

03 Mar '20

caveh jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39168 ) Change subject: vendorcode/intel/fsp/fsp2_0/tgl: Update FSP header for Tiger Lake ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/39168 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I063f921832a4e4a45eb6978b6dbb37b1ac7dde7f Gerrit-Change-Number: 39168 Gerrit-PatchSet: 2 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-Comment-Date: Tue, 03 Mar 2020 06:18:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Move gpio_op.asl file into common folder
by Maulik V Vaghela (Code Review) 03 Mar '20

03 Mar '20

Maulik V Vaghela has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39228 ) Change subject: soc/intel/common: Move gpio_op.asl file into common folder ...................................................................... soc/intel/common: Move gpio_op.asl file into common folder gpio_op.asl file is common across multiple soc and we can move it to common acpi folder for future soc to use. BUG=None BRANCH=None TEST=check if tglrvp and jslrvp compiles Change-Id: I17100aa7da9de0da44dbd26b763cdbf06b42c992 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> --- R src/soc/intel/common/acpi/gpio_op.asl M src/soc/intel/tigerlake/acpi/gpio.asl 2 files changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/39228/1 diff --git a/src/soc/intel/tigerlake/acpi/gpio_op.asl b/src/soc/intel/common/acpi/gpio_op.asl similarity index 100% rename from src/soc/intel/tigerlake/acpi/gpio_op.asl rename to src/soc/intel/common/acpi/gpio_op.asl diff --git a/src/soc/intel/tigerlake/acpi/gpio.asl b/src/soc/intel/tigerlake/acpi/gpio.asl index 0378b52..59d0fe9 100644 --- a/src/soc/intel/tigerlake/acpi/gpio.asl +++ b/src/soc/intel/tigerlake/acpi/gpio.asl @@ -16,7 +16,7 @@ #include <soc/irq.h> #include <soc/pcr_ids.h> #include <intelblocks/gpio.h> -#include "gpio_op.asl" +#include <soc/intel/common/acpi/gpio_op.asl> Device (GCM0) { -- To view, visit https://review.coreboot.org/c/coreboot/+/39228 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17100aa7da9de0da44dbd26b763cdbf06b42c992 Gerrit-Change-Number: 39228 Gerrit-PatchSet: 1 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/tigerlake: Add Jasper lake GPIO support
by Maulik V Vaghela (Code Review) 03 Mar '20

03 Mar '20

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Change in coreboot[master]: vendorcode/intel/fsp/fsp2_0/tgl: Update FSP header for Tiger Lake
by Srinidhi N Kaushik (Code Review) 03 Mar '20

03 Mar '20

Srinidhi N Kaushik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39168 ) Change subject: vendorcode/intel/fsp/fsp2_0/tgl: Update FSP header for Tiger Lake ...................................................................... Patch Set 2: Code-Review+1 (1 comment) > Patch Set 1: > > (1 comment) https://review.coreboot.org/c/coreboot/+/39168/1/src/vendorcode/intel/fsp/f… File src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h: PS1: > could you please set the file permissions back to 644? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/39168 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I063f921832a4e4a45eb6978b6dbb37b1ac7dde7f Gerrit-Change-Number: 39168 Gerrit-PatchSet: 2 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-Comment-Date: Tue, 03 Mar 2020 05:30:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: caveh jalali <caveh(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/intel/fsp/fsp2_0/tgl: Update FSP header for Tiger Lake
by Srinidhi N Kaushik (Code Review) 03 Mar '20

03 Mar '20

Hello Furquan Shaikh, Wonkyu Kim, caveh jalali, Tim Wawrzynczak, John Zhao, Nick Vaccaro, Raj Astekar, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39168 to look at the new patch set (#2). Change subject: vendorcode/intel/fsp/fsp2_0/tgl: Update FSP header for Tiger Lake ...................................................................... vendorcode/intel/fsp/fsp2_0/tgl: Update FSP header for Tiger Lake Update FSPM header to add Vtd related Upds for Tiger Lake platform version 2457. Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Change-Id: I063f921832a4e4a45eb6978b6dbb37b1ac7dde7f --- M src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h 1 file changed, 68 insertions(+), 39 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/39168/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/39168 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I063f921832a4e4a45eb6978b6dbb37b1ac7dde7f Gerrit-Change-Number: 39168 Gerrit-PatchSet: 2 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit March 2020