Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39265 )
Change subject: soc/intel/common/block/smm: add case intrusion to SMI handler
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39264 )
Change subject: soc/intel/common/block: tco: enable intruder SMI
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39263 )
Change subject: intel/soc: icl,cnl,apl,skl: add INTRUDER relevant registers
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39262 )
Change subject: intel/soc: icl,cnl,apl,skl,common: enable TCO SMIs
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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39134 )
Change subject: mb/up/squared: move USB config to device tree
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Patch Set 9: Code-Review+2
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Change subject: soc/intel/common/block/tco: clear TCO1_STS register, too
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Patch Set 2: Code-Review+1
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Change subject: soc/intel/common/block/tco: clear TCO1_STS register, too
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Uploaded patch set 2: Commit message was updated.
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Hello Shaunak Saha, build bot (Jenkins), Nico Huber, Patrick Georgi, Lee Leahy, Subrata Banik, Kyösti Mälkki, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39259
to look at the new patch set (#2).
Change subject: soc/intel/common/block/tco: clear TCO1_STS register, too
......................................................................
soc/intel/common/block/tco: clear TCO1_STS register, too
The register TCO1_STS is never cleared, which will cause SMIs to either
retrigger over and over again (e.g. TIMEOUT) or prevent concurrent
interrupt events, depending on which event triggered.
Clear both TCO2_STS and TCO1_STS.
This also fixes the issue where SECOND_TO_STS will always end up set in
the SMI handler by unconditionally (re)setting it.
Tested on X11SSM-F, where enabling TCO caused the terminal to get
flooded with SMI debug messages. With this patch, a message gets written
every ~1 second.
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
Change-Id: Ia57c203a672fdd0095355a7e2a0e01aaa6657968
---
M src/soc/intel/common/block/smbus/tco.c
1 file changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/39259/2
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