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Change in ...coreboot[master]: TEMP: NOT FOR REVIEW: google/mistral: Add LP5562 driver
by SANTHOSH JANARDHANA HASSAN (Code Review) 11 Mar '20

11 Mar '20

Hello Yuji Sasaki, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/32693 to review the following change. Change subject: TEMP: NOT FOR REVIEW: google/mistral: Add LP5562 driver ...................................................................... TEMP: NOT FOR REVIEW: google/mistral: Add LP5562 driver Add LP5562 driver to mistral board file. BUG=b:116352348 TEST=build coreboot and chromeos-bootimage, run on mistral. Signed-off-by: Yuji Sasaki <sasakiy(a)chromium.org> Change-Id: I0c26ac952671cb94a2e5681da6e2f2eafddedb48 --- M src/drivers/i2c/lp5562/led_lp5562_programs.c M src/mainboard/google/mistral/Kconfig M src/mainboard/google/mistral/board.h M src/mainboard/google/mistral/bootblock.c M src/mainboard/google/mistral/chromeos.c 5 files changed, 119 insertions(+), 94 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/32693/1 diff --git a/src/drivers/i2c/lp5562/led_lp5562_programs.c b/src/drivers/i2c/lp5562/led_lp5562_programs.c index f322f6a..e837dfd 100644 --- a/src/drivers/i2c/lp5562/led_lp5562_programs.c +++ b/src/drivers/i2c/lp5562/led_lp5562_programs.c @@ -60,12 +60,12 @@ /* RGB set to 000000, resulting in all LEDs off. */ static const uint8_t solid_00_text[] = { - 0x40, 0x00, 0xc0, 0x00 + 0x40, 0, 0xc0, 0x00 }; /* Rgb set to 128, resulting in a brightish white color. */ -static const uint8_t solid_80_text[] = { - 0x40, 0x80, 0xc0, 0x00 +static const uint8_t solid_FF_text[] = { + 0x40, 255, 0xc0, 0x00 }; static const TiLp5562Program solid_000000_program = { @@ -88,44 +88,94 @@ } }; -static const TiLp5562Program solid_808080_program = { +static const TiLp5562Program solid_FFFFFF_program = { { { /* Engine1:Blue */ - solid_80_text, - sizeof(solid_80_text), + solid_FF_text, + sizeof(solid_FF_text), 0, }, { /* Engine2:Green */ - solid_80_text, - sizeof(solid_80_text), + solid_FF_text, + sizeof(solid_FF_text), 0, }, { /* Engine3:Red */ - solid_80_text, - sizeof(solid_80_text), + solid_FF_text, + sizeof(solid_FF_text), 0, }, } }; /* + * fdr_press1.src + * + 1 00 .ENGINE1(B) + 2 00 4000 set_pwm 0 + 3 01 C000 end + 4 + 5 10 .ENGINE2(G) + 6 10 40CC set_pwm 204 + 7 11 C000 end + 8 + 9 20 .ENGINE3(R) + 10 20 40FF set_pwm 255 + 11 21 C000 end +*/ + +static const uint8_t fdr_press1_b_text[] = { + 0x40, 0, 0xc0, 0x00, +}; + +static const uint8_t fdr_press1_g_text[] = { + 0x40, 204, 0xc0, 0x00 +}; + +static const uint8_t fdr_press1_r_text[] = { + 0x40, 255, 0xc0, 0x00 +}; + +static const TiLp5562Program fdr_press1_program = { + { + { + fdr_press1_b_text, + sizeof(fdr_press1_b_text), + 0, + }, + { + fdr_press1_g_text, + sizeof(fdr_press1_g_text), + 0, + }, + { + fdr_press1_r_text, + sizeof(fdr_press1_r_text), + 0, + }, + } +}; + +/* + * blink_recovery1.src + * 1 00 .ENGINE1(B) 2 00 E200 trigger w3 - 3 01 409B set_pwm 155 + 3 01 4000 set_pwm 0 4 02 E200 trigger w3 5 03 4000 set_pwm 0 6 04 0000 gotostart 7 8 10 .ENGINE2(G) 9 10 E200 trigger w3 - 10 11 4032 set_pwm 50 + 10 11 40CC set_pwm 204 11 12 E200 trigger w3 12 13 4000 set_pwm 0 13 14 0000 gotostart 14 15 20 .ENGINE3(R) 16 20 E006 trigger s21 - 17 21 4001 set_pwm 1 + 17 21 40FF set_pwm 255 18 22 5300 wait 300 19 23 E006 trigger s21 20 24 4000 set_pwm 0 @@ -133,48 +183,13 @@ 22 26 0000 gotostart */ -static const uint8_t blink_wipeout1_b_text[] = { - 0xe2, 0x00, 0x40, 155, 0xe2, 0x00, 0x40, 0, - 0x00, 0x00, -}; - -static const uint8_t blink_wipeout1_g_text[] = { - 0xe2, 0x00, 0x40, 50, 0xe2, 0x00, 0x40, 0, - 0x00, 0x00, -}; - -static const uint8_t blink_wipeout1_r_text[] = { - 0xe0, 0x06, 0x40, 1, 0x53, 0x00, 0xe0, 0x06, - 0x40, 0, 0x53, 0x00, 0x00, 0x00 -}; - -static const TiLp5562Program blink_wipeout1_program = { - { - { - blink_wipeout1_b_text, - sizeof(blink_wipeout1_b_text), - 0, - }, - { - blink_wipeout1_g_text, - sizeof(blink_wipeout1_g_text), - 0, - }, - { - blink_wipeout1_r_text, - sizeof(blink_wipeout1_r_text), - 0, - }, - } -}; - static const uint8_t blink_recovery1_b_text[] = { - 0xe2, 0x00, 0x40, 10, 0xe2, 0x00, 0x40, 0, + 0xe2, 0x00, 0x40, 0, 0xe2, 0x00, 0x40, 0, 0x00, 0x00, }; static const uint8_t blink_recovery1_g_text[] = { - 0xe2, 0x00, 0x40, 100, 0xe2, 0x00, 0x40, 0, + 0xe2, 0x00, 0x40, 204, 0xe2, 0x00, 0x40, 0, 0x00, 0x00, }; @@ -187,73 +202,69 @@ { { blink_recovery1_b_text, - sizeof(blink_wipeout1_b_text), + sizeof(blink_recovery1_b_text), 0, }, { blink_recovery1_g_text, - sizeof(blink_wipeout1_g_text), + sizeof(blink_recovery1_g_text), 0, }, { blink_recovery1_r_text, - sizeof(blink_wipeout1_r_text), + sizeof(blink_recovery1_r_text), 0, }, } }; /* - * fade_in1.src + * preboot1.src * 1 00 .ENGINE1(B) 2 00 4000 set_pwm 0 3 01 E200 trigger w3 - 4 02 1B4C ramp 1000, 77 # ramp up to 155 for 2 seconds - 5 03 1A4D ramp 1000, 78 - 6 04 C000 end - 7 - 8 10 .ENGINE2(G) - 9 10 4000 set_pwm 0 - 10 11 E200 trigger w3 - 11 12 4318 ramp 1000, 25 # ramp up to 50 for 2 seconds - 12 13 4318 ramp 1000, 25 - 13 14 C000 end - 14 - 15 20 .ENGINE3(R) - 16 20 E006 trigger s21 - 17 21 4001 set_pwm 1 - 18 22 E006 trigger s21 - 19 23 C000 end + 4 02 0D4C ramp 500, 77 + 5 03 C000 end + 6 + 7 10 .ENGINE2(G) + 8 10 4000 set_pwm 0 + 9 11 E200 trigger w3 + 10 12 0D4C ramp 500, 77 + 11 13 C000 end + 12 + 13 20 .ENGINE3(R) + 14 20 4000 set_pwm 0 + 15 21 E006 trigger s21 + 16 22 0D4C ramp 500, 77 + 17 23 C000 end */ -static const uint8_t fade_in1_b_text[] = { - 0x40, 0, 0xe2, 0x00, 0x1b, 0x4c, 0x1a, 0x4d, - 0xc0, 0x00 +static const uint8_t preboot1_b_text[] = { + 0x40, 0x00, 0xe2, 0x00, 0x0d, 0x4c, 0xc0, 0x00 }; -static const uint8_t fade_in1_g_text[] = { - 0x40, 0, 0xe2, 0x00, 0x43, 0x18, 0x43, 0x18, - 0xc0, 0x00 +static const uint8_t preboot1_g_text[] = { + 0x40, 0x00, 0xe2, 0x00, 0x0d, 0x4c, 0xc0, 0x00 }; -static const uint8_t fade_in1_r_text[] = { - 0xe0, 0x06, 0x40, 1, 0xe0, 0x06, 0x00 +static const uint8_t preboot1_r_text[] = { + 0x40, 0x00, 0xe0, 0x06, 0x0d, 0x4c, 0xc0, 0x00 }; -static const TiLp5562Program fade_in1_program = { +static const TiLp5562Program preboot1_program = { { { - fade_in1_b_text, - sizeof(fade_in1_b_text), + preboot1_b_text, + sizeof(preboot1_b_text), 0, }, { - fade_in1_g_text, - sizeof(fade_in1_g_text), + preboot1_g_text, + sizeof(preboot1_g_text), 0, }, { - fade_in1_r_text, - sizeof(fade_in1_r_text), + preboot1_r_text, + sizeof(preboot1_r_text), 0, }, } @@ -265,9 +276,9 @@ * be changed soon. */ {LED_ALL_OFF, {&solid_000000_program} }, - {LED_RECOVERY_PUSHED, {&solid_808080_program} }, - {LED_WIPEOUT_REQUEST, {&blink_wipeout1_program} }, + {LED_RECOVERY_PUSHED, {&solid_FFFFFF_program} }, + {LED_WIPEOUT_REQUEST, {&fdr_press1_program} }, {LED_RECOVERY_REQUEST, {&blink_recovery1_program} }, - {LED_NORMAL_BOOT, {&fade_in1_program} }, + {LED_NORMAL_BOOT, {&preboot1_program} }, {}, /* Empty record to mark the end of the table. */ }; diff --git a/src/mainboard/google/mistral/Kconfig b/src/mainboard/google/mistral/Kconfig index 87d2df8..4529abd 100644 --- a/src/mainboard/google/mistral/Kconfig +++ b/src/mainboard/google/mistral/Kconfig @@ -15,6 +15,7 @@ select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_TPM2 select MAINBOARD_HAS_SPI_TPM_CR50 + select DRIVERS_I2C_LED_LP5562 config VBOOT select VBOOT_VBNV_FLASH diff --git a/src/mainboard/google/mistral/board.h b/src/mainboard/google/mistral/board.h index 51e4bf2..88db42c 100644 --- a/src/mainboard/google/mistral/board.h +++ b/src/mainboard/google/mistral/board.h @@ -23,6 +23,7 @@ #define GPIO_H1_AP_INT GPIO(53) #define GPIO_WP_STATE GPIO(54) #define GPIO_REC_STATE GPIO(77) +#define GPIO_LED_ENABLE GPIO(119) void setup_chromeos_gpios(void); diff --git a/src/mainboard/google/mistral/bootblock.c b/src/mainboard/google/mistral/bootblock.c index be7a71e..da9dda8 100644 --- a/src/mainboard/google/mistral/bootblock.c +++ b/src/mainboard/google/mistral/bootblock.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -15,9 +15,14 @@ #include <bootblock_common.h> #include <timestamp.h> +#include <delay.h> #include "board.h" void bootblock_mainboard_init(void) { + gpio_output(GPIO_LED_ENABLE, 0); + udelay(2); + gpio_set(GPIO_LED_ENABLE, 1); + mdelay(2); gpio_input_pullup(GPIO_H1_AP_INT); } diff --git a/src/mainboard/google/mistral/chromeos.c b/src/mainboard/google/mistral/chromeos.c index e0306b16..f220151 100644 --- a/src/mainboard/google/mistral/chromeos.c +++ b/src/mainboard/google/mistral/chromeos.c @@ -18,6 +18,8 @@ #include <console/console.h> #include <security/tpm/tis.h> #include <timer.h> +#include <drivers/i2c/lp5562/led_lp5562.h> +#include <soc/blsp.h> #include "board.h" void setup_chromeos_gpios(void) @@ -65,6 +67,11 @@ wipeout_req }; +static void display_pattern(int pattern) +{ + led_lp5562_display_pattern(BLSP_QUP_ID_1, pattern); +} + static enum switch_state get_rec_sw_state(void) { struct stopwatch sw; @@ -83,11 +90,11 @@ if (!sampled_value) { saved_state = no_req; - //display_pattern(WWR_NORMAL_BOOT); + display_pattern(LED_NORMAL_BOOT); return saved_state; } - //display_pattern(WWR_RECOVERY_PUSHED); + display_pattern(LED_RECOVERY_PUSHED); printk(BIOS_INFO, "recovery button pressed\n"); stopwatch_init_msecs_expire(&sw, WIPEOUT_MODE_DELAY_MS); @@ -99,7 +106,7 @@ } while (!stopwatch_expired(&sw)); if (sampled_value) { - //display_pattern(WWR_WIPEOUT_REQUEST); + display_pattern(LED_WIPEOUT_REQUEST); printk(BIOS_INFO, "wipeout requested, checking recovery\n"); stopwatch_init_msecs_expire(&sw, RECOVERY_MODE_EXTRA_DELAY_MS); do { @@ -110,14 +117,14 @@ if (sampled_value) { saved_state = recovery_req; - //display_pattern(WWR_RECOVERY_REQUEST); + display_pattern(LED_RECOVERY_REQUEST); printk(BIOS_INFO, "recovery requested\n"); } else { saved_state = wipeout_req; } } else { saved_state = no_req; - //display_pattern(WWR_NORMAL_BOOT); + display_pattern(LED_NORMAL_BOOT); } return saved_state; -- To view, visit https://review.coreboot.org/c/coreboot/+/32693 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c26ac952671cb94a2e5681da6e2f2eafddedb48 Gerrit-Change-Number: 32693 Gerrit-PatchSet: 1 Gerrit-Owner: SANTHOSH JANARDHANA HASSAN <sahassan(a)google.com> Gerrit-Reviewer: Yuji Sasaki <sasakiy(a)chromium.org> Gerrit-MessageType: newchange

5 13

Change in ...coreboot[master]: TEMP: NOT FOR REVIEW: google/mistral: Limit FDR detection for verstage
by Yuji Sasaki (Code Review) 11 Mar '20

11 Mar '20

Yuji Sasaki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32904 Change subject: TEMP: NOT FOR REVIEW: google/mistral: Limit FDR detection for verstage ...................................................................... TEMP: NOT FOR REVIEW: google/mistral: Limit FDR detection for verstage FDR switch detection and LED state change must only be functional when called in verstage. get_recovery_mode_switch() is called from ramstage as part of elog function but this is informational purpose, should not affecting LED state and boot mode. This CL is adding #if directives to limit FDR detection for verstage. When get_recovery_mode_switch() is called from other stages, it just return current FDR switch state but do not change LED state or boot mode. BUG=b:131622855 TEST=Build and run on DUT, keep pushing FDR switch and power on, verify it do not fall into secondary FDR detection loop in ramstage after "recovery requested" in verstage. Signed-off-by: Yuji Sasaki <sasakiy(a)chromium.org> Change-Id: Ib034acca2bcf39728e58b468e69e74620b086a10 --- M src/mainboard/google/mistral/chromeos.c 1 file changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/32904/1 diff --git a/src/mainboard/google/mistral/chromeos.c b/src/mainboard/google/mistral/chromeos.c index f220151..8873edd 100644 --- a/src/mainboard/google/mistral/chromeos.c +++ b/src/mainboard/google/mistral/chromeos.c @@ -67,6 +67,11 @@ wipeout_req }; +/* + * FDR switch detection and LED state change is only functional + * when called in verstage. + */ +#if defined(__VERSTAGE__) static void display_pattern(int pattern) { led_lp5562_display_pattern(BLSP_QUP_ID_1, pattern); @@ -130,6 +135,20 @@ return saved_state; } +/* + * get_recovery_mode_switch is called from ramstage as part of + * elog function, but this is informational purpose to show current + * FDR switch state, should not affecting LED and boot mode. + */ +#else // defined(__VERSTAGE) +static enum switch_state get_rec_sw_state(void) +{ + gpio_t rec_sw = GPIO_REC_STATE; + int sampled_value = !gpio_get(rec_sw); + return sampled_value ? recovery_req : no_req; +} +#endif // defined(__VERSTAGE) + int get_recovery_mode_switch(void) { return get_rec_sw_state() == recovery_req; -- To view, visit https://review.coreboot.org/c/coreboot/+/32904 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib034acca2bcf39728e58b468e69e74620b086a10 Gerrit-Change-Number: 32904 Gerrit-PatchSet: 1 Gerrit-Owner: Yuji Sasaki <sasakiy(a)chromium.org> Gerrit-MessageType: newchange

2 3

Change in ...coreboot[master]: TEMP: NOT FOR REVIEW: google/mistral: Add LED calibration
by Yuji Sasaki (Code Review) 11 Mar '20

11 Mar '20

Yuji Sasaki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33431 Change subject: TEMP: NOT FOR REVIEW: google/mistral: Add LED calibration ...................................................................... TEMP: NOT FOR REVIEW: google/mistral: Add LED calibration Add LED calibration for LP5562. BUG=b:130764817 TEST=Run on DUT, verify LED color and brightness changed with led_calibration entry in the VPD. Change-Id: Iff3ab55cdd12a8e8fe7549bce99a88ed0ef01534 --- M src/drivers/i2c/lp5562/Makefile.inc M src/drivers/i2c/lp5562/led_lp5562.c A src/drivers/i2c/lp5562/led_lp5562_calibration.c A src/drivers/i2c/lp5562/led_lp5562_calibration.h M src/drivers/i2c/lp5562/led_lp5562_programs.c M src/drivers/i2c/lp5562/led_lp5562_programs.h M src/mainboard/google/mistral/Makefile.inc A src/mainboard/google/mistral/led_calibration.c A src/mainboard/google/mistral/led_calibration.h M src/mainboard/google/mistral/verstage.c 10 files changed, 748 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/33431/1 diff --git a/src/drivers/i2c/lp5562/Makefile.inc b/src/drivers/i2c/lp5562/Makefile.inc index bfdb408..308898e 100644 --- a/src/drivers/i2c/lp5562/Makefile.inc +++ b/src/drivers/i2c/lp5562/Makefile.inc @@ -1,5 +1,6 @@ verstage-$(CONFIG_DRIVERS_I2C_LED_LP5562) += led_lp5562.c verstage-$(CONFIG_DRIVERS_I2C_LED_LP5562) += led_lp5562_programs.c +verstage-$(CONFIG_DRIVERS_I2C_LED_LP5562) += led_lp5562_calibration.c ramstage-$(CONFIG_DRIVERS_I2C_LED_LP5562) += led_lp5562.c ramstage-$(CONFIG_DRIVERS_I2C_LED_LP5562) += led_lp5562_programs.c diff --git a/src/drivers/i2c/lp5562/led_lp5562.c b/src/drivers/i2c/lp5562/led_lp5562.c index 6eafee3..268eac0 100644 --- a/src/drivers/i2c/lp5562/led_lp5562.c +++ b/src/drivers/i2c/lp5562/led_lp5562.c @@ -290,6 +290,14 @@ enable_reg |= LP5562_ENABLE_ALL_HOLD; ledc_write_enable(ledc, enable_reg); + /* Configure LED current */ + ledc_write(ledc, LP5562_CURRENT_B, + &program_desc->engine_program[0].led_current, 1); + ledc_write(ledc, LP5562_CURRENT_G, + &program_desc->engine_program[1].led_current, 1); + ledc_write(ledc, LP5562_CURRENT_R, + &program_desc->engine_program[2].led_current, 1); + /* All engines in LOAD mode. */ ledc_write_opmode(ledc, LP5562_OPMODE_ALL_LOAD); diff --git a/src/drivers/i2c/lp5562/led_lp5562_calibration.c b/src/drivers/i2c/lp5562/led_lp5562_calibration.c new file mode 100644 index 0000000..ec11719 --- /dev/null +++ b/src/drivers/i2c/lp5562/led_lp5562_calibration.c @@ -0,0 +1,174 @@ +// Copyright 2019 The Chromium OS Authors. All rights reserved. +// Use of this source code is governed by a BSD-style license that can be +// found in the LICENSE file. + +#include <console/console.h> +#include <string.h> +#include "led_lp5562_programs.h" +#include "led_lp5562_calibration.h" + +static int calculate_step_time(int duration, int increment) +{ +/* + * On LP5562 ramp instruction, duration (D, msec) is + * D = T * step_time * increment * 1000 + * where T = 0.49msec(1/2048Hz) or 15.6msec(1/64Hz) + * Thus, + * step_time = D/(increment*T)/1000 + * = (D*F)/increment/1000 + * Use F=2048 for short duration, F=64 for long duration. + */ + int step_time = ((duration * 2048) / increment) / 1000; + if (step_time > 63) { + step_time = ((duration * 64) / increment) / 1000; + if (step_time > 63) { + return -1; /* Overflow */ + } + step_time |= 0x40; + } + return step_time; +} + +static void calibrate_set_pwm_instruction( + const struct lp5562_calibration_code_map* code_map, + uint8_t *code, + int offset, + int intensity) +{ + /* + * Calibrate set_pwm instruction: + * Just to replace PWM value in the code. + */ + code[offset+0] = 0x40; + code[offset+1] = intensity; +} + +static void calibrate_ramp_instruction( + const struct lp5562_calibration_code_map* code_map, + uint8_t *code, + int offset, + int intensity) +{ + int intensity_reminder = intensity; + + /* + * Calibrate ramp instruction: + * We have to re-calculate PWM increment and step time in the code. + * Because LP5562 only can handle PWM increment in 7-bit range + * (+2 to +128) per instruction, we usually use 2 consecutive + * ramp instructions to implement full 8-bit PWM swing. + * In that case we have to replace multiple PWM values / + * and step times. + */ + for (int i = 0; i < code_map->ramp_num; i++) { + int ramp_sign = 0; + int increment = + code_map->ramp_instructions[i].ramp_division; + int duration = + code_map->ramp_instructions[i].ramp_duration; + + /* + * Calculate PWM increment for this instruction. + */ + if (increment < 0) { + increment = -increment; + ramp_sign = 0x80; + } + + /* + * To handle division remainder, we track remaining + * intensity and plase the leftover at the last of + * consecutive ramp instructions. + * (if there is only one ramp instruction, we always + * use the intensity as PWM increment). + */ + if ((i == (code_map->ramp_num - 1))) { + increment = intensity_reminder; + } else { + increment = ((intensity * increment) / 256); + intensity_reminder -= increment; + } + + /* + * If there is no need to ramp PWM value, + * substitute the code with "set_pwm 0" instruction + * (0x4000) as placeholder. + */ + if (increment == 0) { + code[offset+0] = 0x40; + code[offset+1] = 0x00; + } else { + int step_time = + calculate_step_time(duration, increment); + + /* + * LP5562 ramp/wait duration is correlated with + * increment. Smaller the increment, shorter the + * duration. + * If single ramp/wait instruction could not handle + * specified duration, try to incrase increment. + */ + while (step_time < 0) { + increment++; + step_time = calculate_step_time( + duration, increment); + } + + increment = ramp_sign | (increment - 1); + code[offset+0] = step_time; + code[offset+1] = increment; + } + offset += 2; + } +} + +int led_lp5562_calibrate(const struct lp5562_calibration_data* cal_data, + struct lp5562_calibrated_color* calibrated_colors) +{ + const struct lp5562_calibration_code_map* + code_map = cal_data->code_map; + + while (code_map->code_type != invalid) { + int bgr_index = code_map->component; + int rgb_index = (2 - bgr_index); + int offset = (code_map->code_offset % NPROGSIZE) * 2; + uint8_t *code = cal_data->pattern-> + engine_program[bgr_index].program_text; + + cal_data->pattern->engine_program[bgr_index].led_current = + calibrated_colors[cal_data->color_index]. + current_values[rgb_index]; + + /* + * Calculate calibrated LED intensity (0-255) + * +50 is to round off the fraction. + */ + int intensity = + calibrated_colors[cal_data->color_index]. + pwm_values[rgb_index]; + if (cal_data->relative_brightness != 100) { + intensity = (intensity * + cal_data->relative_brightness + 50) / 100; + } + + switch (code_map->code_type) { + + case set_pwm: + calibrate_set_pwm_instruction( + code_map, code, offset, intensity); + break; + + case ramp: + calibrate_ramp_instruction( + code_map, code, offset, intensity); + break; + + default: + break; + } + + code_map++; + } + return 0; +} + diff --git a/src/drivers/i2c/lp5562/led_lp5562_calibration.h b/src/drivers/i2c/lp5562/led_lp5562_calibration.h new file mode 100644 index 0000000..5d8bee9 --- /dev/null +++ b/src/drivers/i2c/lp5562/led_lp5562_calibration.h @@ -0,0 +1,74 @@ +// Copyright 2019 The Chromium OS Authors. All rights reserved. +// Use of this source code is governed by a BSD-style license that can be +// found in the LICENSE file. + +#ifndef LED_LP5562_CALIBRATION_H_ +#define LED_LP5562_CALIBRATION_H_ + +/* Size of LP5562 program memry, as in 16-bit word steps */ +#define NPROGSIZE 16 + +/* Number of consecutive ramp instructions */ +#define NMAXRAMPS 2 + +/* LP5562 color component number, associated with engine number */ +enum lp5562_components { + blue = 0, + green, + red +}; + +/* LP5562 code type for calibration (PWM value replacement) */ +enum lp5562_code_types { + invalid = 0, + set_pwm, + ramp +}; + +/* + * Structure to indicate where / how to replace PWM value + * in a LP5562 program code. + */ +struct lp5562_calibration_code_map { + enum lp5562_components component; + enum lp5562_code_types code_type; + /* Code offset, as in 16bit/word binary */ + uint8_t code_offset; + /* Number of consecutive ramp instructions */ + uint8_t ramp_num; + struct { + /* RAMP duration, in msec */ + uint16_t ramp_duration; + /* PWM division, -128 to +128 */ + int16_t ramp_division; + } ramp_instructions[NMAXRAMPS]; +}; + +/* + * Structure to store calibration data for a pattern. + */ +struct lp5562_calibration_data { + TiLp5562Program *pattern; + /* Index to calibrated color table */ + int color_index; + /* 0-100 % */ + int relative_brightness; + const struct lp5562_calibration_code_map* code_map; +}; + +/* + * Structure to store calibration data. + */ +struct lp5562_calibrated_color { + uint8_t pwm_values[3]; + uint8_t current_values[3]; +}; + +int led_lp5562_calibrate(const struct lp5562_calibration_data* cal_data, + struct lp5562_calibrated_color* calibrated_colors); + + +extern const struct lp5562_calibration_data mistral_calibration_database[]; + +#endif // LED_LP5562_CALIBRATION_H_ + diff --git a/src/drivers/i2c/lp5562/led_lp5562_programs.c b/src/drivers/i2c/lp5562/led_lp5562_programs.c index e837dfd..adb40bc 100644 --- a/src/drivers/i2c/lp5562/led_lp5562_programs.c +++ b/src/drivers/i2c/lp5562/led_lp5562_programs.c @@ -25,7 +25,9 @@ * LED behavior. */ +#include <stddef.h> #include "drivers/i2c/lp5562/led_lp5562_programs.h" +#include "drivers/i2c/lp5562/led_lp5562_calibration.h" /**************************************************************** * LED ring program definitions for different patterns. @@ -59,51 +61,64 @@ */ /* RGB set to 000000, resulting in all LEDs off. */ -static const uint8_t solid_00_text[] = { +static uint8_t solid_00_text[] = { 0x40, 0, 0xc0, 0x00 }; -/* Rgb set to 128, resulting in a brightish white color. */ -static const uint8_t solid_FF_text[] = { - 0x40, 255, 0xc0, 0x00 -}; - -static const TiLp5562Program solid_000000_program = { +static TiLp5562Program solid_000000_program = { { { /* Engine1:Blue */ solid_00_text, sizeof(solid_00_text), 0, - }, + LED_LP5562_DEFAULT_CURRENT + }, { /* Engine2:Green */ solid_00_text, sizeof(solid_00_text), 0, + LED_LP5562_DEFAULT_CURRENT }, { /* Engine3:Red */ solid_00_text, sizeof(solid_00_text), 0, + LED_LP5562_DEFAULT_CURRENT }, } }; -static const TiLp5562Program solid_FFFFFF_program = { +static uint8_t solid_FF_b_text[] = { + 0x40, 255, 0xc0, 0x00, +}; + +static uint8_t solid_FF_g_text[] = { + 0x40, 255, 0xc0, 0x00 +}; + +static uint8_t solid_FF_r_text[] = { + 0x40, 255, 0xc0, 0x00 +}; + +static TiLp5562Program solid_FFFFFF_program = { { { /* Engine1:Blue */ - solid_FF_text, - sizeof(solid_FF_text), + solid_FF_b_text, + sizeof(solid_FF_b_text), 0, + LED_LP5562_DEFAULT_CURRENT }, { /* Engine2:Green */ - solid_FF_text, - sizeof(solid_FF_text), + solid_FF_g_text, + sizeof(solid_FF_g_text), 0, + LED_LP5562_DEFAULT_CURRENT }, { /* Engine3:Red */ - solid_FF_text, - sizeof(solid_FF_text), + solid_FF_r_text, + sizeof(solid_FF_r_text), 0, + LED_LP5562_DEFAULT_CURRENT }, } }; @@ -124,34 +139,37 @@ 11 21 C000 end */ -static const uint8_t fdr_press1_b_text[] = { +static uint8_t fdr_press1_b_text[] = { 0x40, 0, 0xc0, 0x00, }; -static const uint8_t fdr_press1_g_text[] = { +static uint8_t fdr_press1_g_text[] = { 0x40, 204, 0xc0, 0x00 }; -static const uint8_t fdr_press1_r_text[] = { +static uint8_t fdr_press1_r_text[] = { 0x40, 255, 0xc0, 0x00 }; -static const TiLp5562Program fdr_press1_program = { +static TiLp5562Program fdr_press1_program = { { { fdr_press1_b_text, sizeof(fdr_press1_b_text), 0, + LED_LP5562_DEFAULT_CURRENT }, { fdr_press1_g_text, sizeof(fdr_press1_g_text), 0, + LED_LP5562_DEFAULT_CURRENT }, { fdr_press1_r_text, sizeof(fdr_press1_r_text), 0, + LED_LP5562_DEFAULT_CURRENT }, } }; @@ -183,37 +201,40 @@ 22 26 0000 gotostart */ -static const uint8_t blink_recovery1_b_text[] = { +static uint8_t blink_recovery1_b_text[] = { 0xe2, 0x00, 0x40, 0, 0xe2, 0x00, 0x40, 0, 0x00, 0x00, }; -static const uint8_t blink_recovery1_g_text[] = { +static uint8_t blink_recovery1_g_text[] = { 0xe2, 0x00, 0x40, 204, 0xe2, 0x00, 0x40, 0, 0x00, 0x00, }; -static const uint8_t blink_recovery1_r_text[] = { +static uint8_t blink_recovery1_r_text[] = { 0xe0, 0x06, 0x40, 255, 0x53, 0x00, 0xe0, 0x06, 0x40, 0, 0x53, 0x00, 0x00, 0x00 }; -static const TiLp5562Program blink_recovery1_program = { +static TiLp5562Program blink_recovery1_program = { { { blink_recovery1_b_text, sizeof(blink_recovery1_b_text), 0, + LED_LP5562_DEFAULT_CURRENT }, { blink_recovery1_g_text, sizeof(blink_recovery1_g_text), 0, + LED_LP5562_DEFAULT_CURRENT }, { blink_recovery1_r_text, sizeof(blink_recovery1_r_text), 0, + LED_LP5562_DEFAULT_CURRENT }, } }; @@ -240,41 +261,40 @@ 17 23 C000 end */ -static const uint8_t preboot1_b_text[] = { +static uint8_t preboot1_b_text[] = { 0x40, 0x00, 0xe2, 0x00, 0x0d, 0x4c, 0xc0, 0x00 }; -static const uint8_t preboot1_g_text[] = { +static uint8_t preboot1_g_text[] = { 0x40, 0x00, 0xe2, 0x00, 0x0d, 0x4c, 0xc0, 0x00 }; -static const uint8_t preboot1_r_text[] = { +static uint8_t preboot1_r_text[] = { 0x40, 0x00, 0xe0, 0x06, 0x0d, 0x4c, 0xc0, 0x00 }; -static const TiLp5562Program preboot1_program = { +static TiLp5562Program preboot1_program = { { { preboot1_b_text, sizeof(preboot1_b_text), 0, + LED_LP5562_DEFAULT_CURRENT }, { preboot1_g_text, sizeof(preboot1_g_text), 0, + LED_LP5562_DEFAULT_CURRENT }, { preboot1_r_text, sizeof(preboot1_r_text), 0, + LED_LP5562_DEFAULT_CURRENT }, } }; const Led5562StateProg led_lp5562_state_programs[] = { - /* - * for test purposes the blank screen program is set to blinking, will - * be changed soon. - */ {LED_ALL_OFF, {&solid_000000_program} }, {LED_RECOVERY_PUSHED, {&solid_FFFFFF_program} }, {LED_WIPEOUT_REQUEST, {&fdr_press1_program} }, @@ -282,3 +302,147 @@ {LED_NORMAL_BOOT, {&preboot1_program} }, {}, /* Empty record to mark the end of the table. */ }; + +/* + * Calibration code map for "solid" pattern. + * Set PWM values then stop. + */ +const struct lp5562_calibration_code_map mistral_code_map_solid[] = { + { + blue, + set_pwm, + 0x00, + 0, + { } + }, + { + green, + set_pwm, + 0x10, + 0, + { } + }, + { + red, + set_pwm, + 0x20, + 0, + { } + }, + { + 0, + invalid, + 0x00, + 0, + { } + } +}; + +/* + * Calibration code map for "blink" pattern. + * Set PWM values, wait, set PWMs to 0, wait, loop. + */ +const struct lp5562_calibration_code_map mistral_code_map_blink[] = { + { + blue, + set_pwm, + 0x01, + 0, + { } + }, + { + green, + set_pwm, + 0x11, + 0, + { } + }, + { + red, + set_pwm, + 0x21, + 0, + { } + }, + { + 0, + invalid, + 0x00, + 0, + { } + } +}; + +/* + * Calibration code map for "slow blink" pattern. + * Start from OFF, + * ramp up in 1sec, ramp down in 2sec, repeat forever. + */ + +/* + * Calibration code map for "ramp up" pattern. + * Start from OFF, ramp up in 0.5sec + */ +const struct lp5562_calibration_code_map mistral_code_map_ramp_up[] = { + { + blue, + ramp, + 0x02, + 1, + { {500, 256}, } + }, + { + green, + ramp, + 0x12, + 1, + { {500, 256}, } + }, + { + red, + ramp, + 0x22, + 1, + { {500, 256}, } + }, + { + 0, + invalid, + 0x00, + 0, + { } + } +}; + +const struct lp5562_calibration_data mistral_calibration_database[] = { + { + &solid_FFFFFF_program, + 0, /* White */ + 100, /* 30% brigheness */ + mistral_code_map_solid, + }, + { + &preboot1_program, + 0, /* White */ + 30, /* 30% brigheness */ + mistral_code_map_ramp_up, + }, + { + &blink_recovery1_program, + 1, /* Yellow */ + 100, /* 100% brightness */ + mistral_code_map_blink, + }, + { + &fdr_press1_program, + 1, /* Yellow */ + 100, /* 100% brightness */ + mistral_code_map_solid, + }, + { + NULL, + 0, + 0, + NULL + } +}; diff --git a/src/drivers/i2c/lp5562/led_lp5562_programs.h b/src/drivers/i2c/lp5562/led_lp5562_programs.h index e5373c0..54dd0b2 100644 --- a/src/drivers/i2c/lp5562/led_lp5562_programs.h +++ b/src/drivers/i2c/lp5562/led_lp5562_programs.h @@ -37,6 +37,9 @@ /* Number of LP5562 controllers on this implementation */ #define LED_LP5562_NUM_LED_CONTROLLERS 1 +/* Default LED current (x0.1 mA) */ +#define LED_LP5562_DEFAULT_CURRENT 120 + /* * Structure to describe an lp5562 program: pointer to the text of the * program, its size for each engines, and start address relative to @@ -45,9 +48,10 @@ */ typedef struct { struct { - const uint8_t *program_text; + uint8_t *program_text; uint8_t program_size; uint8_t engine_start_addr; + uint8_t led_current; } engine_program[LED_LP5562_NUM_OF_ENGINES]; } TiLp5562Program; diff --git a/src/mainboard/google/mistral/Makefile.inc b/src/mainboard/google/mistral/Makefile.inc index ab81a73..f6dcb09 100644 --- a/src/mainboard/google/mistral/Makefile.inc +++ b/src/mainboard/google/mistral/Makefile.inc @@ -8,6 +8,7 @@ verstage-y += chromeos.c verstage-y += reset.c verstage-y += verstage.c +verstage-y += led_calibration.c romstage-y += memlayout.ld romstage-y += chromeos.c diff --git a/src/mainboard/google/mistral/led_calibration.c b/src/mainboard/google/mistral/led_calibration.c new file mode 100644 index 0000000..661332a --- /dev/null +++ b/src/mainboard/google/mistral/led_calibration.c @@ -0,0 +1,266 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <string.h> +#include <fmap.h> +#include "drivers/i2c/lp5562/led_lp5562_programs.h" +#include "drivers/i2c/lp5562/led_lp5562_calibration.h" +#include "led_calibration.h" + +/* Number of predefined colors */ +#define NDEFCOLORS 3 + +const char *color_names[NDEFCOLORS] = { + "white", + "yellow", + "red" +}; + +struct lp5562_calibrated_color calibrated_colors[NDEFCOLORS] = { + { {255, 255, 255}, {120, 120, 120} }, + { {255, 204, 0}, {120, 120, 120} }, + { {255, 0, 0}, {120, 120, 120} }, +}; + +static const char key_name[] = "led_calibration"; + +/* Some constants of VPD2.0 format */ +enum { + GOOGLE_VPD_2_0_OFFSET = 0x600, + VPD_TYPE_STRING = 0x01, + VPD_TYPE_INFO = 0xfe, +}; + +static int _strspn(const char *str, const char *spn); +static int _strcspn(const char *str, const char *spn); +static int _atoi(const char *str); +static int decode_vpd_length(uint8_t *vpd_ptr, int *offset_p, int max_len); +static int load_caldata_from_vpd(char *caldata_buff, int caldata_size); + +static int _strspn(const char *str, const char *spn) +{ + int ret = 0; + + while (*str != 0) { + const char *p = spn; + while (*p != 0) { + if (*str == *p) { + break; + } + p++; + } + if (*p == 0) { + break; + } + ret++; + str++; + } + return ret; +} + +static int _strcspn(const char *str, const char *spn) +{ + int ret = 0; + + while (*str != 0) { + const char *p = spn; + while (*p != 0) { + if (*str == *p++) { + return ret; + } + } + ret++; + str++; + } + return ret; +} + +static int _atoi(const char *str) +{ + int ret = 0; + + while (isdigit(*str)) { + ret *= 10; + ret += *str++ - '0'; + } + return ret; +} + + +/* Decode VPD length from given buffer */ +static int decode_vpd_length(uint8_t *vpd_ptr, int *offset_p, int max_len) +{ + int offset = *offset_p; + int len = 0; + uint8_t d; + + do { + d = vpd_ptr[offset++]; + len *= 128; + len += (d & 0x7f); + } while ((d & 0x80) && (offset < max_len)); + + if (d & 0x80) { + len = -1; + } + *offset_p = offset; + return len; +} + +/* Find and read LED calibration data from VPD */ +static int load_caldata_from_vpd(char *caldata_buff, int caldata_size) +{ + struct region_device rdev; + size_t offset; + size_t size; + ssize_t read_len; + int buff_offset; + int len; + uint8_t buff[256]; + int led_caldata_found = 0; + + if (fmap_locate_area_as_rdev("RO_VPD", &rdev)) { + return 0; + } + + /* Search from VPD2.0 fixed offset */ + offset = GOOGLE_VPD_2_0_OFFSET; + size = rdev.region.size; + while (!led_caldata_found && offset < size) { + uint8_t type; + + /* Read key length */ + read_len = rdev_readat(&rdev, buff, offset, 4); + if (read_len < 0) break; + type = buff[0]; + if ((type != VPD_TYPE_STRING) && (type != VPD_TYPE_INFO)) { + break; + } + buff_offset = 1; + len = decode_vpd_length(buff, &buff_offset, (size - offset)); + if (len < 0) break; + + offset += buff_offset; + if (len < sizeof(buff)) { + /* Read key */ + read_len = rdev_readat(&rdev, buff, offset, len); + if (read_len < 0) break; + buff[len] = 0; + if ((type == VPD_TYPE_STRING) && + (strcmp((char*)buff, key_name) == 0)) { + led_caldata_found = 1; + } + } + offset += len; + + /* Read value length */ + read_len = rdev_readat(&rdev, buff, offset, 4); + if (read_len < 0) break; + buff_offset = 0; + len = decode_vpd_length(buff, &buff_offset, (size - offset)); + if (len < 0) break; + + offset += buff_offset; + if (led_caldata_found) { + if (len >= caldata_size) { + printk(BIOS_ERR, + "LED_LP5562: Caldata too large(%d)\n", + len); + break; + } + + /* Read value */ + read_len = rdev_readat(&rdev, caldata_buff, offset, len); + if (read_len < 0) break; + led_caldata_found = 2; + } + offset += len; + } + return (led_caldata_found == 2); +} + +int calibrate_led(void) +{ + const char *separators = " ,;"; + char buff[256]; + char *p = buff; + int idx; + + if (!load_caldata_from_vpd(buff, sizeof(buff))) { + printk(BIOS_INFO, "LED_LP5562: Valid caldata not found\n"); + return 0; + } + + /* + * Parse calibration data + * Calibration data is list of entries separated by semicolon(;) + * An entry is list of values separated by commna(,) + * first value is ASCII string color name, + * second value is ASCII decimal string of current, + * 3rd, 4th, 5th values are brightness of Red, Green and Blue. + */ + while (*p != 0) { + int color; + int rgb; + int len; + + len = _strcspn(p, separators); + if (len < 1) { + break; + } + for (color = 0; color < NDEFCOLORS; color++) { + if (strncmp(color_names[color], p, len) == 0) { + break; + } + } + if (color >= NDEFCOLORS) { + len = _strcspn(p, ";"); + if (len < 0) { + break; + } + p += (len + 1); + continue; + } + + p += len; + p += _strspn(p, separators); + calibrated_colors[color].current_values[0] = + calibrated_colors[color].current_values[1] = + calibrated_colors[color].current_values[2] = _atoi(p); + + p += _strcspn(p, separators); + p += _strspn(p, separators); + for (rgb = 0; rgb < 3; rgb++) { + calibrated_colors[color].pwm_values[rgb] = _atoi(p); + p += _strcspn(p, separators); + p += _strspn(p, separators); + } + } + + /* + * Apply calibration data + */ + idx = 0; + while (mistral_calibration_database[idx].pattern != NULL) { + led_lp5562_calibrate( + &mistral_calibration_database[idx], + calibrated_colors); + idx++; + + } + return 0; +} + diff --git a/src/mainboard/google/mistral/led_calibration.h b/src/mainboard/google/mistral/led_calibration.h new file mode 100644 index 0000000..a9efe93 --- /dev/null +++ b/src/mainboard/google/mistral/led_calibration.h @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __COREBOOT_SRC_MAINBOARD_GOOGLE_MISTRAL_LED_CALIBRATION_H +#define __COREBOOT_SRC_MAINBOARD_GOOGLE_MISTRAL_LED_CALIBRATION_H + +extern int calibrate_led(void); + +#endif + diff --git a/src/mainboard/google/mistral/verstage.c b/src/mainboard/google/mistral/verstage.c index 08b5391..6a15de2 100644 --- a/src/mainboard/google/mistral/verstage.c +++ b/src/mainboard/google/mistral/verstage.c @@ -19,6 +19,7 @@ #include <soc/clock.h> #include <spi-generic.h> #include "board.h" +#include "led_calibration.h" void verstage_mainboard_init(void) { @@ -30,4 +31,5 @@ CONFIG_DRIVER_TPM_SPI_CHIP, &spi)) { printk(BIOS_ERR, "Failed to setup TPM SPI slave\n"); } + calibrate_led(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/33431 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iff3ab55cdd12a8e8fe7549bce99a88ed0ef01534 Gerrit-Change-Number: 33431 Gerrit-PatchSet: 1 Gerrit-Owner: Yuji Sasaki <sasakiy(a)chromium.org> Gerrit-MessageType: newchange

4 16

Change in coreboot[master]: mb/google/mistral: Store developer mode status in coreboot table
by Patrick Georgi (Code Review) 11 Mar '20

11 Mar '20

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34674 ) Change subject: mb/google/mistral: Store developer mode status in coreboot table ...................................................................... mb/google/mistral: Store developer mode status in coreboot table It's needed downstream and the recent vboot rework dropped the information when killing the hand-off block. Change-Id: I411eb8ee6783402db6d4443a6ea1026cf7ad3ae3 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- M src/mainboard/google/mistral/mainboard.c 1 file changed, 21 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/34674/1 diff --git a/src/mainboard/google/mistral/mainboard.c b/src/mainboard/google/mistral/mainboard.c index d50758c..b350b27 100644 --- a/src/mainboard/google/mistral/mainboard.c +++ b/src/mainboard/google/mistral/mainboard.c @@ -14,7 +14,9 @@ */ #include <device/device.h> +#include <boot/coreboot_tables.h> #include <bootblock_common.h> +#include <security/vboot/vboot_common.h> #include <vendorcode/google/chromeos/chromeos.h> #include <soc/usb.h> @@ -50,3 +52,22 @@ .name = CONFIG_MAINBOARD_PART_NUMBER, .enable_dev = mainboard_enable, }; + +void lb_board(struct lb_header *header) +{ + struct lb_modeflags { + uint32_t tag; + uint32_t size; + uint32_t reserved; + uint32_t out_flags; + } *entry; + + entry = (struct lb_modeflags *)lb_new_record(header); + entry->tag = LB_TAG_VBOOT_HANDOFF; + entry->size = sizeof(*entry); + entry->reserved = 0; + entry->out_flags = 0; + if (vboot_developer_mode_enabled()) { + entry->out_flags |= VB_INIT_OUT_ENABLE_DEVELOPER; + } +} -- To view, visit https://review.coreboot.org/c/coreboot/+/34674 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I411eb8ee6783402db6d4443a6ea1026cf7ad3ae3 Gerrit-Change-Number: 34674 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

4 14

Change in coreboot[master]: qcs405: Add RPM support
by Patrick Georgi (Code Review) 11 Mar '20

11 Mar '20

Patrick Georgi has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/29970 ) Change subject: qcs405: Add RPM support ...................................................................... Abandoned won't be finished here -- To view, visit https://review.coreboot.org/c/coreboot/+/29970 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17f491f0a4bd0dce7522b7e80e1bac97ec18b945 Gerrit-Change-Number: 29970 Gerrit-PatchSet: 46 Gerrit-Owner: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: abandon

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Change in ...coreboot[master]: TEMP: NOT FOR REVIEW qcs405: Enable bl31
by Name of user not set (Code Review) 11 Mar '20

11 Mar '20

nsekar(a)codeaurora.org has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31899 Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31 ...................................................................... TEMP: NOT FOR REVIEW qcs405: Enable bl31 Keeping it seperate to include bl31.elf till we can build bl31 from repo Change-Id: Icca865369358e54a042b2dce02072c05761194b2 Signed-off-by: Nitheesh Sekar <nsekar(a)codeaurora.org> Signed-off-by: Sricharan R <sricharan(a)codeaurora.org> --- M src/arch/arm64/Makefile.inc M src/soc/qualcomm/qcs405/Makefile.inc M src/soc/qualcomm/qcs405/soc.c 3 files changed, 16 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/31899/1 diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc index 6bb7196..bf2f01b 100644 --- a/src/arch/arm64/Makefile.inc +++ b/src/arch/arm64/Makefile.inc @@ -157,6 +157,8 @@ ifeq ($(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE),y) +ifneq ($(CONFIG_SOC_QUALCOMM_QCS405),y) + ifeq ($(CONFIG_ARM64_BL31_EXTERNAL_FILE),"") BL31_SOURCE := $(top)/3rdparty/arm-trusted-firmware @@ -235,6 +237,8 @@ endif # CONFIG_ARM64_USE_SECURE_OS +endif # CONFIG_SOC_QUALCOMM_QCS405 + endif # CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE endif # CONFIG_ARCH_RAMSTAGE_ARM64 diff --git a/src/soc/qualcomm/qcs405/Makefile.inc b/src/soc/qualcomm/qcs405/Makefile.inc index 8c57f4a..b6ad8c2 100644 --- a/src/soc/qualcomm/qcs405/Makefile.inc +++ b/src/soc/qualcomm/qcs405/Makefile.inc @@ -107,4 +107,15 @@ @printf "Generating: $(subst $(obj)/,,$(@))\n" cp $(objcbfs)/bootblock.raw.bin $(objcbfs)/bootblock.bin endif +################################################################################ +BL31_FILE := $(QCS405_BLOB)/bl31.elf +bl31_file := $(shell ls $(BL31_FILE)) +ifneq (,$(findstring $(BL31_FILE),$(bl31_file))) + BL31_CBFS := $(CONFIG_CBFS_PREFIX)/bl31 + $(BL31_CBFS)-file := $(BL31_FILE) + $(BL31_CBFS)-type := payload + $(BL31_CBFS)-compression := none + cbfs-files-y += $(BL31_CBFS) +endif +################################################################################ endif diff --git a/src/soc/qualcomm/qcs405/soc.c b/src/soc/qualcomm/qcs405/soc.c index ea52eb8..e22a3d8 100644 --- a/src/soc/qualcomm/qcs405/soc.c +++ b/src/soc/qualcomm/qcs405/soc.c @@ -23,7 +23,7 @@ void bootmem_platform_add_ranges(void) { - bootmem_add_range((uintptr_t)_dram_reserved, _dram_reserved_size, BM_MEM_BL31); + bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31); } static void soc_read_resources(struct device *dev) -- To view, visit https://review.coreboot.org/c/coreboot/+/31899 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icca865369358e54a042b2dce02072c05761194b2 Gerrit-Change-Number: 31899 Gerrit-PatchSet: 1 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-MessageType: newchange

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Change in coreboot[master]: qcs405: Add bl31 stage and elf
by Patrick Georgi (Code Review) 11 Mar '20

11 Mar '20

Patrick Georgi has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/29981 ) Change subject: qcs405: Add bl31 stage and elf ...................................................................... Abandoned won't be finished here -- To view, visit https://review.coreboot.org/c/coreboot/+/29981 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I967c0b78a3561574609bf8332a22838c85e43429 Gerrit-Change-Number: 29981 Gerrit-PatchSet: 45 Gerrit-Owner: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: abandon

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Change in coreboot[master]: qcs405: Combine BB with QC-Sec for ROM boot
by Patrick Georgi (Code Review) 11 Mar '20

11 Mar '20

Patrick Georgi has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/29958 ) Change subject: qcs405: Combine BB with QC-Sec for ROM boot ...................................................................... Abandoned won't be finished here -- To view, visit https://review.coreboot.org/c/coreboot/+/29958 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2428fd067c0216d9cf6a63e218d1792788317db0 Gerrit-Change-Number: 29958 Gerrit-PatchSet: 45 Gerrit-Owner: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: abandon

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Change in coreboot[master]: qclib: Add qclib support with interface tables
by Patrick Georgi (Code Review) 11 Mar '20

11 Mar '20

Patrick Georgi has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/29967 ) Change subject: qclib: Add qclib support with interface tables ...................................................................... Abandoned won't be finished here -- To view, visit https://review.coreboot.org/c/coreboot/+/29967 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I534af71163d034ea04420dda6a94ce31b08c8a07 Gerrit-Change-Number: 29967 Gerrit-PatchSet: 46 Gerrit-Owner: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-CC: mturney mturney <mturney(a)codeaurora.org> Gerrit-MessageType: abandon

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Change in ...coreboot[master]: TEMP: NOT FOR REVIEW: Mistral: Add board id detection using TPM
by Name of user not set (Code Review) 11 Mar '20

11 Mar '20

nsekar(a)codeaurora.org has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31898 Change subject: TEMP: NOT FOR REVIEW: Mistral: Add board id detection using TPM ...................................................................... TEMP: NOT FOR REVIEW: Mistral: Add board id detection using TPM This patch adds support to select the board id based on the TPM availability. Change-Id: Ifa7b17085364bb631f43a133839773033721062d Signed-off-by: Nitheesh Sekar <nsekar(a)codeaurora.org> --- M src/drivers/spi/tpm/tis.c M src/drivers/spi/tpm/tpm.c M src/mainboard/google/mistral/boardid.c M src/security/tpm/tis.h M src/soc/qualcomm/qcs405/include/soc/memlayout.ld M src/soc/qualcomm/qcs405/include/soc/symbols.h 6 files changed, 49 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/31898/1 diff --git a/src/drivers/spi/tpm/tis.c b/src/drivers/spi/tpm/tis.c index 40bf27d..9d0f664 100644 --- a/src/drivers/spi/tpm/tis.c +++ b/src/drivers/spi/tpm/tis.c @@ -4,6 +4,8 @@ * found in the LICENSE file. */ +#include <symbols.h> +#include <soc/symbols.h> #include <arch/early_variables.h> #include <console/console.h> #include <string.h> @@ -93,3 +95,13 @@ return 0; } + +unsigned int is_tpm_detected(void) +{ + if (0 == (*_tpm_detection)) + return 0; + else if (1 == (*_tpm_detection)) + return 1; + else + return 0; +} diff --git a/src/drivers/spi/tpm/tpm.c b/src/drivers/spi/tpm/tpm.c index aad7610..b2484aa0 100644 --- a/src/drivers/spi/tpm/tpm.c +++ b/src/drivers/spi/tpm/tpm.c @@ -15,6 +15,8 @@ * Specification Revision 00.43". */ +#include <symbols.h> +#include <soc/symbols.h> #include <arch/early_variables.h> #include <assert.h> #include <commonlib/endian.h> @@ -457,10 +459,13 @@ } if (!retries) { + *_tpm_detection = 0; printk(BIOS_ERR, "\n%s: Failed to connect to the TPM\n", __func__); return -1; } + else + *_tpm_detection = 1; printk(BIOS_INFO, " done!\n"); diff --git a/src/mainboard/google/mistral/boardid.c b/src/mainboard/google/mistral/boardid.c index b86f84e..66309c0 100644 --- a/src/mainboard/google/mistral/boardid.c +++ b/src/mainboard/google/mistral/boardid.c @@ -17,6 +17,7 @@ #include <gpio.h> #include <console/console.h> #include <stdlib.h> +#include <security/tpm/tis.h> /* * Mistral boards dedicate to the board ID three GPIOs in ternary mode: 105, 106 @@ -32,8 +33,22 @@ [1] = GPIO(106), [0] = GPIO(105)}; - bid = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins)); - printk(BIOS_INFO, "Board ID %d\n", bid); + if (0 == is_tpm_detected()) { + bid = 25; /* Assign 25 for EVB boards */ + printk(BIOS_DEBUG, "EVB Board ID: %d\n", bid); + } else { + bid = 0; /* Assign 0 for Proto boards */ + + /* The board id assigned for Proto boards is 0. + * Since gpios are not wired in the initial phase, + * we will get 0 whihch is a coincidence. + * To make sure it starts working, after gpios are + * wired, reassign the value read from gpios to id. + */ + bid = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins)); + + printk(BIOS_DEBUG, "Proto Board ID: %d\n", bid); + } return bid; } diff --git a/src/security/tpm/tis.h b/src/security/tpm/tis.h index c410838..dd2f348 100644 --- a/src/security/tpm/tis.h +++ b/src/security/tpm/tis.h @@ -97,4 +97,14 @@ */ int tis_plat_irq_status(void); +/* + * This function is_tpm_detected() sets tpm_detection value to be 1 upon TPM detection. + * The value is writted to the specific region of SRAM which will retain + * the TPM Detection information between various stages of the bootloader. + * + * Returns 0 if TPM is not detected + * Returns 1 if TPM is detected + */ +unsigned int is_tpm_detected(void); + #endif /* TIS_H_ */ diff --git a/src/soc/qualcomm/qcs405/include/soc/memlayout.ld b/src/soc/qualcomm/qcs405/include/soc/memlayout.ld index c23f651..585abf5 100644 --- a/src/soc/qualcomm/qcs405/include/soc/memlayout.ld +++ b/src/soc/qualcomm/qcs405/include/soc/memlayout.ld @@ -39,6 +39,7 @@ TIMESTAMP(0x8C50000, 1K) PRERAM_CBMEM_CONSOLE(0x8C50400, 32K) PRERAM_CBFS_CACHE(0x8C58400, 70K) + REGION(tpm_detection, 0x8CFD000, 0x8, 0x10) BSRAM_END(0x8D80000) DRAM_START(0x80000000) diff --git a/src/soc/qualcomm/qcs405/include/soc/symbols.h b/src/soc/qualcomm/qcs405/include/soc/symbols.h index 45e6988..ce6e7cb 100644 --- a/src/soc/qualcomm/qcs405/include/soc/symbols.h +++ b/src/soc/qualcomm/qcs405/include/soc/symbols.h @@ -23,4 +23,8 @@ DECLARE_REGION(bsram); DECLARE_REGION(dram_reserved); +extern u8 _tpm_detection[]; +extern u8 _etpm_detection[]; +#define _tpm_detection_size (_etpm_detection - _tpm_detection) + #endif // _SOC_QUALCOMM_QCS405_SYMBOLS_H_ -- To view, visit https://review.coreboot.org/c/coreboot/+/31898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa7b17085364bb631f43a133839773033721062d Gerrit-Change-Number: 31898 Gerrit-PatchSet: 1 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-MessageType: newchange

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