coreboot-gerrit March 2020

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Change in coreboot[master]: mb/intel/jasperlake_rvp: Add memory config for jslrvp
by Aamir Bohra (Code Review) 17 Mar '20

17 Mar '20

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39195 ) Change subject: mb/intel/jasperlake_rvp: Add memory config for jslrvp ...................................................................... Patch Set 13: (2 comments) https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… File src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h: https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… PS12, Line 4: 2019 2019-20 https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… File src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory.c: https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… PS12, Line 5: Copyright 2018 Intel Corp. 2020 since new file. -- To view, visit https://review.coreboot.org/c/coreboot/+/39195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc92363a2148990df16c2068c7986013d015f604 Gerrit-Change-Number: 39195 Gerrit-PatchSet: 13 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Mar 2020 10:38:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/jasperlake_rvp: Add memory config for jslrvp
by Aamir Bohra (Code Review) 17 Mar '20

17 Mar '20

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39195 ) Change subject: mb/intel/jasperlake_rvp: Add memory config for jslrvp ...................................................................... Patch Set 13: (2 comments) https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… File src/mainboard/intel/jasperlake_rvp/romstage_fsp_params.c: https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… PS12, Line 23: = {}; not needed? const is initialized as 0? https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… File src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h: https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… PS12, Line 35: void needs board id as arg -- To view, visit https://review.coreboot.org/c/coreboot/+/39195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc92363a2148990df16c2068c7986013d015f604 Gerrit-Change-Number: 39195 Gerrit-PatchSet: 13 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Mar 2020 10:35:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: add support to read spd data from SMBUS
by Paul Menzel (Code Review) 17 Mar '20

17 Mar '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39401 ) Change subject: soc/intel/tigerlake: add support to read spd data from SMBUS ...................................................................... Patch Set 6: (8 comments) https://review.coreboot.org/c/coreboot/+/39401/6//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39401/6//COMMIT_MSG@7 PS6, Line 7: spd SPD https://review.coreboot.org/c/coreboot/+/39401/6//COMMIT_MSG@7 PS6, Line 7: SMBUS SMBus https://review.coreboot.org/c/coreboot/+/39401/6//COMMIT_MSG@9 PS6, Line 9: SMBUS SMBus https://review.coreboot.org/c/coreboot/+/39401/6//COMMIT_MSG@10 PS6, Line 10: data. So, add support to read SPD data from SMBUS Please add a dot/period at the end of sentences. https://review.coreboot.org/c/coreboot/+/39401/6//COMMIT_MSG@11 PS6, Line 11: Tested how? https://review.coreboot.org/c/coreboot/+/39401/6/src/soc/intel/tigerlake/in… File src/soc/intel/tigerlake/include/soc/meminit_jsl.h: https://review.coreboot.org/c/coreboot/+/39401/6/src/soc/intel/tigerlake/in… PS6, Line 20: #include <stdint.h> Should be cleaned up in a separate commit. https://review.coreboot.org/c/coreboot/+/39401/6/src/soc/intel/tigerlake/in… PS6, Line 55: spd SPD https://review.coreboot.org/c/coreboot/+/39401/6/src/soc/intel/tigerlake/me… File src/soc/intel/tigerlake/meminit_jsl.c: https://review.coreboot.org/c/coreboot/+/39401/6/src/soc/intel/tigerlake/me… PS6, Line 109: spd_info->spd_spec.spd_smbus_address[i]; Fits into 96 characters? -- To view, visit https://review.coreboot.org/c/coreboot/+/39401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94f8707c731c8afa1106e387a246c000bd53a654 Gerrit-Change-Number: 39401 Gerrit-PatchSet: 6 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Mar 2020 10:24:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/jasperlake_rvp: Add memory config for jslrvp
by Maulik V Vaghela (Code Review) 17 Mar '20

17 Mar '20

Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39195 ) Change subject: mb/intel/jasperlake_rvp: Add memory config for jslrvp ...................................................................... Patch Set 13: (2 comments) https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… File src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h: https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… PS12, Line 1: uu > needs to be removed.. Done https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… File src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory.c: https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… PS12, Line 117: else > else is not generally useful after a break or return Done -- To view, visit https://review.coreboot.org/c/coreboot/+/39195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc92363a2148990df16c2068c7986013d015f604 Gerrit-Change-Number: 39195 Gerrit-PatchSet: 13 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Mar 2020 10:20:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: build bot (Jenkins) <no-reply(a)coreboot.org> Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/jasperlake_rvp: Add memory config for jslrvp
by Maulik V Vaghela (Code Review) 17 Mar '20

17 Mar '20

Maulik V Vaghela has uploaded a new patch set (#13) to the change originally created by Ronak Kanabar. ( https://review.coreboot.org/c/coreboot/+/39195 ) Change subject: mb/intel/jasperlake_rvp: Add memory config for jslrvp ...................................................................... mb/intel/jasperlake_rvp: Add memory config for jslrvp Add memory initialization parameters for JSLRVP boards JSLRVP supports two variants, one with memory LPDDR4 and another with DDR4 Based on board id, mainboard will pass correct memory parameters to the soc. BUG=None BRANCH=None TEST=Check compilation for jslrvp and check memory training passes. Change-Id: Idc92363a2148990df16c2068c7986013d015f604 Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> Signed-off-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> --- M src/mainboard/intel/jasperlake_rvp/romstage_fsp_params.c M src/mainboard/intel/jasperlake_rvp/spd/Makefile.inc A src/mainboard/intel/jasperlake_rvp/spd/jslrvp.spd.hex D src/mainboard/intel/jasperlake_rvp/spd/spd_util.c M src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/Makefile.inc A src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory.c 7 files changed, 192 insertions(+), 142 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/39195/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/39195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc92363a2148990df16c2068c7986013d015f604 Gerrit-Change-Number: 39195 Gerrit-PatchSet: 13 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/tigerlake: add support to read spd data from SMBUS
by Subrata Banik (Code Review) 17 Mar '20

17 Mar '20

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39401 ) Change subject: soc/intel/tigerlake: add support to read spd data from SMBUS ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/coreboot/+/39401/5/src/soc/intel/tigerlake/me… File src/soc/intel/tigerlake/meminit_jsl.c: https://review.coreboot.org/c/coreboot/+/39401/5/src/soc/intel/tigerlake/me… PS5, Line 118: meminit_channels > Yes, valid point, you would miss Rcomp, DqDqs […] or call meminit_dq_dqs_map(mem_cfg, board_cfg, half_populated); from READ_SMBUS if case ? in that way, do are not filling those spdptr without any purpose? calling layer would be reduced ? if (spd_info->read_type == READ_SMBUS) { for (int i = 0; i < NUM_DIMM_SLOT; i++) mem_cfg->SpdAddressTable[i] = spd_info->spd_spec.spd_smbus_address[i]; meminit_dq_dqs_map(mem_cfg, board_cfg, half_populated); } else { size_t spd_data_len = 0; uintptr_t spd_data_ptr = 0; memset(&mem_cfg->SpdAddressTable, 0, sizeof(mem_cfg->SpdAddressTable)); get_spd_data(spd_info, &spd_data_ptr, &spd_data_len); print_spd_info((unsigned char *)spd_data_ptr); mem_cfg->MemorySpdDataLen = spd_data_len; meminit_channels(mem_cfg, board_cfg, spd_data_ptr, half_populated); } -- To view, visit https://review.coreboot.org/c/coreboot/+/39401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94f8707c731c8afa1106e387a246c000bd53a654 Gerrit-Change-Number: 39401 Gerrit-PatchSet: 6 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Mar 2020 10:19:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/lenovo/*: Add vboot RO FMAPs on 12MiB devices
by Marcello Sylvester Bauer (Code Review) 17 Mar '20

17 Mar '20

Hello Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39450 to look at the new patch set (#2). Change subject: mb/lenovo/*: Add vboot RO FMAPs on 12MiB devices ...................................................................... mb/lenovo/*: Add vboot RO FMAPs on 12MiB devices Tested on W530 Change-Id: I9be0c5e06fcb8287d32171cb72dabb5fcf047e7a Signed-off-by: Marcello Sylvester Bauer <sylv(a)sylv.io> --- A src/mainboard/lenovo/t430/vboot-ro.fmd A src/mainboard/lenovo/t430s/vboot-ro.fmd A src/mainboard/lenovo/t440p/vboot-ro.fmd A src/mainboard/lenovo/t530/vboot-ro.fmd A src/mainboard/lenovo/x131e/vboot-ro.fmd A src/mainboard/lenovo/x1_carbon_gen1/vboot-ro.fmd A src/mainboard/lenovo/x230/vboot-ro.fmd 7 files changed, 147 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/39450/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/39450 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9be0c5e06fcb8287d32171cb72dabb5fcf047e7a Gerrit-Change-Number: 39450 Gerrit-PatchSet: 2 Gerrit-Owner: Marcello Sylvester Bauer <sylv(a)sylv.io> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/tigerlake: add support to read spd data from SMBUS
by Maulik V Vaghela (Code Review) 17 Mar '20

17 Mar '20

Maulik V Vaghela has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/39401 ) Change subject: soc/intel/tigerlake: add support to read spd data from SMBUS ...................................................................... Removed Code-Review+2 by Maulik V Vaghela <maulik.v.vaghela(a)intel.com> -- To view, visit https://review.coreboot.org/c/coreboot/+/39401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94f8707c731c8afa1106e387a246c000bd53a654 Gerrit-Change-Number: 39401 Gerrit-PatchSet: 6 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: deleteVote

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Change in coreboot[master]: mb/intel/jasperlake_rvp: Add memory config for jslrvp
by Aamir Bohra (Code Review) 17 Mar '20

17 Mar '20

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39195 ) Change subject: mb/intel/jasperlake_rvp: Add memory config for jslrvp ...................................................................... Patch Set 12: (1 comment) https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… File src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h: https://review.coreboot.org/c/coreboot/+/39195/12/src/mainboard/intel/jaspe… PS12, Line 1: uu needs to be removed.. -- To view, visit https://review.coreboot.org/c/coreboot/+/39195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc92363a2148990df16c2068c7986013d015f604 Gerrit-Change-Number: 39195 Gerrit-PatchSet: 12 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Mar 2020 10:16:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: add support to read spd data from SMBUS
by Subrata Banik (Code Review) 17 Mar '20

17 Mar '20

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39401 ) Change subject: soc/intel/tigerlake: add support to read spd data from SMBUS ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/coreboot/+/39401/5/src/soc/intel/tigerlake/me… File src/soc/intel/tigerlake/meminit_jsl.c: https://review.coreboot.org/c/coreboot/+/39401/5/src/soc/intel/tigerlake/me… PS5, Line 118: meminit_channels > you would need dqs map and rcomp setting even for the SMBUS case right? […] Yes, valid point, you would miss Rcomp, DqDqs uintptr_t spd_data_ptr = 0; if (spd_info->read_type == READ_SMBUS) { for (int i = 0; i < NUM_DIMM_SLOT; i++) mem_cfg->SpdAddressTable[i] = spd_info->spd_spec.spd_smbus_address[i]; } else { size_t spd_data_len = 0; memset(&mem_cfg->SpdAddressTable, 0, sizeof(mem_cfg->SpdAddressTable)); get_spd_data(spd_info, &spd_data_ptr, &spd_data_len); print_spd_info((unsigned char *)spd_data_ptr); mem_cfg->MemorySpdDataLen = spd_data_len; } meminit_channels(mem_cfg, board_cfg, spd_data_ptr, half_populated); -- To view, visit https://review.coreboot.org/c/coreboot/+/39401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94f8707c731c8afa1106e387a246c000bd53a654 Gerrit-Change-Number: 39401 Gerrit-PatchSet: 6 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Mar 2020 10:15:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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coreboot-gerrit March 2020