coreboot-gerrit March 2020

coreboot-gerrit@coreboot.org

1 participants
3326 discussions

Change in coreboot[master]: soc/amd/picasso: Move get_soc_config to common location
by Marshall Dawson (Code Review) 17 Mar '20

17 Mar '20

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38695 ) Change subject: soc/amd/picasso: Move get_soc_config to common location ...................................................................... soc/amd/picasso: Move get_soc_config to common location Multiple files can eventually take advantage of the static function in i2c.c. Move get_soc_config() into a new common location for all to use. Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Change-Id: If5d9be2f74cde370979033365af2e355eb6d814e --- M src/soc/amd/picasso/Makefile.inc A src/soc/amd/picasso/cfg_util.c M src/soc/amd/picasso/i2c.c 3 files changed, 31 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/38695/1 diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 59f8e4c..b4ced2c 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -84,6 +84,7 @@ ramstage-y += tsc_freq.c ramstage-y += finalize.c +all-y += cfg_util.c all-y += reset.c smm-y += smihandler.c diff --git a/src/soc/amd/picasso/cfg_util.c b/src/soc/amd/picasso/cfg_util.c new file mode 100644 index 0000000..60555e4 --- /dev/null +++ b/src/soc/amd/picasso/cfg_util.c @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <device/device.h> +#include <soc/pci_devs.h> +#include "chip.h" + +const config_t *get_soc_config(void) +{ + const struct device *dev = pcidev_path_on_root(GNB_DEVFN); + + if (!dev || !dev->chip_info) { + printk(BIOS_ERR, "%s: Could not find SoC devicetree config!\n", + __func__); + return NULL; + } + + return dev->chip_info; +} diff --git a/src/soc/amd/picasso/i2c.c b/src/soc/amd/picasso/i2c.c index bcdf385..408b60b 100644 --- a/src/soc/amd/picasso/i2c.c +++ b/src/soc/amd/picasso/i2c.c @@ -42,19 +42,6 @@ return i2c_bus_address[bus - APU_I2C_MIN_BUS]; } -static const struct soc_amd_picasso_config *get_soc_config(void) -{ - const struct device *dev = pcidev_path_on_root(GNB_DEVFN); - - if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "%s: Could not find SoC devicetree config!\n", - __func__); - return NULL; - } - - return dev->chip_info; -} - const struct dw_i2c_bus_config *dw_i2c_get_soc_cfg(unsigned int bus) { const struct soc_amd_picasso_config *config; -- To view, visit https://review.coreboot.org/c/coreboot/+/38695 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If5d9be2f74cde370979033365af2e355eb6d814e Gerrit-Change-Number: 38695 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

2 2

Change in coreboot[master]: sc7180: Add QUPv3 FW load & config
by build bot (Jenkins) (Code Review) 17 Mar '20

17 Mar '20

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35499 ) Change subject: sc7180: Add QUPv3 FW load & config ...................................................................... Patch Set 44: (1 comment) https://review.coreboot.org/c/coreboot/+/35499/44/src/soc/qualcomm/sc7180/q… File src/soc/qualcomm/sc7180/qupv3_config.c: https://review.coreboot.org/c/coreboot/+/35499/44/src/soc/qualcomm/sc7180/q… PS44, Line 30: const char *filename[] = { char * array declaration might be better as static const -- To view, visit https://review.coreboot.org/c/coreboot/+/35499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d91dd10488931247f81a87b0bdcc598f4bceb31 Gerrit-Change-Number: 35499 Gerrit-PatchSet: 44 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Doug Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Roja Rani Yarubandi <c_rojay(a)qualcomm.corp-partner.google.com> Gerrit-CC: Satya Priya Kakitapalli <c_skakit(a)qualcomm.corp-partner.google.com> Gerrit-CC: Stephen Boyd <swboyd(a)chromium.org> Gerrit-CC: Taniya Das <tdas(a)codeaurora.org> Gerrit-Comment-Date: Tue, 17 Mar 2020 15:57:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: sc7180: Add I2C driver
by Ravi kumar (Code Review) 17 Mar '20

17 Mar '20

Ravi kumar has uploaded a new patch set (#31) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/36830 ) Change subject: sc7180: Add I2C driver ...................................................................... sc7180: Add I2C driver Add I2C functionality in coreboot. Change-Id: I61221ffff8afe5c7ede5abb9e194e242ab0274d8 Signed-off-by: Roja Rani Yarubandi <rojay(a)codeaurora.org> --- M src/soc/qualcomm/sc7180/Makefile.inc A src/soc/qualcomm/sc7180/include/soc/qupv3_i2c.h A src/soc/qualcomm/sc7180/qupv3_i2c.c 3 files changed, 192 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/36830/31 -- To view, visit https://review.coreboot.org/c/coreboot/+/36830 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I61221ffff8afe5c7ede5abb9e194e242ab0274d8 Gerrit-Change-Number: 36830 Gerrit-PatchSet: 31 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Satya Priya Kakitapalli <c_skakit(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Roja Rani Yarubandi <c_rojay(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: sc7180: Add UART support
by Ravi kumar (Code Review) 17 Mar '20

17 Mar '20

Ravi kumar has uploaded a new patch set (#44) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/35500 ) Change subject: sc7180: Add UART support ...................................................................... sc7180: Add UART support This implements the UART driver in SoC Developer/Reviewer, be aware of this patch from Napali: https://review.coreboot.org/c/coreboot/+/25373/78 Change-Id: I6494daa108197c030577ac86dab71f9ca6c21bdb Signed-off-by: Roja Rani Yarubandi <rojay(a)codeaurora.org> --- M src/soc/qualcomm/sc7180/Kconfig M src/soc/qualcomm/sc7180/Makefile.inc A src/soc/qualcomm/sc7180/qupv3_uart.c 3 files changed, 179 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/35500/44 -- To view, visit https://review.coreboot.org/c/coreboot/+/35500 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6494daa108197c030577ac86dab71f9ca6c21bdb Gerrit-Change-Number: 35500 Gerrit-PatchSet: 44 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Roja Rani Yarubandi <c_rojay(a)qualcomm.corp-partner.google.com> Gerrit-CC: Satya Priya Kakitapalli <c_skakit(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: sc7180: Add QUPv3 FW load & config
by Ravi kumar (Code Review) 17 Mar '20

17 Mar '20

Ravi kumar has uploaded a new patch set (#44) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/35499 ) Change subject: sc7180: Add QUPv3 FW load & config ...................................................................... sc7180: Add QUPv3 FW load & config UART driver requires firmware loading Developer/Reviewer, be aware of this patch from Napali: https://review.coreboot.org/c/coreboot/+/25372/78 https://review.coreboot.org/c/coreboot/+/27483/58 Change-Id: I4d91dd10488931247f81a87b0bdcc598f4bceb31 Signed-off-by: Roja Rani Yarubandi <rojay(a)codeaurora.org> --- M src/soc/qualcomm/sc7180/Makefile.inc M src/soc/qualcomm/sc7180/bootblock.c M src/soc/qualcomm/sc7180/include/soc/addressmap.h A src/soc/qualcomm/sc7180/include/soc/qcom_qup_se.h A src/soc/qualcomm/sc7180/include/soc/qupv3_config.h A src/soc/qualcomm/sc7180/qcom_qup_se.c A src/soc/qualcomm/sc7180/qupv3_config.c 7 files changed, 1,053 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/35499/44 -- To view, visit https://review.coreboot.org/c/coreboot/+/35499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d91dd10488931247f81a87b0bdcc598f4bceb31 Gerrit-Change-Number: 35499 Gerrit-PatchSet: 44 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Doug Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Roja Rani Yarubandi <c_rojay(a)qualcomm.corp-partner.google.com> Gerrit-CC: Satya Priya Kakitapalli <c_skakit(a)qualcomm.corp-partner.google.com> Gerrit-CC: Stephen Boyd <swboyd(a)chromium.org> Gerrit-CC: Taniya Das <tdas(a)codeaurora.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: Documentation/Intel: s5 charging applet design document
by Subrata Banik (Code Review) 17 Mar '20

17 Mar '20

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37762 ) Change subject: Documentation/Intel: s5 charging applet design document ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/37762 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb0d70d81890a60212c914b6bc2bfc7e35479ba9 Gerrit-Change-Number: 37762 Gerrit-PatchSet: 4 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Tue, 17 Mar 2020 13:18:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: Documentation/Intel: s5 charging applet design document
by Maulik V Vaghela (Code Review) 17 Mar '20

17 Mar '20

Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37762 ) Change subject: Documentation/Intel: s5 charging applet design document ...................................................................... Patch Set 4: hi all, Can you please review this patch? -- To view, visit https://review.coreboot.org/c/coreboot/+/37762 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb0d70d81890a60212c914b6bc2bfc7e35479ba9 Gerrit-Change-Number: 37762 Gerrit-PatchSet: 4 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Tue, 17 Mar 2020 11:58:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: [WIP]: temp changes to enable external EC compilation by default
by Maulik V Vaghela (Code Review) 17 Mar '20

17 Mar '20

Maulik V Vaghela has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/39583 ) Change subject: [WIP]: temp changes to enable external EC compilation by default ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/39583 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I13259ff54e3c8912dfabc01b0b7a0042d875b924 Gerrit-Change-Number: 39583 Gerrit-PatchSet: 1 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-MessageType: abandon

1 0

Change in coreboot[master]: mb/intel/jasperlake_rvp: Add memory config for Jasper Lake RVP
by Maulik V Vaghela (Code Review) 17 Mar '20

17 Mar '20

Maulik V Vaghela has uploaded a new patch set (#18) to the change originally created by Ronak Kanabar. ( https://review.coreboot.org/c/coreboot/+/39195 ) Change subject: mb/intel/jasperlake_rvp: Add memory config for Jasper Lake RVP ...................................................................... mb/intel/jasperlake_rvp: Add memory config for Jasper Lake RVP Add memory initialization parameters for Jasper Lake RVP boards Jasper Lake RVP supports two variants, one with memory LPDDR4 and another with DDR4 Based on board id, mainboard will pass correct memory parameters to the fsp. BUG=None BRANCH=None TEST=Check compilation for Jasper Lake RVP and check memory training passes. Change-Id: Idc92363a2148990df16c2068c7986013d015f604 Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> Signed-off-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> --- M src/mainboard/intel/jasperlake_rvp/romstage_fsp_params.c M src/mainboard/intel/jasperlake_rvp/spd/Makefile.inc A src/mainboard/intel/jasperlake_rvp/spd/jslrvp.spd.hex D src/mainboard/intel/jasperlake_rvp/spd/spd_util.c M src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/Makefile.inc A src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory.c 7 files changed, 193 insertions(+), 143 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/39195/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/39195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc92363a2148990df16c2068c7986013d015f604 Gerrit-Change-Number: 39195 Gerrit-PatchSet: 18 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/intel/jasperlake_rvp: Add memory config for Jasper Lake RVP
by Maulik V Vaghela (Code Review) 17 Mar '20

17 Mar '20

Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39195 ) Change subject: mb/intel/jasperlake_rvp: Add memory config for Jasper Lake RVP ...................................................................... Patch Set 17: (5 comments) https://review.coreboot.org/c/coreboot/+/39195/16//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39195/16//COMMIT_MSG@7 PS16, Line 7: jslrvp > nit: Jasper Lake RVP Done https://review.coreboot.org/c/coreboot/+/39195/16//COMMIT_MSG@9 PS16, Line 9: JSLRVP > nit: Jasper Lake RVP Done https://review.coreboot.org/c/coreboot/+/39195/16//COMMIT_MSG@10 PS16, Line 10: JSLRVP > nit: Jasper Lake RVP Done https://review.coreboot.org/c/coreboot/+/39195/16//COMMIT_MSG@13 PS16, Line 13: the soc > FSP Done https://review.coreboot.org/c/coreboot/+/39195/16//COMMIT_MSG@17 PS16, Line 17: jslrvp > nit: Jasper Lake RVP Done -- To view, visit https://review.coreboot.org/c/coreboot/+/39195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc92363a2148990df16c2068c7986013d015f604 Gerrit-Change-Number: 39195 Gerrit-PatchSet: 17 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Mar 2020 11:34:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2020