coreboot-gerrit March 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/common/block/cse: Add boot partition related APIs
by Furquan Shaikh (Code Review) 21 Mar '20

21 Mar '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35402 ) Change subject: soc/intel/common/block/cse: Add boot partition related APIs ...................................................................... Patch Set 71: (23 comments) I am posting comments as a whole on the patch series. Most comments are related so I have provided reference in a number of places. https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… File src/soc/intel/common/block/cse/cse_bp.c: https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 58: static struct cse_boot_partition_info cse_bp_info; There is no need to maintain a global state of this boot partition information. It can be passed in by the function that really needs it (cse_fw_sync() in follow-up CLs) and it can pass in a pointer to that to all functions needing it. https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 85: struct static This seems to be a pretty big structure. https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 105: memcpy(&cse_bp_info, &info_resp.bp_info, sizeof(cse_bp_info)); i am actually thinking we should just pass in a big enough buffer that can hold the entire hdr and boot partition info from caller. Then you don't really need to memcpy the partition info. https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 110: cse_init_bp_info This shouldn't be required. https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 169: /* Force coreboot to initialize cse_bp_info */ : if (!cse_update_boot_partition_info()) { : printk(BIOS_ERR, "Boot partition update failed\n"); : return false; : } I don't think we need to maintain global state or keep it updated. https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 181: bool This function can just return int or enum boot_partition_id. https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 183: if (!cse_init_bp_info()) : return false; This can be removed from here and other functions with the global state gone. https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 190: bool Same comments here as above. https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 239: memcpy There is no need to memcpy. This function can simply return pointer to fw_version field within boot partition info. https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 262: cse_check_rw_status See comments in follow-up CLs. I think this function needs to be slightly different. https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… File src/soc/intel/common/block/include/intelblocks/cse.h: https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 42: nit: Use tabs for consistency https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 43: nit: Use tabs for consistency https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 229: CSE Isn't this specific to custom SKU? https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 237: boot_partition_id Looking back at all the CLs, I think we shouldn't even expose these partition IDs. We can just keep this enum within custom_sku.c. And cse_fw_sync() can use explicit calls indicating ro or rw which I think is also easier to understand. cse_switch_to_ro() cse_switch_to_rw() And those can internally call cse_set_next_boot_partition(BP1/BP2). https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 247: /* BP3 contains other CSE FW modules, and not a bootable partition on it's own. */ : BP3 = 2 Why is BP3 being considered as a separate partition. As I understand it, CSME Custom SKU has two boot partitions -- BP1 (boot critical) and BP2 (boot critical + non-critical). What is the id BP3 used for? It is not really an independent partition of its own. Or is my understanding wrong? https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 253: MKHI_BUP_COMMON_GET_BOOT_PARTITION_INFO_CMD_REQ Just MKHI_BUP_COMMON_GET_BOOT_PARTITION_INFO? https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 270: : /* : * Configuration data error occurred, it needs to be : * handled with MKHI DATA_CLEAR command. : */ : BP_STATUS_DATA_FAILURE = 3, I don't see this in BWG. https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 280: MKHI_BUP_COMMON_GET_BOOT_PARTITION_INFO_CMD_REQ Just MKHI_BUP_COMMON_GET_BOOT_PARTITION_INFO? https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 287: Minimum Minimal? https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 306: it's nit: its https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 308: Inorder nit: In order https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 308: be nit: can be https://review.coreboot.org/c/coreboot/+/35402/71/src/soc/intel/common/bloc… PS71, Line 325: / I think: a) All boot partition APIs should simply be added to custom_sku.c. It is only the custom SKU that really supports these. b) In the follow-up CL I have added this comment. All the CSE firmware update support should also be added to custom_sku.c c) Based on a) and b) none of the boot partition APIs need to be added to cse.h d) Also, most of these functions should be simplified to not have to deal with BP1/BP2, etc. -- To view, visit https://review.coreboot.org/c/coreboot/+/35402 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa62409c0616d5913d21374a8a6804f82258eb4f Gerrit-Change-Number: 35402 Gerrit-PatchSet: 71 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <anpetrov(a)fb.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sat, 21 Mar 2020 06:02:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Make PCH_DEV_UART3 macro definition proper
by Subrata Banik (Code Review) 20 Mar '20

20 Mar '20

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39673 ) Change subject: soc/intel/tigerlake: Make PCH_DEV_UART3 macro definition proper ...................................................................... soc/intel/tigerlake: Make PCH_DEV_UART3 macro definition proper This patch makes PCH_DEV_UART3 macro referring to _PCH_DEV() rather calling _PCH_DEVFN(). Change-Id: I7bc060c3c5f1e0a0fed194704b4940db73f46985 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/tigerlake/include/soc/pci_devs.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/39673/1 diff --git a/src/soc/intel/tigerlake/include/soc/pci_devs.h b/src/soc/intel/tigerlake/include/soc/pci_devs.h index 8b740cf..f7ecc3f 100644 --- a/src/soc/intel/tigerlake/include/soc/pci_devs.h +++ b/src/soc/intel/tigerlake/include/soc/pci_devs.h @@ -67,7 +67,7 @@ #define PCH_DEV_SLOT_SIO1 0x11 #define PCH_DEVFN_UART3 _PCH_DEVFN(SIO1, 0) -#define PCH_DEV_UART3 _PCH_DEVFN(SIO1, 0) +#define PCH_DEV_UART3 _PCH_DEV(SIO1, 0) #define PCH_DEV_SLOT_ISH 0x12 #define PCH_DEVFN_ISH _PCH_DEVFN(ISH, 0) -- To view, visit https://review.coreboot.org/c/coreboot/+/39673 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7bc060c3c5f1e0a0fed194704b4940db73f46985 Gerrit-Change-Number: 39673 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: cpu/x86: Fix typo
by Subrata Banik (Code Review) 20 Mar '20

20 Mar '20

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39671 ) Change subject: cpu/x86: Fix typo ...................................................................... cpu/x86: Fix typo CIRTICAL -> CRITICAL Change-Id: Ie2c1427b197dbfebdc7f0c6ffd85f768845ff1bd Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/cpu/x86/mp_init.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/39671/1 diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 6082df9..7047855 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -927,7 +927,7 @@ return 0; } while (expire_us <= 0 || !stopwatch_expired(&sw)); - printk(BIOS_CRIT, "CIRTICAL ERROR: AP call expired. %d/%d CPUs accepted.\n", + printk(BIOS_CRIT, "CRITICAL ERROR: AP call expired. %d/%d CPUs accepted.\n", cpus_accepted, global_num_aps); return -1; } -- To view, visit https://review.coreboot.org/c/coreboot/+/39671 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie2c1427b197dbfebdc7f0c6ffd85f768845ff1bd Gerrit-Change-Number: 39671 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/deltaur: add deltaur mainboard initial support
by Tim Wawrzynczak (Code Review) 20 Mar '20

20 Mar '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39502 ) Change subject: mb/google/deltaur: add deltaur mainboard initial support ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/39502 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib98f328df22f39e7d9d625a3292954881ee15b15 Gerrit-Change-Number: 39502 Gerrit-PatchSet: 8 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kevin Chowski <chowski(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Selma Bensaid <selma.bensaid(a)intel.corp-partner.google.com> Gerrit-CC: Varun Joshi <varun.joshi(a)intel.com> Gerrit-Comment-Date: Sat, 21 Mar 2020 02:12:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/deltaur: add deltaur mainboard initial support
by Tim Wawrzynczak (Code Review) 20 Mar '20

20 Mar '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39502 ) Change subject: mb/google/deltaur: add deltaur mainboard initial support ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… File src/mainboard/google/deltaur/variants/deltaur/include/variant/gpio.h: https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 22: GPP_E2 > For Deltaur is H1_FLASH_WP is GPP_E2 isn't it. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/39502 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib98f328df22f39e7d9d625a3292954881ee15b15 Gerrit-Change-Number: 39502 Gerrit-PatchSet: 8 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kevin Chowski <chowski(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Selma Bensaid <selma.bensaid(a)intel.corp-partner.google.com> Gerrit-CC: Varun Joshi <varun.joshi(a)intel.com> Gerrit-Comment-Date: Sat, 21 Mar 2020 02:11:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bora Guvendik <bora.guvendik(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/deltaur: add deltaur mainboard initial support
by Tim Wawrzynczak (Code Review) 20 Mar '20

20 Mar '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39502 ) Change subject: mb/google/deltaur: add deltaur mainboard initial support ...................................................................... Patch Set 8: (2 comments) https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… File src/mainboard/google/deltaur/dsdt.asl: https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 29: > do you want to push this separately later? I didn't see it for tigerlake Oh, you're right... https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 49: > do you have some concern? I think taking out this file means, we will need to remove some Kconfig fl […] I just mean the dptf.asl... I guess that isn't ready for tgl yet. -- To view, visit https://review.coreboot.org/c/coreboot/+/39502 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib98f328df22f39e7d9d625a3292954881ee15b15 Gerrit-Change-Number: 39502 Gerrit-PatchSet: 8 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kevin Chowski <chowski(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Selma Bensaid <selma.bensaid(a)intel.corp-partner.google.com> Gerrit-CC: Varun Joshi <varun.joshi(a)intel.com> Gerrit-Comment-Date: Sat, 21 Mar 2020 02:11:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bora Guvendik <bora.guvendik(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/deltaur: add deltaur mainboard initial support
by Bora Guvendik (Code Review) 20 Mar '20

20 Mar '20

Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39502 ) Change subject: mb/google/deltaur: add deltaur mainboard initial support ...................................................................... Patch Set 8: (11 comments) https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… File src/mainboard/google/deltaur/dsdt.asl: https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 29: > /* Low power idle table */ […] do you want to push this separately later? I didn't see it for tigerlake https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 40: > #include <vendorcode/google/chromeos/acpi/vpd. […] Done https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 49: > Should we hold off on DPTF for now? do you have some concern? I think taking out this file means, we will need to remove some Kconfig flags such as EC_GOOGLE_WILCO https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… File src/mainboard/google/deltaur/variants/deltan/Makefile.inc: https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 1: ## > SPDX format please Done https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… File src/mainboard/google/deltaur/variants/deltan/gpio.c: https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 1: /* > /* […] Done https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… File src/mainboard/google/deltaur/variants/deltan/include/variant/ec.h: https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 1: /* > /* […] Done https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… File src/mainboard/google/deltaur/variants/deltan/include/variant/gpio.h: https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 1: /* > /* […] Done https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… File src/mainboard/google/deltaur/variants/deltaur/Makefile.inc: https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 1: ## > SPDX Done https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… File src/mainboard/google/deltaur/variants/deltaur/gpio.c: https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 1: /* > /* […] Done https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… File src/mainboard/google/deltaur/variants/deltaur/include/variant/ec.h: https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 1: /* > /* […] Done https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… File src/mainboard/google/deltaur/variants/deltaur/include/variant/gpio.h: https://review.coreboot.org/c/coreboot/+/39502/7/src/mainboard/google/delta… PS7, Line 1: /* > /* […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/39502 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib98f328df22f39e7d9d625a3292954881ee15b15 Gerrit-Change-Number: 39502 Gerrit-PatchSet: 8 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kevin Chowski <chowski(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Selma Bensaid <selma.bensaid(a)intel.corp-partner.google.com> Gerrit-CC: Varun Joshi <varun.joshi(a)intel.com> Gerrit-Comment-Date: Sat, 21 Mar 2020 00:36:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/deltaur: add deltaur mainboard initial support
by Bora Guvendik (Code Review) 20 Mar '20

20 Mar '20

Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Selma Bensaid, Tim Wawrzynczak, Duncan Laurie, Subrata Banik, Kevin Chowski, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39502 to look at the new patch set (#8). Change subject: mb/google/deltaur: add deltaur mainboard initial support ...................................................................... mb/google/deltaur: add deltaur mainboard initial support Created a new Google baseboard named deltaur, taking volteer as a starting point. BUG=b:151102807 TEST=make build successful Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> Change-Id: Ib98f328df22f39e7d9d625a3292954881ee15b15 --- A src/mainboard/google/deltaur/Kconfig A src/mainboard/google/deltaur/Kconfig.name A src/mainboard/google/deltaur/Makefile.inc A src/mainboard/google/deltaur/board_info.txt A src/mainboard/google/deltaur/bootblock.c A src/mainboard/google/deltaur/chromeos.c A src/mainboard/google/deltaur/chromeos.fmd A src/mainboard/google/deltaur/dsdt.asl A src/mainboard/google/deltaur/ec.c A src/mainboard/google/deltaur/mainboard.c A src/mainboard/google/deltaur/smihandler.c A src/mainboard/google/deltaur/variants/baseboard/Makefile.inc A src/mainboard/google/deltaur/variants/baseboard/devicetree.cb A src/mainboard/google/deltaur/variants/baseboard/gpio.c A src/mainboard/google/deltaur/variants/baseboard/include/baseboard/ec.h A src/mainboard/google/deltaur/variants/baseboard/include/baseboard/gpio.h A src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/deltaur/variants/deltan/Makefile.inc A src/mainboard/google/deltaur/variants/deltan/gpio.c A src/mainboard/google/deltaur/variants/deltan/include/variant/ec.h A src/mainboard/google/deltaur/variants/deltan/include/variant/gpio.h A src/mainboard/google/deltaur/variants/deltan/overridetree.cb A src/mainboard/google/deltaur/variants/deltaur/Makefile.inc A src/mainboard/google/deltaur/variants/deltaur/gpio.c A src/mainboard/google/deltaur/variants/deltaur/include/variant/ec.h A src/mainboard/google/deltaur/variants/deltaur/include/variant/gpio.h A src/mainboard/google/deltaur/variants/deltaur/overridetree.cb 27 files changed, 778 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/39502/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/39502 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib98f328df22f39e7d9d625a3292954881ee15b15 Gerrit-Change-Number: 39502 Gerrit-PatchSet: 8 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kevin Chowski <chowski(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Selma Bensaid <selma.bensaid(a)intel.corp-partner.google.com> Gerrit-CC: Varun Joshi <varun.joshi(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/tglrvp: Update Audio AIC settings for Tiger Lake
by Wonkyu Kim (Code Review) 20 Mar '20

20 Mar '20

Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39466 ) Change subject: mb/tglrvp: Update Audio AIC settings for Tiger Lake ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/39466 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45935b79f6fa4ad66238eead9258a4f15feec508 Gerrit-Change-Number: 39466 Gerrit-PatchSet: 7 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 21 Mar 2020 00:11:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/tglrvp: Update Audio AIC settings for Tiger Lake
by Srinidhi N Kaushik (Code Review) 20 Mar '20

20 Mar '20

Srinidhi N Kaushik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39466 ) Change subject: mb/tglrvp: Update Audio AIC settings for Tiger Lake ...................................................................... Patch Set 7: Code-Review+1 (2 comments) https://review.coreboot.org/c/coreboot/+/39466/6/src/mainboard/intel/tglrvp… File src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c: https://review.coreboot.org/c/coreboot/+/39466/6/src/mainboard/intel/tglrvp… PS6, Line 87: PAD_CFG_NF(GPP_S2, NONE, DEEP, NF2), /* DMIC0_CLK_B */ : PAD_CFG_NF(GPP_S3, NONE, DEEP, NF2), /* DMIC1_CLK_B */ : : PAD_CFG_NF(GPP_S4, NONE, DEEP, NF2), /* DMIC1_CLK */ : PAD_CFG_NF(GPP_S5, NONE, DEEP, NF2), /* DMIC1_DATA */ : PAD_CFG_NF(GPP_S6, NONE, DEEP, NF2), /* DMIC0_CLK */ : PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2), /* DMIC0_DATA * > Can you group DMIC0 and DMIC1 like below? […] Done https://review.coreboot.org/c/coreboot/+/39466/6/src/mainboard/intel/tglrvp… File src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c: https://review.coreboot.org/c/coreboot/+/39466/6/src/mainboard/intel/tglrvp… PS6, Line 84: PAD_CFG_NF(GPP_S2, NONE, DEEP, NF2), /* DMIC0_CLK_B */ : PAD_CFG_NF(GPP_S3, NONE, DEEP, NF2), /* DMIC1_CLK_B */ : : PAD_CFG_NF(GPP_S4, NONE, DEEP, NF2), /* DMIC1_CLK */ : PAD_CFG_NF(GPP_S5, NONE, DEEP, NF2), /* DMIC1_DATA */ : PAD_CFG_NF(GPP_S6, NONE, DEEP, NF2), /* DMIC0_CLK */ : PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2), /* DMIC0_DATA * > Can you group DMIC0 an DMIC1 like below? […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/39466 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45935b79f6fa4ad66238eead9258a4f15feec508 Gerrit-Change-Number: 39466 Gerrit-PatchSet: 7 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 20 Mar 2020 23:22:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-MessageType: comment

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coreboot-gerrit March 2020