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Change in libgfxinit[master]: gma bxt panel: Allow to use secondary panel control logic
by Nico Huber (Code Review) 05 Mar '20

05 Mar '20

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/libgfxinit/+/38276 ) Change subject: gma bxt panel: Allow to use secondary panel control logic ...................................................................... gma bxt panel: Allow to use secondary panel control logic Broxton has control logic for two panels. Reflect that. Change-Id: Ie84d21a07a0f064f993a54b277e051b8d1ca541c Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M common/Makefile.inc M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-panel.adb M common/hw-gfx-gma.ads M configs/broxton 5 files changed, 113 insertions(+), 64 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/76/38276/1 diff --git a/common/Makefile.inc b/common/Makefile.inc index 9378f41..af6dc11 100644 --- a/common/Makefile.inc +++ b/common/Makefile.inc @@ -47,10 +47,13 @@ gfxinit-y += hw-gfx-framebuffer_filler.adb gfxinit-y += hw-gfx-framebuffer_filler.ads +CONFIG_GFX_GMA_PANEL_2_PORT ?= Disabled + CONFIG_GFX_GMA_GENERATION := $(call strip_quotes,$(CONFIG_GFX_GMA_GENERATION)) CONFIG_GFX_GMA_CPU := $(call strip_quotes,$(CONFIG_GFX_GMA_CPU)) CONFIG_GFX_GMA_CPU_VARIANT := $(call strip_quotes,$(CONFIG_GFX_GMA_CPU_VARIANT)) CONFIG_GFX_GMA_PANEL_1_PORT := $(call strip_quotes,$(CONFIG_GFX_GMA_PANEL_1_PORT)) +CONFIG_GFX_GMA_PANEL_2_PORT := $(call strip_quotes,$(CONFIG_GFX_GMA_PANEL_2_PORT)) CONFIG_GFX_GMA_ANALOG_I2C_PORT := $(call strip_quotes,$(CONFIG_GFX_GMA_ANALOG_I2C_PORT)) _GEN_NONCONST := $(strip \ @@ -73,6 +76,7 @@ printf " GENERATE $(patsubst /%,%,$(subst $(obj)/,,$@))\n" sed -e's/<<GEN>>/$(CONFIG_GFX_GMA_GENERATION)/' \ -e's/<<PANEL_1_PORT>>/$(CONFIG_GFX_GMA_PANEL_1_PORT)/' \ + -e's/<<PANEL_2_PORT>>/$(CONFIG_GFX_GMA_PANEL_2_PORT)/' \ -e's/<<ANALOG_I2C_PORT>>/$(CONFIG_GFX_GMA_ANALOG_I2C_PORT)/' \ -e's/<<DEFAULT_MMIO_BASE>>/$(CONFIG_GFX_GMA_DEFAULT_MMIO)/' \ -e'/constant Gen_CPU$_Var$\?/d' \ @@ -91,6 +95,7 @@ -e's/<<CPU>>/$(CONFIG_GFX_GMA_CPU)/' \ -e's/<<CPU_VARIANT>>/$(CONFIG_GFX_GMA_CPU_VARIANT)/' \ -e's/<<PANEL_1_PORT>>/$(CONFIG_GFX_GMA_PANEL_1_PORT)/' \ + -e's/<<PANEL_2_PORT>>/$(CONFIG_GFX_GMA_PANEL_2_PORT)/' \ -e's/<<ANALOG_I2C_PORT>>/$(CONFIG_GFX_GMA_ANALOG_I2C_PORT)/' \ -e's/<<DEFAULT_MMIO_BASE>>/$(CONFIG_GFX_GMA_DEFAULT_MMIO)/' \ -e":s$$(printf '\n ')/,$$/{N;s/,\n.*Dyn_CPU$_Var$\?[^,)]*//;ts$$(printf '\n ')P;D;}" \ diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index 39fa825..8cd3cff 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -44,7 +44,8 @@ CPU_Var : constant Gen_CPU_Variant := <<CPU_VARIANT>>; Panel_Ports : constant array (Valid_Panels) of Port_Type := - (Panel_1 => <<PANEL_1_PORT>>); + (Panel_1 => <<PANEL_1_PORT>>, + Panel_2 => <<PANEL_2_PORT>>); Analog_I2C_Port : constant PCH_Port := <<ANALOG_I2C_PORT>>; diff --git a/common/hw-gfx-gma-panel.adb b/common/hw-gfx-gma-panel.adb index 36faf31..ad4d45b 100644 --- a/common/hw-gfx-gma-panel.adb +++ b/common/hw-gfx-gma-panel.adb @@ -38,7 +38,7 @@ BL_Off_To_Power_Down => 50_000, Power_Cycle_Delay => 510_000); - Delays_US : Panel_Power_Delays; + Delays_US : array (Valid_Panels) of Panel_Power_Delays; ---------------------------------------------------------------------------- @@ -53,8 +53,9 @@ -- and the hardware power sequencer. The latter option would be less error -- prone, as the hardware might just don't work as expected. - Power_Cycle_Timer : Time.T; - Power_Up_Timer : Time.T; + type Panel_Times is array (Valid_Panels) of Time.T; + Power_Cycle_Timer : Panel_Times; + Power_Up_Timer : Panel_Times; ---------------------------------------------------------------------------- @@ -99,18 +100,28 @@ DIVISOR : Registers.Registers_Index; end record; - Panel_PP_Regs : constant PP_Regs := (if Config.Has_PCH_Panel_Power then - (STATUS => Registers.PCH_PP_STATUS, - CONTROL => Registers.PCH_PP_CONTROL, - ON_DELAYS => Registers.PCH_PP_ON_DELAYS, - OFF_DELAYS => Registers.PCH_PP_OFF_DELAYS, - DIVISOR => Registers.PCH_PP_DIVISOR) - else - (STATUS => Registers.GMCH_PP_STATUS, - CONTROL => Registers.GMCH_PP_CONTROL, - ON_DELAYS => Registers.GMCH_PP_ON_DELAYS, - OFF_DELAYS => Registers.GMCH_PP_OFF_DELAYS, - DIVISOR => Registers.GMCH_PP_DIVISOR)); + PP : constant array (Valid_Panels) of PP_Regs := + (if Config.Has_PCH_Panel_Power then + (Panel_1 => + (STATUS => Registers.PCH_PP_STATUS, + CONTROL => Registers.PCH_PP_CONTROL, + ON_DELAYS => Registers.PCH_PP_ON_DELAYS, + OFF_DELAYS => Registers.PCH_PP_OFF_DELAYS, + DIVISOR => Registers.PCH_PP_DIVISOR), + Panel_2 => + (STATUS => Registers.BXT_PP_STATUS_2, + CONTROL => Registers.BXT_PP_CONTROL_2, + ON_DELAYS => Registers.BXT_PP_ON_DELAYS_2, + OFF_DELAYS => Registers.BXT_PP_OFF_DELAYS_2, + DIVISOR => Registers.PCH_PP_DIVISOR)) -- won't be used + + else + (Panel_1 .. Panel_2 => + (STATUS => Registers.GMCH_PP_STATUS, + CONTROL => Registers.GMCH_PP_CONTROL, + ON_DELAYS => Registers.GMCH_PP_ON_DELAYS, + OFF_DELAYS => Registers.GMCH_PP_OFF_DELAYS, + DIVISOR => Registers.GMCH_PP_DIVISOR))); function PCH_PP_ON_DELAYS_PWR_UP (US : Natural) return Word32 is begin @@ -162,6 +173,22 @@ BXT_BLC_PWM_CTL_ENABLE : constant := 16#00_0001# * 2 ** 31; + type BLC_Regs is record + CTL : Registers.Registers_Index; + FREQ : Registers.Registers_Index; + DUTY : Registers.Registers_Index; + end record; + + BLC : constant array (Valid_Panels) of BLC_Regs := + (Panel_1 => + (CTL => Registers.BXT_BLC_PWM_CTL_1, + FREQ => Registers.BXT_BLC_PWM_FREQ_1, + DUTY => Registers.BXT_BLC_PWM_DUTY_1), + Panel_2 => + (CTL => Registers.BXT_BLC_PWM_CTL_2, + FREQ => Registers.BXT_BLC_PWM_FREQ_2, + DUTY => Registers.BXT_BLC_PWM_DUTY_2)); + ---------------------------------------------------------------------------- procedure Static_Init @@ -171,10 +198,10 @@ Input => (Time.State)) is begin - Power_Cycle_Timer := Time.Now; + Power_Cycle_Timer := (others => Time.Now); Power_Up_Timer := Power_Cycle_Timer; - Delays_US := Default_EDP_Delays_US; + Delays_US := (others => Default_EDP_Delays_US); end Static_Init; ---------------------------------------------------------------------------- @@ -191,7 +218,7 @@ end loop; end Check_PP_Delays; - procedure Setup_PP_Sequencer (Default_Delays : Boolean := False) + procedure Setup_PP_Sequencer (Panel : Valid_Panels; Default_Delays : Boolean) is Power_Delay, Port_Select : Word32; @@ -199,35 +226,34 @@ begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Static_Init; - if Default_Delays then Override_Delays := True; else - Registers.Read (Panel_PP_Regs.ON_DELAYS, Power_Delay); - Delays_US (Power_Up_Delay) := 100 * Natural + Registers.Read (PP (Panel).ON_DELAYS, Power_Delay); + Delays_US (Panel) (Power_Up_Delay) := 100 * Natural (Shift_Right (Power_Delay and PCH_PP_ON_DELAYS_PWR_UP_MASK, 16)); - Delays_US (Power_Up_To_BL_On) := 100 * Natural + Delays_US (Panel) (Power_Up_To_BL_On) := 100 * Natural (Power_Delay and PCH_PP_ON_DELAYS_PWR_UP_BL_ON_MASK); - Registers.Read (Panel_PP_Regs.OFF_DELAYS, Power_Delay); - Delays_US (Power_Down_Delay) := 100 * Natural + Registers.Read (PP (Panel).OFF_DELAYS, Power_Delay); + Delays_US (Panel) (Power_Down_Delay) := 100 * Natural (Shift_Right (Power_Delay and PCH_PP_OFF_DELAYS_PWR_DOWN_MASK, 16)); - Delays_US (BL_Off_To_Power_Down) := 100 * Natural + Delays_US (Panel) (BL_Off_To_Power_Down) := 100 * Natural (Power_Delay and PCH_PP_OFF_DELAYS_BL_OFF_PWR_DOWN_MASK); if Config.Has_PP_Divisor_Reg then - Registers.Read (Panel_PP_Regs.DIVISOR, Power_Delay); + Registers.Read (PP (Panel).DIVISOR, Power_Delay); else - Registers.Read (Panel_PP_Regs.CONTROL, Power_Delay); - Power_Delay := Shift_Right (Power_Delay, BXT_PP_CONTROL_PWR_CYC_DELAY_SHIFT); + Registers.Read (PP (Panel).CONTROL, Power_Delay); + Power_Delay := Shift_Right + (Power_Delay, BXT_PP_CONTROL_PWR_CYC_DELAY_SHIFT); end if; if (Power_Delay and PCH_PP_DIVISOR_PWR_CYC_DELAY_MASK) > 1 then - Delays_US (Power_Cycle_Delay) := 100_000 * (Natural + Delays_US (Panel) (Power_Cycle_Delay) := 100_000 * (Natural (Power_Delay and PCH_PP_DIVISOR_PWR_CYC_DELAY_MASK) - 1); end if; - Check_PP_Delays (Delays_US, Override_Delays); + Check_PP_Delays (Delays_US (Panel), Override_Delays); end if; if Override_Delays then @@ -245,51 +271,65 @@ -- Force power-up to backlight-on delay to 100us as recommended by PRM. Registers.Unset_And_Set_Mask - (Register => Panel_PP_Regs.ON_DELAYS, + (Register => PP (Panel).ON_DELAYS, Mask_Unset => PCH_PP_ON_DELAYS_PORT_SELECT_MASK or PCH_PP_ON_DELAYS_PWR_UP_MASK or PCH_PP_ON_DELAYS_PWR_UP_BL_ON_MASK, Mask_Set => Port_Select or - PCH_PP_ON_DELAYS_PWR_UP (Delays_US (Power_Up_Delay)) + PCH_PP_ON_DELAYS_PWR_UP + (Delays_US (Panel) (Power_Up_Delay)) or PCH_PP_ON_DELAYS_PWR_UP_BL_ON (100)); Registers.Unset_And_Set_Mask - (Register => Panel_PP_Regs.OFF_DELAYS, + (Register => PP (Panel).OFF_DELAYS, Mask_Unset => PCH_PP_OFF_DELAYS_PWR_DOWN_MASK or PCH_PP_OFF_DELAYS_BL_OFF_PWR_DOWN_MASK, Mask_Set => PCH_PP_OFF_DELAYS_PWR_DOWN - (Delays_US (Power_Down_Delay)) or + (Delays_US (Panel) (Power_Down_Delay)) or PCH_PP_OFF_DELAYS_BL_OFF_PWR_DOWN - (Delays_US (BL_Off_To_Power_Down))); + (Delays_US (Panel) (BL_Off_To_Power_Down))); if Config.Has_PP_Divisor_Reg then Registers.Unset_And_Set_Mask - (Register => Panel_PP_Regs.DIVISOR, + (Register => PP (Panel).DIVISOR, Mask_Unset => PCH_PP_DIVISOR_PWR_CYC_DELAY_MASK, Mask_Set => PCH_PP_DIVISOR_PWR_CYC_DELAY - (Delays_US (Power_Cycle_Delay))); + (Delays_US (Panel) (Power_Cycle_Delay))); else Registers.Unset_And_Set_Mask - (Register => Panel_PP_Regs.CONTROL, + (Register => PP (Panel).CONTROL, Mask_Unset => BXT_PP_CONTROL_PWR_CYC_DELAY_MASK, Mask_Set => BXT_PP_CONTROL_PWR_CYC_DELAY - (Delays_US (Power_Cycle_Delay))); + (Delays_US (Panel) (Power_Cycle_Delay))); end if; end if; if Config.Has_PP_Write_Protection then Registers.Unset_And_Set_Mask - (Register => Panel_PP_Regs.CONTROL, + (Register => PP (Panel).CONTROL, Mask_Unset => PCH_PP_CONTROL_WRITE_PROTECT_MASK, Mask_Set => PCH_PP_CONTROL_WRITE_PROTECT_KEY or PCH_PP_CONTROL_POWER_DOWN_ON_RESET); else Registers.Set_Mask - (Register => Panel_PP_Regs.CONTROL, + (Register => PP (Panel).CONTROL, Mask => PCH_PP_CONTROL_POWER_DOWN_ON_RESET); end if; end Setup_PP_Sequencer; + procedure Setup_PP_Sequencer (Default_Delays : Boolean := False) is + begin + pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); + + Static_Init; + + for Panel in Valid_Panels loop + if Config.Panel_Ports (Panel) /= Disabled then + Setup_PP_Sequencer (Panel, Default_Delays); + end if; + end loop; + end Setup_PP_Sequencer; + ---------------------------------------------------------------------------- procedure VDD_Override (Panel : Panel_Control) is @@ -317,14 +357,15 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Registers.Is_Set_Mask (Panel_PP_Regs.CONTROL, PCH_PP_CONTROL_TARGET_ON, Was_On); + Registers.Is_Set_Mask (PP (Panel).CONTROL, PCH_PP_CONTROL_TARGET_ON, Was_On); if not Was_On then - Time.Delay_Until (Power_Cycle_Timer); + Time.Delay_Until (Power_Cycle_Timer (Panel)); end if; - Registers.Set_Mask (Panel_PP_Regs.CONTROL, PCH_PP_CONTROL_TARGET_ON); + Registers.Set_Mask (PP (Panel).CONTROL, PCH_PP_CONTROL_TARGET_ON); if not Was_On then - Power_Up_Timer := Time.US_From_Now (Delays_US (Power_Up_Delay)); + Power_Up_Timer (Panel) := + Time.US_From_Now (Delays_US (Panel) (Power_Up_Delay)); end if; if Wait then Wait_On (Panel); @@ -339,13 +380,13 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Time.Delay_Until (Power_Up_Timer); + Time.Delay_Until (Power_Up_Timer (Panel)); Registers.Wait_Unset_Mask - (Register => Panel_PP_Regs.STATUS, + (Register => PP (Panel).STATUS, Mask => PCH_PP_STATUS_PWR_SEQ_PROGRESS_MASK, TOut_MS => 300); - Registers.Unset_Mask (Panel_PP_Regs.CONTROL, PCH_PP_CONTROL_VDD_OVERRIDE); + Registers.Unset_Mask (PP (Panel).CONTROL, PCH_PP_CONTROL_VDD_OVERRIDE); end Wait_On; procedure Off (Panel : Panel_Control) @@ -358,20 +399,21 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Registers.Is_Set_Mask (Panel_PP_Regs.CONTROL, PCH_PP_CONTROL_TARGET_ON, Was_On); + Registers.Is_Set_Mask (PP (Panel).CONTROL, PCH_PP_CONTROL_TARGET_ON, Was_On); Registers.Unset_Mask - (Register => Panel_PP_Regs.CONTROL, + (Register => PP (Panel).CONTROL, Mask => PCH_PP_CONTROL_TARGET_ON or PCH_PP_CONTROL_VDD_OVERRIDE); if Was_On then - Time.U_Delay (Delays_US (Power_Down_Delay)); + Time.U_Delay (Delays_US (Panel) (Power_Down_Delay)); end if; Registers.Wait_Unset_Mask - (Register => Panel_PP_Regs.STATUS, + (Register => PP (Panel).STATUS, Mask => PCH_PP_STATUS_PWR_SEQ_PROGRESS_MASK, TOut_MS => 600); if Was_On then - Power_Cycle_Timer := Time.US_From_Now (Delays_US (Power_Cycle_Delay)); + Power_Cycle_Timer (Panel) := + Time.US_From_Now (Delays_US (Panel) (Power_Cycle_Delay)); end if; end Off; @@ -387,11 +429,11 @@ if Config.Has_New_Backlight_Control then Registers.Set_Mask - (Register => Registers.BXT_BLC_PWM_CTL_1, + (Register => BLC (Panel).CTL, Mask => BXT_BLC_PWM_CTL_ENABLE); else Registers.Set_Mask - (Register => Panel_PP_Regs.CONTROL, + (Register => PP (Panel).CONTROL, Mask => PCH_PP_CONTROL_BACKLIGHT_ENABLE); end if; end Backlight_On; @@ -406,11 +448,11 @@ if Config.Has_New_Backlight_Control then Registers.Unset_Mask - (Register => Registers.BXT_BLC_PWM_CTL_1, + (Register => BLC (Panel).CTL, Mask => BXT_BLC_PWM_CTL_ENABLE); else Registers.Unset_Mask - (Register => Panel_PP_Regs.CONTROL, + (Register => PP (Panel).CONTROL, Mask => PCH_PP_CONTROL_BACKLIGHT_ENABLE); end if; end Backlight_Off; @@ -424,7 +466,7 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); if Config.Has_New_Backlight_Control then - Registers.Write (Registers.BXT_BLC_PWM_DUTY_1, Level); + Registers.Write (BLC (Panel).DUTY, Level); else Registers.Unset_And_Set_Mask (Register => Registers.BLC_PWM_CPU_CTL, @@ -443,7 +485,7 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); if Config.Has_New_Backlight_Control then - Registers.Read (Registers.BXT_BLC_PWM_FREQ_1, Level); + Registers.Read (BLC (Panel).FREQ, Level); else Registers.Read (Registers.BLC_PWM_PCH_CTL2, Level); Level := Shift_Right (Level, PCH_BLC_PWM_CTL2_BL_MOD_FREQ_SHIFT); diff --git a/common/hw-gfx-gma.ads b/common/hw-gfx-gma.ads index 0c44434..1215fc5 100644 --- a/common/hw-gfx-gma.ads +++ b/common/hw-gfx-gma.ads @@ -253,8 +253,8 @@ subtype PCH_HDMI_Port is PCH_Port range PCH_HDMI_B .. PCH_HDMI_D; subtype PCH_DP_Port is PCH_Port range PCH_DP_B .. PCH_DP_D; - type Panel_Control is (No_Panel, Panel_1); - subtype Valid_Panels is Panel_Control range Panel_1 .. Panel_1; + type Panel_Control is (No_Panel, Panel_1, Panel_2); + subtype Valid_Panels is Panel_Control range Panel_1 .. Panel_2; type Port_Config is record diff --git a/configs/broxton b/configs/broxton index 35a6f6c..5d3b859 100644 --- a/configs/broxton +++ b/configs/broxton @@ -2,6 +2,7 @@ CONFIG_GFX_GMA_GENERATION = Broxton CONFIG_GFX_GMA_CPU = Broxton CONFIG_GFX_GMA_CPU_VARIANT = Normal # N/A -CONFIG_GFX_GMA_PANEL_1_PORT = eDP +CONFIG_GFX_GMA_PANEL_1_PORT = Disabled +CONFIG_GFX_GMA_PANEL_2_PORT = eDP CONFIG_GFX_GMA_ANALOG_I2C_PORT = PCH_DAC # N/A CONFIG_GFX_GMA_DEFAULT_MMIO = 16\#e000_0000\# -- To view, visit https://review.coreboot.org/c/libgfxinit/+/38276 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Ie84d21a07a0f064f993a54b277e051b8d1ca541c Gerrit-Change-Number: 38276 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

2 9

Change in libgfxinit[master]: gma bxt panel: Correct panel backlight handling
by Nico Huber (Code Review) 05 Mar '20

05 Mar '20

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/libgfxinit/+/38265 ) Change subject: gma bxt panel: Correct panel backlight handling ...................................................................... gma bxt panel: Correct panel backlight handling Change-Id: Icfad261fb4d5ff478974948c0148880c5b8cb40c Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-panel.adb M common/hw-gfx-gma-panel.ads 3 files changed, 40 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/65/38265/1 diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index 01a67c1..39fa825 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -182,6 +182,7 @@ Use_PP_VDD_Override : <genbool> := Up_To_Ironlake; Has_PCH_Panel_Power : <genbool> := Ironlake_On; Has_PP_Divisor_Reg : <genbool> := not Gen_Broxton; + Has_New_Backlight_Control : <genbool> := Gen_Broxton; ----------- PCH/FDI: --------- Has_PCH : <genbool> := not Gen_Broxton and not Gen_G45; diff --git a/common/hw-gfx-gma-panel.adb b/common/hw-gfx-gma-panel.adb index c53fd3f..36faf31 100644 --- a/common/hw-gfx-gma-panel.adb +++ b/common/hw-gfx-gma-panel.adb @@ -157,8 +157,11 @@ PCH_BLC_PWM_CTL1_PHASE_IN_INCREMENT : constant := 16#00_00ff# * 2 ** 0; PCH_BLC_PWM_CTL2_BL_MOD_FREQ_MASK : constant := 16#00_ffff# * 2 ** 16; + PCH_BLC_PWM_CTL2_BL_MOD_FREQ_SHIFT : constant := 16; PCH_BLC_PWM_CTL2_BL_DUTY_CYC_MASK : constant := 16#00_ffff# * 2 ** 0; + BXT_BLC_PWM_CTL_ENABLE : constant := 16#00_0001# * 2 ** 31; + ---------------------------------------------------------------------------- procedure Static_Init @@ -382,9 +385,15 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Registers.Set_Mask - (Register => Panel_PP_Regs.CONTROL, - Mask => PCH_PP_CONTROL_BACKLIGHT_ENABLE); + if Config.Has_New_Backlight_Control then + Registers.Set_Mask + (Register => Registers.BXT_BLC_PWM_CTL_1, + Mask => BXT_BLC_PWM_CTL_ENABLE); + else + Registers.Set_Mask + (Register => Panel_PP_Regs.CONTROL, + Mask => PCH_PP_CONTROL_BACKLIGHT_ENABLE); + end if; end Backlight_On; procedure Backlight_Off (Panel : Panel_Control) is @@ -395,12 +404,18 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Registers.Unset_Mask - (Register => Panel_PP_Regs.CONTROL, - Mask => PCH_PP_CONTROL_BACKLIGHT_ENABLE); + if Config.Has_New_Backlight_Control then + Registers.Unset_Mask + (Register => Registers.BXT_BLC_PWM_CTL_1, + Mask => BXT_BLC_PWM_CTL_ENABLE); + else + Registers.Unset_Mask + (Register => Panel_PP_Regs.CONTROL, + Mask => PCH_PP_CONTROL_BACKLIGHT_ENABLE); + end if; end Backlight_Off; - procedure Set_Backlight (Panel : Panel_Control; Level : Word16) is + procedure Set_Backlight (Panel : Panel_Control; Level : Word32) is begin if Panel not in Valid_Panels then return; @@ -408,15 +423,17 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Registers.Unset_And_Set_Mask - (Register => Registers.BLC_PWM_CPU_CTL, - Mask_Unset => CPU_BLC_PWM_DATA_BL_DUTY_CYC_MASK, - Mask_Set => Word32 (Level)); + if Config.Has_New_Backlight_Control then + Registers.Write (Registers.BXT_BLC_PWM_DUTY_1, Level); + else + Registers.Unset_And_Set_Mask + (Register => Registers.BLC_PWM_CPU_CTL, + Mask_Unset => CPU_BLC_PWM_DATA_BL_DUTY_CYC_MASK, + Mask_Set => Level); + end if; end Set_Backlight; - procedure Get_Max_Backlight (Panel : Panel_Control; Level : out Word16) - is - Reg : Word32; + procedure Get_Max_Backlight (Panel : Panel_Control; Level : out Word32) is begin if Panel not in Valid_Panels then Level := 0; @@ -425,9 +442,12 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Registers.Read (Registers.BLC_PWM_PCH_CTL2, Reg); - Level := Word16 - (Shift_Right (Reg and PCH_BLC_PWM_CTL2_BL_MOD_FREQ_MASK, 16)); + if Config.Has_New_Backlight_Control then + Registers.Read (Registers.BXT_BLC_PWM_FREQ_1, Level); + else + Registers.Read (Registers.BLC_PWM_PCH_CTL2, Level); + Level := Shift_Right (Level, PCH_BLC_PWM_CTL2_BL_MOD_FREQ_SHIFT); + end if; end Get_Max_Backlight; end HW.GFX.GMA.Panel; diff --git a/common/hw-gfx-gma-panel.ads b/common/hw-gfx-gma-panel.ads index baf47f7..2a97f0e 100644 --- a/common/hw-gfx-gma-panel.ads +++ b/common/hw-gfx-gma-panel.ads @@ -54,8 +54,8 @@ procedure Backlight_Off (Panel : Panel_Control); - procedure Set_Backlight (Panel : Panel_Control; Level : Word16); + procedure Set_Backlight (Panel : Panel_Control; Level : Word32); - procedure Get_Max_Backlight (Panel : Panel_Control; Level : out Word16); + procedure Get_Max_Backlight (Panel : Panel_Control; Level : out Word32); end HW.GFX.GMA.Panel; -- To view, visit https://review.coreboot.org/c/libgfxinit/+/38265 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Icfad261fb4d5ff478974948c0148880c5b8cb40c Gerrit-Change-Number: 38265 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

2 3

Change in libgfxinit[master]: gma bxt panel: Correct power-cycle delay programming
by Nico Huber (Code Review) 05 Mar '20

05 Mar '20

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/libgfxinit/+/38264 ) Change subject: gma bxt panel: Correct power-cycle delay programming ...................................................................... gma bxt panel: Correct power-cycle delay programming Change-Id: Iff53ef5730691c3be1ebcda71428e2bfe9ae16fd Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-panel.adb 2 files changed, 27 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/64/38264/1 diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index 83dd6a6..01a67c1 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -181,6 +181,7 @@ Has_PP_Port_Select : <genbool> := Up_To_Ironlake; Use_PP_VDD_Override : <genbool> := Up_To_Ironlake; Has_PCH_Panel_Power : <genbool> := Ironlake_On; + Has_PP_Divisor_Reg : <genbool> := not Gen_Broxton; ----------- PCH/FDI: --------- Has_PCH : <genbool> := not Gen_Broxton and not Gen_G45; diff --git a/common/hw-gfx-gma-panel.adb b/common/hw-gfx-gma-panel.adb index 359f580..c53fd3f 100644 --- a/common/hw-gfx-gma-panel.adb +++ b/common/hw-gfx-gma-panel.adb @@ -76,6 +76,13 @@ PCH_PP_CONTROL_POWER_DOWN_ON_RESET : constant := 16#00_0001# * 2 ** 1; PCH_PP_CONTROL_TARGET_ON : constant := 16#00_0001# * 2 ** 0; + BXT_PP_CONTROL_PWR_CYC_DELAY_SHIFT : constant := 4; + BXT_PP_CONTROL_PWR_CYC_DELAY_MASK : constant := 16#00_001f# * 2 ** 4; + function BXT_PP_CONTROL_PWR_CYC_DELAY (US : Natural) return Word32 is + begin + return Shift_Left (Div_Round_Up32 (US, 100_000) + 1, BXT_PP_CONTROL_PWR_CYC_DELAY_SHIFT); + end BXT_PP_CONTROL_PWR_CYC_DELAY; + PCH_PP_ON_DELAYS_PORT_SELECT_MASK : constant := 16#00_0003# * 2 ** 30; PCH_PP_ON_DELAYS_PORT_SELECT_LVDS : constant := 16#00_0000# * 2 ** 30; PCH_PP_ON_DELAYS_PORT_SELECT_DP_A : constant := 16#00_0001# * 2 ** 30; @@ -206,7 +213,12 @@ Delays_US (BL_Off_To_Power_Down) := 100 * Natural (Power_Delay and PCH_PP_OFF_DELAYS_BL_OFF_PWR_DOWN_MASK); - Registers.Read (Panel_PP_Regs.DIVISOR, Power_Delay); + if Config.Has_PP_Divisor_Reg then + Registers.Read (Panel_PP_Regs.DIVISOR, Power_Delay); + else + Registers.Read (Panel_PP_Regs.CONTROL, Power_Delay); + Power_Delay := Shift_Right (Power_Delay, BXT_PP_CONTROL_PWR_CYC_DELAY_SHIFT); + end if; if (Power_Delay and PCH_PP_DIVISOR_PWR_CYC_DELAY_MASK) > 1 then Delays_US (Power_Cycle_Delay) := 100_000 * (Natural (Power_Delay and PCH_PP_DIVISOR_PWR_CYC_DELAY_MASK) - 1); @@ -247,11 +259,19 @@ PCH_PP_OFF_DELAYS_BL_OFF_PWR_DOWN (Delays_US (BL_Off_To_Power_Down))); - Registers.Unset_And_Set_Mask - (Register => Panel_PP_Regs.DIVISOR, - Mask_Unset => PCH_PP_DIVISOR_PWR_CYC_DELAY_MASK, - Mask_Set => PCH_PP_DIVISOR_PWR_CYC_DELAY - (Delays_US (Power_Cycle_Delay))); + if Config.Has_PP_Divisor_Reg then + Registers.Unset_And_Set_Mask + (Register => Panel_PP_Regs.DIVISOR, + Mask_Unset => PCH_PP_DIVISOR_PWR_CYC_DELAY_MASK, + Mask_Set => PCH_PP_DIVISOR_PWR_CYC_DELAY + (Delays_US (Power_Cycle_Delay))); + else + Registers.Unset_And_Set_Mask + (Register => Panel_PP_Regs.CONTROL, + Mask_Unset => BXT_PP_CONTROL_PWR_CYC_DELAY_MASK, + Mask_Set => BXT_PP_CONTROL_PWR_CYC_DELAY + (Delays_US (Power_Cycle_Delay))); + end if; end if; if Config.Has_PP_Write_Protection then -- To view, visit https://review.coreboot.org/c/libgfxinit/+/38264 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Iff53ef5730691c3be1ebcda71428e2bfe9ae16fd Gerrit-Change-Number: 38264 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

2 10

Change in libgfxinit[master]: gma bxt: Add panel power and backlight register definitions
by Nico Huber (Code Review) 05 Mar '20

05 Mar '20

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/libgfxinit/+/38263 ) Change subject: gma bxt: Add panel power and backlight register definitions ...................................................................... gma bxt: Add panel power and backlight register definitions Change-Id: I71684b361af421dd7962431cf3eebe2b2769028e Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M common/hw-gfx-gma-registers.ads 1 file changed, 25 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/63/38263/1 diff --git a/common/hw-gfx-gma-registers.ads b/common/hw-gfx-gma-registers.ads index 767284c..68e5664 100644 --- a/common/hw-gfx-gma-registers.ads +++ b/common/hw-gfx-gma-registers.ads @@ -614,8 +614,16 @@ PCH_PP_ON_DELAYS, PCH_PP_OFF_DELAYS, PCH_PP_DIVISOR, + BXT_PP_STATUS_2, + BXT_PP_CONTROL_2, + BXT_PP_ON_DELAYS_2, + BXT_PP_OFF_DELAYS_2, BLC_PWM_PCH_CTL1, BLC_PWM_PCH_CTL2, + BXT_BLC_PWM_DUTY_1, + BXT_BLC_PWM_CTL_2, + BXT_BLC_PWM_FREQ_2, + BXT_BLC_PWM_DUTY_2, TRANS_HTOTAL_A, TRANS_HBLANK_A, TRANS_HSYNC_A, @@ -1428,13 +1436,23 @@ GMCH_PP_OFF_DELAYS => 16#06_120c# / Register_Width, GMCH_PP_DIVISOR => 16#06_1210# / Register_Width, GMCH_PFIT_CONTROL => 16#06_1230# / Register_Width, - PCH_PP_STATUS => 16#0c_7200# / Register_Width, - PCH_PP_CONTROL => 16#0c_7204# / Register_Width, - PCH_PP_ON_DELAYS => 16#0c_7208# / Register_Width, - PCH_PP_OFF_DELAYS => 16#0c_720c# / Register_Width, + PCH_PP_STATUS => 16#0c_7200# / Register_Width, -- aliased with BXT_PP_STATUS_1 + PCH_PP_CONTROL => 16#0c_7204# / Register_Width, -- aliased with BXT_PP_CONTROL_1 + PCH_PP_ON_DELAYS => 16#0c_7208# / Register_Width, -- aliased with BXT_PP_ON_DELAYS_1 + PCH_PP_OFF_DELAYS => 16#0c_720c# / Register_Width, -- aliased with BXT_PP_OFF_DELAYS_1 PCH_PP_DIVISOR => 16#0c_7210# / Register_Width, + BXT_PP_STATUS_2 => 16#0c_7300# / Register_Width, + BXT_PP_CONTROL_2 => 16#0c_7304# / Register_Width, + BXT_PP_ON_DELAYS_2 => 16#0c_7308# / Register_Width, + BXT_PP_OFF_DELAYS_2 => 16#0c_730c# / Register_Width, BLC_PWM_CPU_CTL => 16#04_8254# / Register_Width, - BLC_PWM_PCH_CTL2 => 16#0c_8254# / Register_Width, + BLC_PWM_CPU_CTL2 => 16#04_8250# / Register_Width, + BLC_PWM_PCH_CTL1 => 16#0c_8250# / Register_Width, -- aliased with BXT_BLC_PWM_CTL_1 + BLC_PWM_PCH_CTL2 => 16#0c_8254# / Register_Width, -- aliased with BXT_BLC_PWM_FREQ_1 + BXT_BLC_PWM_DUTY_1 => 16#0c_8258# / Register_Width, + BXT_BLC_PWM_CTL_2 => 16#0c_8350# / Register_Width, + BXT_BLC_PWM_FREQ_2 => 16#0c_8354# / Register_Width, + BXT_BLC_PWM_DUTY_2 => 16#0c_8358# / Register_Width, -- GMCH LVDS Connector Registers GMCH_LVDS => 16#06_1180# / Register_Width, @@ -1472,8 +1490,6 @@ DBUF_CTL => 16#04_5008# / Register_Width, NDE_RSTWRN_OPT => 16#04_6408# / Register_Width, PCH_DREF_CONTROL => 16#0c_6200# / Register_Width, - BLC_PWM_PCH_CTL1 => 16#0c_8250# / Register_Width, - BLC_PWM_CPU_CTL2 => 16#04_8250# / Register_Width, PCH_DPLL_SEL => 16#0c_7000# / Register_Width, GT_MAILBOX => 16#13_8124# / Register_Width, GT_MAILBOX_DATA => 16#13_8128# / Register_Width, @@ -1655,6 +1671,8 @@ CURACNTR : constant Registers_Index := CUR_CTL_A; CURABASE : constant Registers_Index := CUR_BASE_A; CURAPOS : constant Registers_Index := CUR_POS_A; + BXT_BLC_PWM_CTL_1 : constant Registers_Index := BLC_PWM_PCH_CTL1; + BXT_BLC_PWM_FREQ_1 : constant Registers_Index := BLC_PWM_PCH_CTL2; --------------------------------------------------------------------------- -- To view, visit https://review.coreboot.org/c/libgfxinit/+/38263 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: I71684b361af421dd7962431cf3eebe2b2769028e Gerrit-Change-Number: 38263 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

2 3

Change in libgfxinit[master]: [WIP] gma panel: Introduce `Panel_Control` type
by Nico Huber (Code Review) 05 Mar '20

05 Mar '20

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/libgfxinit/+/38243 ) Change subject: [WIP] gma panel: Introduce `Panel_Control` type ...................................................................... [WIP] gma panel: Introduce `Panel_Control` type Change-Id: I83864bc86b48f65d9ba43e083b805ca09497cbb0 Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M common/g45/hw-gfx-gma-connectors.adb M common/haswell_shared/hw-gfx-gma-connectors.adb M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-config_helpers.adb M common/hw-gfx-gma-config_helpers.ads M common/hw-gfx-gma-connector_info.adb M common/hw-gfx-gma-display_probing.adb M common/hw-gfx-gma-panel.adb M common/hw-gfx-gma-panel.ads M common/hw-gfx-gma.adb M common/hw-gfx-gma.ads M common/ironlake/hw-gfx-gma-connectors.adb 12 files changed, 120 insertions(+), 77 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/43/38243/1 diff --git a/common/g45/hw-gfx-gma-connectors.adb b/common/g45/hw-gfx-gma-connectors.adb index 5ca7c9b..7486fcc 100644 --- a/common/g45/hw-gfx-gma-connectors.adb +++ b/common/g45/hw-gfx-gma-connectors.adb @@ -29,12 +29,6 @@ procedure Post_Reset_Off is null; procedure Initialize is null; - function Is_Internal (Port_Cfg : Port_Config) return Boolean - is - begin - return Port_Cfg.Port = LVDS; - end Is_Internal; - ---------------------------------------------------------------------------- procedure Pre_On @@ -69,10 +63,8 @@ end if; end if; - if Is_Internal (Port_Cfg) then - Panel.On (Wait => False); - Panel.Backlight_On; - end if; + Panel.On (Port_Cfg.Panel, Wait => False); + Panel.Backlight_On (Port_Cfg.Panel); end Post_On; ---------------------------------------------------------------------------- @@ -82,10 +74,8 @@ begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - if Is_Internal (Port_Cfg) then - Panel.Backlight_Off; - Panel.Off; - end if; + Panel.Backlight_Off (Port_Cfg.Panel); + Panel.Off (Port_Cfg.Panel); end Pre_Off; procedure Post_Off (Port_Cfg : Port_Config) @@ -110,8 +100,10 @@ begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Panel.Backlight_Off; - Panel.Off; + for P in Active_Panel loop + Panel.Backlight_Off (P); + Panel.Off (P); + end loop; end Pre_All_Off; procedure Post_All_Off diff --git a/common/haswell_shared/hw-gfx-gma-connectors.adb b/common/haswell_shared/hw-gfx-gma-connectors.adb index e4980f1..c1b04ed 100644 --- a/common/haswell_shared/hw-gfx-gma-connectors.adb +++ b/common/haswell_shared/hw-gfx-gma-connectors.adb @@ -60,9 +60,7 @@ if Port_Cfg.Port in Digital_Port then DDI.Post_On (Port_Cfg); - if Port_Cfg.Port = DIGI_A then - Panel.Backlight_On; - end if; + Panel.Backlight_On (Port_Cfg.Panel); Success := True; else Success := False; -- Should not happen @@ -76,10 +74,8 @@ begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - if Port_Cfg.Port = DIGI_A then - Panel.Backlight_Off; - Panel.Off; - end if; + Panel.Backlight_Off (Port_Cfg.Panel); + Panel.Off (Port_Cfg.Panel); end Pre_Off; procedure Post_Off (Port_Cfg : Port_Config) @@ -96,8 +92,10 @@ procedure Pre_All_Off is begin - Panel.Backlight_Off; - Panel.Off; + for P in Active_Panel loop + Panel.Backlight_Off (P); + Panel.Off (P); + end loop; end Pre_All_Off; procedure Post_All_Off diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index 2467440..c6a5d44 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -43,7 +43,8 @@ CPU_Var : constant Gen_CPU_Variant := <<CPU_VARIANT>>; - Panel_1_Port : constant Port_Type := <<PANEL_1_PORT>>; + Panel_Ports : constant array (Active_Panel) of Port_Type := + (Panel_1 => <<PANEL_1_PORT>>); Analog_I2C_Port : constant PCH_Port := <<ANALOG_I2C_PORT>>; diff --git a/common/hw-gfx-gma-config_helpers.adb b/common/hw-gfx-gma-config_helpers.adb index 07fa087..74279dc 100644 --- a/common/hw-gfx-gma-config_helpers.adb +++ b/common/hw-gfx-gma-config_helpers.adb @@ -12,7 +12,6 @@ -- GNU General Public License for more details. -- -with HW.GFX.GMA.Config; with HW.GFX.GMA.Connector_Info; with HW.GFX.GMA.DP_Info; with HW.GFX.GMA.Registers; @@ -84,6 +83,17 @@ when DP1 .. DP3 => DP); end To_Display_Type; + function To_Panel (Port : Active_Port_Type) return Panel_Control + is + begin + for P in Active_Panel loop + if Port = Config.Panel_Ports (P) then + return P; + end if; + end loop; + return No_Panel; + end To_Panel; + function Highest_Dotclock (Configs : Pipe_Configs) return Frequency_Type is Max : Frequency_Type := Frequency_Type'First; @@ -171,6 +181,7 @@ (Port => To_GPU_Port (Pipe, Port), PCH_Port => To_PCH_Port (Port), Display => To_Display_Type (Port), + Panel => To_Panel (Port), Mode => Mode, Is_FDI => Config.Is_FDI_Port (Port), FDI => Default_DP, @@ -206,6 +217,7 @@ (Port => GPU_Port'First, PCH_Port => PCH_Port'First, Display => Display_Type'First, + Panel => No_Panel, Mode => Invalid_Mode, Is_FDI => False, FDI => Default_DP, diff --git a/common/hw-gfx-gma-config_helpers.ads b/common/hw-gfx-gma-config_helpers.ads index 9d689c7..b9f1d70 100644 --- a/common/hw-gfx-gma-config_helpers.ads +++ b/common/hw-gfx-gma-config_helpers.ads @@ -13,6 +13,7 @@ -- with HW; +with HW.GFX.GMA.Config; private package HW.GFX.GMA.Config_Helpers is @@ -26,6 +27,8 @@ function To_Display_Type (Port : Active_Port_Type) return Display_Type; + function To_Panel (Port : Active_Port_Type) return Panel_Control; + procedure Fill_Port_Config (Port_Cfg : out Port_Config; Pipe : in Pipe_Index; diff --git a/common/hw-gfx-gma-connector_info.adb b/common/hw-gfx-gma-connector_info.adb index 3ce807e..dcbed2e 100644 --- a/common/hw-gfx-gma-connector_info.adb +++ b/common/hw-gfx-gma-connector_info.adb @@ -38,12 +38,10 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); if Port_Cfg.Display = DP then - if Port_Cfg.Port = DIGI_A then - if GMA.Config.Use_PP_VDD_Override then - Panel.VDD_Override; - else - Panel.On; - end if; + if GMA.Config.Use_PP_VDD_Override then + Panel.VDD_Override (Port_Cfg.Panel); + else + Panel.On (Port_Cfg.Panel); end if; DP_Info.Read_Caps diff --git a/common/hw-gfx-gma-display_probing.adb b/common/hw-gfx-gma-display_probing.adb index df88492..5aed2e6 100644 --- a/common/hw-gfx-gma-display_probing.adb +++ b/common/hw-gfx-gma-display_probing.adb @@ -118,10 +118,7 @@ Success := Config.Valid_Port (Port); if Success then - if Port in Internal_Port_Type then - Panel.Wait_On; - end if; - Read_EDID (Raw_EDID, Port, Success); + Panel.Wait_On (Config_Helpers.To_Panel (Port)); end if; if Success and then @@ -162,7 +159,7 @@ Max_Pipe : in Pipe_Index := Pipe_Index'Last; Keep_Power : in Boolean := False) is - Probe_Internal : Boolean := False; + Probed_Panels : array (Active_Panel) of Boolean := (others => False); Port_Idx : Port_List_Range := Port_List_Range'First; Success : Boolean; @@ -176,11 +173,14 @@ -- Turn panel on early to probe other ports during the power on delay. for Idx in Port_List_Range loop exit when Ports (Idx) = Disabled; - if Ports (Idx) in Internal_Port_Type then - Panel.On (Wait => False); - Probe_Internal := True; - exit; - end if; + declare + P : constant Panel_Control := Config_Helpers.To_Panel (Ports (Idx)); + begin + if P /= No_Panel then + Panel.On (P, Wait => False); + Probed_Panels (P) := True; + end if; + end; end loop; for Pipe in Pipe_Index range @@ -211,11 +211,13 @@ end if; -- Turn panel power off if probing failed. - if Probe_Internal and not - (Port_Configured (Configs, eDP) or Port_Configured (Configs, LVDS)) - then - Panel.Off; - end if; + for P in Active_Panel loop + if Probed_Panels (P) and not + Port_Configured (Configs, Config.Panel_Ports (P)) + then + Panel.Off (P); + end if; + end loop; end Scan_Ports; procedure Hotplug_Events (Ports : out Port_List) diff --git a/common/hw-gfx-gma-panel.adb b/common/hw-gfx-gma-panel.adb index b40689b..398c4d7 100644 --- a/common/hw-gfx-gma-panel.adb +++ b/common/hw-gfx-gma-panel.adb @@ -218,7 +218,7 @@ if Override_Delays then if Config.Has_PP_Port_Select then Port_Select := - (case Config.Panel_1_Port is + (case Config.Panel_Ports (Panel_1) is when LVDS => PCH_PP_ON_DELAYS_PORT_SELECT_LVDS, when eDP => PCH_PP_ON_DELAYS_PORT_SELECT_DP_A, when DP2 | HDMI2 => PCH_PP_ON_DELAYS_PORT_SELECT_DP_C, @@ -269,21 +269,29 @@ ---------------------------------------------------------------------------- - procedure VDD_Override is + procedure VDD_Override (Panel : Panel_Control) is begin + if Panel = No_Panel then + return; + end if; + pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); -- Yeah, We could do, what we are supposed to do here. But OTOH, we -- are should wait for the full Power Up Delay, which we would have -- to do later again. And just powering on the display seems to work -- too. Also this function vanished on newer hardware. - On; + On (Panel); end VDD_Override; - procedure On (Wait : Boolean := True) + procedure On (Panel : Panel_Control; Wait : Boolean := True) is Was_On : Boolean; begin + if Panel = No_Panel then + return; + end if; + pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); Registers.Is_Set_Mask (Panel_PP_Regs.CONTROL, PCH_PP_CONTROL_TARGET_ON, Was_On); @@ -296,12 +304,16 @@ Power_Up_Timer := Time.US_From_Now (Delays_US (Power_Up_Delay)); end if; if Wait then - Wait_On; + Wait_On (Panel); end if; end On; - procedure Wait_On is + procedure Wait_On (Panel : Panel_Control) is begin + if Panel = No_Panel then + return; + end if; + pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); Time.Delay_Until (Power_Up_Timer); @@ -313,10 +325,14 @@ Registers.Unset_Mask (Panel_PP_Regs.CONTROL, PCH_PP_CONTROL_VDD_OVERRIDE); end Wait_On; - procedure Off + procedure Off (Panel : Panel_Control) is Was_On : Boolean; begin + if Panel = No_Panel then + return; + end if; + pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); Registers.Is_Set_Mask (Panel_PP_Regs.CONTROL, PCH_PP_CONTROL_TARGET_ON, Was_On); @@ -338,8 +354,12 @@ ---------------------------------------------------------------------------- - procedure Backlight_On is + procedure Backlight_On (Panel : Panel_Control) is begin + if Panel = No_Panel then + return; + end if; + pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); Registers.Set_Mask @@ -347,8 +367,12 @@ Mask => PCH_PP_CONTROL_BACKLIGHT_ENABLE); end Backlight_On; - procedure Backlight_Off is + procedure Backlight_Off (Panel : Panel_Control) is begin + if Panel = No_Panel then + return; + end if; + pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); Registers.Unset_Mask @@ -356,8 +380,12 @@ Mask => PCH_PP_CONTROL_BACKLIGHT_ENABLE); end Backlight_Off; - procedure Set_Backlight (Level : Word16) is + procedure Set_Backlight (Panel : Panel_Control; Level : Word16) is begin + if Panel = No_Panel then + return; + end if; + pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); Registers.Unset_And_Set_Mask @@ -366,10 +394,15 @@ Mask_Set => Word32 (Level)); end Set_Backlight; - procedure Get_Max_Backlight (Level : out Word16) + procedure Get_Max_Backlight (Panel : Panel_Control; Level : out Word16) is Reg : Word32; begin + if Panel = No_Panel then + Level := 0; + return; + end if; + pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); Registers.Read (Registers.BLC_PWM_PCH_CTL2, Reg); diff --git a/common/hw-gfx-gma-panel.ads b/common/hw-gfx-gma-panel.ads index b968e29..baf47f7 100644 --- a/common/hw-gfx-gma-panel.ads +++ b/common/hw-gfx-gma-panel.ads @@ -40,22 +40,22 @@ ---------------------------------------------------------------------------- - procedure VDD_Override; + procedure VDD_Override (Panel : Panel_Control); - procedure On (Wait : Boolean := True); + procedure On (Panel : Panel_Control; Wait : Boolean := True); - procedure Wait_On; + procedure Wait_On (Panel : Panel_Control); - procedure Off; + procedure Off (Panel : Panel_Control); ---------------------------------------------------------------------------- - procedure Backlight_On; + procedure Backlight_On (Panel : Panel_Control); - procedure Backlight_Off; + procedure Backlight_Off (Panel : Panel_Control); - procedure Set_Backlight (Level : Word16); + procedure Set_Backlight (Panel : Panel_Control; Level : Word16); - procedure Get_Max_Backlight (Level : out Word16); + procedure Get_Max_Backlight (Panel : Panel_Control; Level : out Word16); end HW.GFX.GMA.Panel; diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb index d0f296e..04caa61 100644 --- a/common/hw-gfx-gma.adb +++ b/common/hw-gfx-gma.adb @@ -179,9 +179,7 @@ ("Enabled port " & Port_Names (Pipe_Cfg.Port))); else Wait_For_HPD (Pipe_Cfg.Port) := True; - if Pipe_Cfg.Port in Internal_Port_Type then - Panel.Off; - end if; + Panel.Off (Config_Helpers.To_Panel (Pipe_Cfg.Port)); end if; end Enable_Output; diff --git a/common/hw-gfx-gma.ads b/common/hw-gfx-gma.ads index fcd8804..d5ab68a 100644 --- a/common/hw-gfx-gma.ads +++ b/common/hw-gfx-gma.ads @@ -253,11 +253,15 @@ subtype PCH_HDMI_Port is PCH_Port range PCH_HDMI_B .. PCH_HDMI_D; subtype PCH_DP_Port is PCH_Port range PCH_DP_B .. PCH_DP_D; + type Panel_Control is (No_Panel, Panel_1); + subtype Active_Panel is Panel_Control range Panel_1 .. Panel_1; + type Port_Config is record Port : GPU_Port; PCH_Port : GMA.PCH_Port; Display : Display_Type; + Panel : Panel_Control; Mode : Mode_Type; Is_FDI : Boolean; FDI : DP_Link; diff --git a/common/ironlake/hw-gfx-gma-connectors.adb b/common/ironlake/hw-gfx-gma-connectors.adb index 21eca97..fd774ff 100644 --- a/common/ironlake/hw-gfx-gma-connectors.adb +++ b/common/ironlake/hw-gfx-gma-connectors.adb @@ -70,7 +70,7 @@ if Port_Cfg.Port = DIGI_A then EDP.Pre_Training; - Panel.On (Wait => True); + Panel.On (Port_Cfg.Panel, Wait => True); EDP.Post_On (Port_Cfg.DP, Success); elsif Port_Cfg.Port in FDI.GPU_FDI_Port then declare @@ -97,8 +97,8 @@ end if; if Success and Is_Internal (Port_Cfg) then - Panel.On (Wait => False); - Panel.Backlight_On; + Panel.On (Port_Cfg.Panel, Wait => False); + Panel.Backlight_On (Port_Cfg.Panel); end if; end Post_On; @@ -110,8 +110,8 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); if Is_Internal (Port_Cfg) then - Panel.Backlight_Off; - Panel.Off; + Panel.Backlight_Off (Port_Cfg.Panel); + Panel.Off (Port_Cfg.Panel); end if; end Pre_Off; @@ -154,8 +154,10 @@ begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Panel.Backlight_Off; - Panel.Off; + for P in Active_Panel loop + Panel.Backlight_Off (P); + Panel.Off (P); + end loop; end Pre_All_Off; procedure Post_All_Off -- To view, visit https://review.coreboot.org/c/libgfxinit/+/38243 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: I83864bc86b48f65d9ba43e083b805ca09497cbb0 Gerrit-Change-Number: 38243 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

2 8

Change in libgfxinit[master]: gma panel config: Turn `internal display type` into a `panel port`
by Nico Huber (Code Review) 05 Mar '20

05 Mar '20

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/libgfxinit/+/38242 ) Change subject: gma panel config: Turn `internal display type` into a `panel port` ...................................................................... gma panel config: Turn `internal display type` into a `panel port` Instead of querying for the type of the internal display (LVDS vs. DP), make it a choice of the port that has a panel hooked up. As some plat- forms actually have support for two panels, we prepare for that by naming it `Panel_1_Port`. We still need to call into the panel logic, when the respective port is enabled. This will be done in the next commit. Change-Id: Id3c78441857d07fb34274b9abd3ae6ea42909ff6 Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M common/Makefile.inc M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-panel.adb M configs/broxton M configs/g45 M configs/haswell M configs/ironlake M configs/ironlake_edp M configs/skylake 9 files changed, 17 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/42/38242/1 diff --git a/common/Makefile.inc b/common/Makefile.inc index 4cbdaaa..9378f41 100644 --- a/common/Makefile.inc +++ b/common/Makefile.inc @@ -50,7 +50,7 @@ CONFIG_GFX_GMA_GENERATION := $(call strip_quotes,$(CONFIG_GFX_GMA_GENERATION)) CONFIG_GFX_GMA_CPU := $(call strip_quotes,$(CONFIG_GFX_GMA_CPU)) CONFIG_GFX_GMA_CPU_VARIANT := $(call strip_quotes,$(CONFIG_GFX_GMA_CPU_VARIANT)) -CONFIG_GFX_GMA_INTERNAL_PORT := $(call strip_quotes,$(CONFIG_GFX_GMA_INTERNAL_PORT)) +CONFIG_GFX_GMA_PANEL_1_PORT := $(call strip_quotes,$(CONFIG_GFX_GMA_PANEL_1_PORT)) CONFIG_GFX_GMA_ANALOG_I2C_PORT := $(call strip_quotes,$(CONFIG_GFX_GMA_ANALOG_I2C_PORT)) _GEN_NONCONST := $(strip \ @@ -72,7 +72,7 @@ $(hw-gfx-gma-config-ads): $(dir)/hw-gfx-gma-config.ads.template $(cnf) printf " GENERATE $(patsubst /%,%,$(subst $(obj)/,,$@))\n" sed -e's/<<GEN>>/$(CONFIG_GFX_GMA_GENERATION)/' \ - -e's/<<INTERNAL_PORT>>/$(CONFIG_GFX_GMA_INTERNAL_PORT)/' \ + -e's/<<PANEL_1_PORT>>/$(CONFIG_GFX_GMA_PANEL_1_PORT)/' \ -e's/<<ANALOG_I2C_PORT>>/$(CONFIG_GFX_GMA_ANALOG_I2C_PORT)/' \ -e's/<<DEFAULT_MMIO_BASE>>/$(CONFIG_GFX_GMA_DEFAULT_MMIO)/' \ -e'/constant Gen_CPU$_Var$\?/d' \ @@ -90,7 +90,7 @@ sed -e's/<<GEN>>/$(CONFIG_GFX_GMA_GENERATION)/' \ -e's/<<CPU>>/$(CONFIG_GFX_GMA_CPU)/' \ -e's/<<CPU_VARIANT>>/$(CONFIG_GFX_GMA_CPU_VARIANT)/' \ - -e's/<<INTERNAL_PORT>>/$(CONFIG_GFX_GMA_INTERNAL_PORT)/' \ + -e's/<<PANEL_1_PORT>>/$(CONFIG_GFX_GMA_PANEL_1_PORT)/' \ -e's/<<ANALOG_I2C_PORT>>/$(CONFIG_GFX_GMA_ANALOG_I2C_PORT)/' \ -e's/<<DEFAULT_MMIO_BASE>>/$(CONFIG_GFX_GMA_DEFAULT_MMIO)/' \ -e":s$$(printf '\n ')/,$$/{N;s/,\n.*Dyn_CPU$_Var$\?[^,)]*//;ts$$(printf '\n ')P;D;}" \ diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index db03a07..2467440 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -43,7 +43,7 @@ CPU_Var : constant Gen_CPU_Variant := <<CPU_VARIANT>>; - Internal_Display : constant Internal_Type := <<INTERNAL_PORT>>; + Panel_1_Port : constant Port_Type := <<PANEL_1_PORT>>; Analog_I2C_Port : constant PCH_Port := <<ANALOG_I2C_PORT>>; @@ -146,7 +146,6 @@ Have_HDMI_Buf_Override : constant Boolean := DDI_HDMI_Buffer_Translation >= 0; Default_MMIO_Base_Set : constant Boolean := Default_MMIO_Base /= 0; - Internal_Is_EDP : constant Boolean := Internal_Display = DP; Have_DVI_I : constant Boolean := Analog_I2C_Port /= PCH_DAC; Has_Presence_Straps : <genbool> := not Gen_Broxton; diff --git a/common/hw-gfx-gma-panel.adb b/common/hw-gfx-gma-panel.adb index 968fbbe..b40689b 100644 --- a/common/hw-gfx-gma-panel.adb +++ b/common/hw-gfx-gma-panel.adb @@ -217,11 +217,13 @@ if Override_Delays then if Config.Has_PP_Port_Select then - if Config.Internal_Is_EDP then - Port_Select := PCH_PP_ON_DELAYS_PORT_SELECT_DP_A; - else - Port_Select := PCH_PP_ON_DELAYS_PORT_SELECT_LVDS; - end if; + Port_Select := + (case Config.Panel_1_Port is + when LVDS => PCH_PP_ON_DELAYS_PORT_SELECT_LVDS, + when eDP => PCH_PP_ON_DELAYS_PORT_SELECT_DP_A, + when DP2 | HDMI2 => PCH_PP_ON_DELAYS_PORT_SELECT_DP_C, + when DP3 | HDMI3 => PCH_PP_ON_DELAYS_PORT_SELECT_DP_D, + when others => 0); else Port_Select := 0; end if; diff --git a/configs/broxton b/configs/broxton index 5006125..35a6f6c 100644 --- a/configs/broxton +++ b/configs/broxton @@ -2,6 +2,6 @@ CONFIG_GFX_GMA_GENERATION = Broxton CONFIG_GFX_GMA_CPU = Broxton CONFIG_GFX_GMA_CPU_VARIANT = Normal # N/A -CONFIG_GFX_GMA_INTERNAL_PORT = DP +CONFIG_GFX_GMA_PANEL_1_PORT = eDP CONFIG_GFX_GMA_ANALOG_I2C_PORT = PCH_DAC # N/A CONFIG_GFX_GMA_DEFAULT_MMIO = 16\#e000_0000\# diff --git a/configs/g45 b/configs/g45 index 44404b9..2f0f679 100644 --- a/configs/g45 +++ b/configs/g45 @@ -1,5 +1,5 @@ CONFIG_GFX_GMA_DYN_CPU = y CONFIG_GFX_GMA_GENERATION = G45 -CONFIG_GFX_GMA_INTERNAL_PORT = LVDS +CONFIG_GFX_GMA_PANEL_1_PORT = LVDS CONFIG_GFX_GMA_ANALOG_I2C_PORT = PCH_DAC CONFIG_GFX_GMA_DEFAULT_MMIO = 16\#e000_0000\# diff --git a/configs/haswell b/configs/haswell index 8adaafc..3924572 100644 --- a/configs/haswell +++ b/configs/haswell @@ -1,5 +1,5 @@ CONFIG_GFX_GMA_DYN_CPU = y CONFIG_GFX_GMA_GENERATION = Haswell -CONFIG_GFX_GMA_INTERNAL_PORT = DP +CONFIG_GFX_GMA_PANEL_1_PORT = eDP CONFIG_GFX_GMA_ANALOG_I2C_PORT = PCH_DAC CONFIG_GFX_GMA_DEFAULT_MMIO = 16\#e000_0000\# diff --git a/configs/ironlake b/configs/ironlake index 20b33a7..494b505 100644 --- a/configs/ironlake +++ b/configs/ironlake @@ -1,5 +1,5 @@ CONFIG_GFX_GMA_DYN_CPU = y CONFIG_GFX_GMA_GENERATION = Ironlake -CONFIG_GFX_GMA_INTERNAL_PORT = LVDS +CONFIG_GFX_GMA_PANEL_1_PORT = LVDS CONFIG_GFX_GMA_ANALOG_I2C_PORT = PCH_DAC CONFIG_GFX_GMA_DEFAULT_MMIO = 16\#e000_0000\# diff --git a/configs/ironlake_edp b/configs/ironlake_edp index 9bc56c3..90804c2 100644 --- a/configs/ironlake_edp +++ b/configs/ironlake_edp @@ -1,5 +1,5 @@ CONFIG_GFX_GMA_DYN_CPU = y CONFIG_GFX_GMA_GENERATION = Ironlake -CONFIG_GFX_GMA_INTERNAL_PORT = DP +CONFIG_GFX_GMA_PANEL_1_PORT = eDP CONFIG_GFX_GMA_ANALOG_I2C_PORT = PCH_DAC CONFIG_GFX_GMA_DEFAULT_MMIO = 16\#e000_0000\# diff --git a/configs/skylake b/configs/skylake index 7ae760a..773e7cf 100644 --- a/configs/skylake +++ b/configs/skylake @@ -1,5 +1,5 @@ CONFIG_GFX_GMA_DYN_CPU = y CONFIG_GFX_GMA_GENERATION = Skylake -CONFIG_GFX_GMA_INTERNAL_PORT = DP +CONFIG_GFX_GMA_PANEL_1_PORT = eDP CONFIG_GFX_GMA_ANALOG_I2C_PORT = PCH_DAC CONFIG_GFX_GMA_DEFAULT_MMIO = 16\#e000_0000\# -- To view, visit https://review.coreboot.org/c/libgfxinit/+/38242 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Id3c78441857d07fb34274b9abd3ae6ea42909ff6 Gerrit-Change-Number: 38242 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

2 5

Change in libgfxinit[master]: gma: Split `Internal` port type into `eDP` & `LVDS`
by Nico Huber (Code Review) 05 Mar '20

05 Mar '20

Hello Alexander Couzens, I'd like you to do a code review. Please visit https://review.coreboot.org/c/libgfxinit/+/38239 to review the following change. Change subject: gma: Split `Internal` port type into `eDP` & `LVDS` ...................................................................... gma: Split `Internal` port type into `eDP` & `LVDS` We used to have a single type `Internal`, in the GMA interface, to represent the port for any internal panel. This seemed suitable as all mainboard targets used the additional panel logic (power se- quencing, backlight) only with either one of the eDP and LVDS ports. However, the hardware allows to combine the panel logic also with other ports. And some of the regular DP ports are even mentioned as alternatives to the dedicated eDP port. As a first step towards supporting such less common combinations, we get rid of the single `Internal` type. All the panel logic still assumes that either the dedicated eDP or the LVDS port is used for an internal display. We introduce `Internal_Port_Type` to represent eDP and LVDS, for this. But it should vanish, once the panel logic is adapted. Change-Id: Iadf3c11bd35d085cf47a961e800b0d96b79f62f5 Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M common/broxton/hw-gfx-gma-power_and_clocks.adb M common/g45/hw-gfx-gma-port_detect.adb M common/haswell_shared/hw-gfx-gma-port_detect.adb M common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.adb M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-config_helpers.adb M common/hw-gfx-gma-display_probing.adb M common/hw-gfx-gma-display_probing.ads M common/hw-gfx-gma.adb M common/hw-gfx-gma.ads M common/ironlake/hw-gfx-gma-port_detect.adb M common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb M common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb 13 files changed, 78 insertions(+), 77 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/39/38239/1 diff --git a/common/broxton/hw-gfx-gma-power_and_clocks.adb b/common/broxton/hw-gfx-gma-power_and_clocks.adb index fe10208..07f0cc7 100644 --- a/common/broxton/hw-gfx-gma-power_and_clocks.adb +++ b/common/broxton/hw-gfx-gma-power_and_clocks.adb @@ -157,9 +157,9 @@ is begin return (case PD is - when DDI_A => Configs (Primary).Port = Internal or - Configs (Secondary).Port = Internal or - Configs (Tertiary).Port = Internal, + when DDI_A => Configs (Primary).Port = eDP or + Configs (Secondary).Port = eDP or + Configs (Tertiary).Port = eDP, when DDI_BC => Configs (Primary).Port = HDMI1 or Configs (Primary).Port = DP1 or Configs (Secondary).Port = HDMI1 or @@ -173,7 +173,7 @@ Configs (Tertiary).Port = HDMI2 or Configs (Tertiary).Port = DP2, when PW2 => (Configs (Primary).Port /= Disabled and - Configs (Primary).Port /= Internal) or + Configs (Primary).Port /= eDP) or Configs (Secondary).Port /= Disabled or Configs (Tertiary).Port /= Disabled); end Need_PD; diff --git a/common/g45/hw-gfx-gma-port_detect.adb b/common/g45/hw-gfx-gma-port_detect.adb index 479b626..45ed2dd 100644 --- a/common/g45/hw-gfx-gma-port_detect.adb +++ b/common/g45/hw-gfx-gma-port_detect.adb @@ -74,7 +74,7 @@ begin Config.Valid_Port (Analog) := True; - Config.Valid_Port (Internal) := Config.Internal_Is_LVDS; + Config.Valid_Port (LVDS) := Config.GMCH_GM45; for HDMI_Port in GMCH_HDMI_Port loop Registers.Is_Set_Mask (Register => GMCH_HDMI (HDMI_Port), diff --git a/common/haswell_shared/hw-gfx-gma-port_detect.adb b/common/haswell_shared/hw-gfx-gma-port_detect.adb index 50c14cd..09136ff 100644 --- a/common/haswell_shared/hw-gfx-gma-port_detect.adb +++ b/common/haswell_shared/hw-gfx-gma-port_detect.adb @@ -87,41 +87,37 @@ Config.Valid_Port (Analog) := not (DDI_A_X4 or DAC_Disabled); end if; - if Config.Internal_Is_EDP then - -- DDI_A - if Config.Has_Presence_Straps then - Registers.Is_Set_Mask - (Register => Registers.DDI_BUF_CTL_A, - Mask => DDI_PORT_DETECTED (DIGI_A), - Result => Internal_Detected); - else - Internal_Detected := True; -- XXX: Linux' i915 contains a fixme. - end if; - if Internal_Detected then - if Config.Has_HOTPLUG_CTL then - Registers.Set_Mask - (Register => Registers.HOTPLUG_CTL, - Mask => HOTPLUG_CTL_DDI_A_HPD_INPUT_ENABLE or - HOTPLUG_CTL_DDI_A_HPD_STATUS); -- clear status - if Config.Has_SHOTPLUG_CTL_A then - -- Have to enable south hotplug too on SoCs. - Registers.Unset_And_Set_Mask - (Register => Registers.SHOTPLUG_CTL, - Mask_Unset => SHOTPLUG_CTL_DETECT_MASK, - Mask_Set => SHOTPLUG_CTL_HPD_INPUT_ENABLE (DIGI_A)); - end if; - else + -- DDI_A + if Config.Has_Presence_Straps then + Registers.Is_Set_Mask + (Register => Registers.DDI_BUF_CTL_A, + Mask => DDI_PORT_DETECTED (DIGI_A), + Result => Internal_Detected); + else + Internal_Detected := True; -- XXX: Linux' i915 contains a fixme. + end if; + if Internal_Detected then + if Config.Has_HOTPLUG_CTL then + Registers.Set_Mask + (Register => Registers.HOTPLUG_CTL, + Mask => HOTPLUG_CTL_DDI_A_HPD_INPUT_ENABLE or + HOTPLUG_CTL_DDI_A_HPD_STATUS); -- clear status + if Config.Has_SHOTPLUG_CTL_A then + -- Have to enable south hotplug too on SoCs. Registers.Unset_And_Set_Mask (Register => Registers.SHOTPLUG_CTL, Mask_Unset => SHOTPLUG_CTL_DETECT_MASK, - Mask_Set => SHOTPLUG_CTL_HPD_INPUT_ENABLE (DIGI_A) or - SHOTPLUG_CTL_HPD_STATUS (DIGI_A)); -- clear + Mask_Set => SHOTPLUG_CTL_HPD_INPUT_ENABLE (DIGI_A)); end if; + else + Registers.Unset_And_Set_Mask + (Register => Registers.SHOTPLUG_CTL, + Mask_Unset => SHOTPLUG_CTL_DETECT_MASK, + Mask_Set => SHOTPLUG_CTL_HPD_INPUT_ENABLE (DIGI_A) or + SHOTPLUG_CTL_HPD_STATUS (DIGI_A)); -- clear end if; - else - Internal_Detected := False; end if; - Config.Valid_Port (Internal) := Internal_Detected; + Config.Valid_Port (eDP) := Internal_Detected; -- DDI_[BCD] for Port in Ext_Digital_Port range diff --git a/common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.adb b/common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.adb index 44d9acd..252074e 100644 --- a/common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.adb +++ b/common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.adb @@ -203,9 +203,9 @@ begin return (Config.Use_PDW_For_EDP_Scaling and then - (Primary.Port = Internal and Requires_Scaling (Primary))) + (Primary.Port = eDP and Requires_Scaling (Primary))) or - (Primary.Port /= Disabled and Primary.Port /= Internal) + (Primary.Port /= Disabled and Primary.Port /= eDP) or Checked_Configs (Secondary).Port /= Disabled or diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index 0e49943..db03a07 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -146,8 +146,6 @@ Have_HDMI_Buf_Override : constant Boolean := DDI_HDMI_Buffer_Translation >= 0; Default_MMIO_Base_Set : constant Boolean := Default_MMIO_Base /= 0; - Has_Internal_Display : constant Boolean := Internal_Display /= None; - Internal_Is_LVDS : constant Boolean := Internal_Display = LVDS; Internal_Is_EDP : constant Boolean := Internal_Display = DP; Have_DVI_I : constant Boolean := Analog_I2C_Port /= PCH_DAC; @@ -265,7 +263,8 @@ type FDI_Per_Port is array (Port_Type) of Boolean; Is_FDI_Port : <hswvar> FDI_Per_Port := (Disabled => False, - Internal => Gen_Ironlake and Internal_Is_LVDS, + eDP => False, + LVDS => Gen_Ironlake, DP1 .. HDMI3 => Gen_Ironlake, Analog => Has_PCH_DAC); diff --git a/common/hw-gfx-gma-config_helpers.adb b/common/hw-gfx-gma-config_helpers.adb index ede140c..07fa087 100644 --- a/common/hw-gfx-gma-config_helpers.adb +++ b/common/hw-gfx-gma-config_helpers.adb @@ -32,13 +32,14 @@ (case Config.Gen is when G45 => -- everything on GMCH (case Port is - when Internal => LVDS, + when LVDS => LVDS, + when eDP => DIGI_A, -- n/a, actually when HDMI1 | DP1 => DIGI_B, when HDMI2 | DP2 => DIGI_C, when HDMI3 | DP3 => DIGI_D, when Analog => VGA), when Ironlake => -- everything but eDP through FDI/PCH - (if Config.Internal_Is_EDP and then Port = Internal then + (if Port = eDP then DIGI_A else (case Pipe is -- FDIs are fixed to the CPU pipe @@ -47,7 +48,8 @@ when Tertiary => DIGI_D)), when others => -- everything but VGA directly on CPU (case Port is - when Internal => DIGI_A, -- LVDS not available + when LVDS => LVDS, -- n/a, actually + when eDP => DIGI_A, when HDMI1 | DP1 => DIGI_B, when HDMI2 | DP2 => DIGI_C, when HDMI3 | DP3 => DIGI_D, @@ -59,7 +61,8 @@ begin return (case Port is - when Internal => PCH_LVDS, -- will be ignored if Internal is DP + when LVDS => PCH_LVDS, + when eDP => PCH_LVDS, -- n/a, actually when Analog => PCH_DAC, when HDMI1 => PCH_HDMI_B, when HDMI2 => PCH_HDMI_C, @@ -74,7 +77,8 @@ begin return Display_Type' (case Port is - when Internal => Config.Internal_Display, + when LVDS => LVDS, + when eDP => DP, when Analog => VGA, when HDMI1 .. HDMI3 => HDMI, when DP1 .. DP3 => DP); diff --git a/common/hw-gfx-gma-display_probing.adb b/common/hw-gfx-gma-display_probing.adb index 0d7cd37..df88492 100644 --- a/common/hw-gfx-gma-display_probing.adb +++ b/common/hw-gfx-gma-display_probing.adb @@ -76,7 +76,7 @@ declare DP_Port : constant GMA.DP_Port := (case Port is - when Internal => DP_A, + when eDP => DP_A, when DP1 => DP_B, when DP2 => DP_C, when DP3 => DP_D, @@ -118,7 +118,7 @@ Success := Config.Valid_Port (Port); if Success then - if Port = Internal then + if Port in Internal_Port_Type then Panel.Wait_On; end if; Read_EDID (Raw_EDID, Port, Success); @@ -176,7 +176,7 @@ -- Turn panel on early to probe other ports during the power on delay. for Idx in Port_List_Range loop exit when Ports (Idx) = Disabled; - if Ports (Idx) = Internal then + if Ports (Idx) in Internal_Port_Type then Panel.On (Wait => False); Probe_Internal := True; exit; @@ -211,7 +211,9 @@ end if; -- Turn panel power off if probing failed. - if Probe_Internal and not Port_Configured (Configs, Internal) then + if Probe_Internal and not + (Port_Configured (Configs, eDP) or Port_Configured (Configs, LVDS)) + then Panel.Off; end if; end Scan_Ports; diff --git a/common/hw-gfx-gma-display_probing.ads b/common/hw-gfx-gma-display_probing.ads index 5e8abe4..5dcdbd4 100644 --- a/common/hw-gfx-gma-display_probing.ads +++ b/common/hw-gfx-gma-display_probing.ads @@ -17,10 +17,10 @@ package HW.GFX.GMA.Display_Probing is - type Port_List_Range is range 0 .. 7; + type Port_List_Range is range 0 .. 8; type Port_List is array (Port_List_Range) of Port_Type; All_Ports : constant Port_List := - (DP1, DP2, DP3, HDMI1, HDMI2, HDMI3, Analog, Internal); + (DP1, DP2, DP3, HDMI1, HDMI2, HDMI3, Analog, LVDS, eDP); procedure Read_EDID (Raw_EDID : out EDID.Raw_EDID_Data; diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb index 0fe360d..d0f296e 100644 --- a/common/hw-gfx-gma.adb +++ b/common/hw-gfx-gma.adb @@ -57,7 +57,8 @@ type Port_Name_Array is array (Port_Type) of Port_Name; Port_Names : constant Port_Name_Array := (Disabled => "Disabled", - Internal => "Internal", + LVDS => "LVDS ", + eDP => "eDP ", DP1 => "DP1 ", DP2 => "DP2 ", DP3 => "DP3 ", @@ -178,7 +179,7 @@ ("Enabled port " & Port_Names (Pipe_Cfg.Port))); else Wait_For_HPD (Pipe_Cfg.Port) := True; - if Pipe_Cfg.Port = Internal then + if Pipe_Cfg.Port in Internal_Port_Type then Panel.Off; end if; end if; @@ -236,7 +237,7 @@ Cur_Config.Mode /= New_Config.Mode or else (Config.Use_PDW_For_EDP_Scaling and then - (Cur_Config.Port = Internal and + (Cur_Config.Port = eDP and Requires_Scaling (Cur_Config) /= Requires_Scaling (New_Config))) or else (Config.Has_GMCH_PFIT_CONTROL and then diff --git a/common/hw-gfx-gma.ads b/common/hw-gfx-gma.ads index bdc4704..fcd8804 100644 --- a/common/hw-gfx-gma.ads +++ b/common/hw-gfx-gma.ads @@ -51,7 +51,8 @@ type Port_Type is (Disabled, - Internal, + LVDS, + eDP, DP1, DP2, DP3, @@ -61,6 +62,7 @@ Analog); subtype Active_Port_Type is Port_Type range Port_Type'Succ (Disabled) .. Port_Type'Last; + subtype Internal_Port_Type is Port_Type range LVDS .. eDP; type Cursor_Mode is (No_Cursor, ARGB_Cursor); type Cursor_Size is (Cursor_64x64, Cursor_128x128, Cursor_256x256); diff --git a/common/ironlake/hw-gfx-gma-port_detect.adb b/common/ironlake/hw-gfx-gma-port_detect.adb index 5af2e84..7efadeb 100644 --- a/common/ironlake/hw-gfx-gma-port_detect.adb +++ b/common/ironlake/hw-gfx-gma-port_detect.adb @@ -55,7 +55,8 @@ procedure Initialize is - Internal_Detected, + LVDS_Detected, + eDP_Detected, HDMI_Detected, DP_Detected : Boolean; @@ -71,23 +72,19 @@ begin Config.Valid_Port (Analog) := True; - case Config.Internal_Display is - when LVDS => - -- PCH_LVDS - Registers.Is_Set_Mask - (Register => Registers.PCH_LVDS, - Mask => PCH_LVDS_PORT_DETECTED, - Result => Internal_Detected); - when DP => - -- eDP - Registers.Is_Set_Mask - (Register => Registers.DP_CTL_A, - Mask => DP_PORT_DETECTED, - Result => Internal_Detected); - when None => - Internal_Detected := False; - end case; - Config.Valid_Port (Internal) := Internal_Detected; + -- PCH_LVDS + Registers.Is_Set_Mask + (Register => Registers.PCH_LVDS, + Mask => PCH_LVDS_PORT_DETECTED, + Result => LVDS_Detected); + Config.Valid_Port (LVDS) := LVDS_Detected; + + -- eDP + Registers.Is_Set_Mask + (Register => Registers.DP_CTL_A, + Mask => DP_PORT_DETECTED, + Result => eDP_Detected); + Config.Valid_Port (eDP) := eDP_Detected; -- PCH_HDMI_[BCD], PCH_DP_[BCD] share hotplug registers for PCH_Port in PCH_HDMI_Port loop diff --git a/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb b/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb index 42aabbd..9bc5544 100644 --- a/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb +++ b/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb @@ -42,7 +42,7 @@ PCH_DREF_CONTROL_120MHZ_SSC_MODULATION_EN); Registers.Posting_Read (Registers.PCH_DREF_CONTROL); Time.U_Delay (1); - if Config.Internal_Is_EDP then -- TODO: check for presence + if Config.Valid_Port (eDP) then -- always use spread spectrum clock for CPU output Registers.Set_Mask (Register => Registers.PCH_DREF_CONTROL, diff --git a/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb b/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb index e8087ed..93d8d18 100644 --- a/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb +++ b/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb @@ -178,9 +178,9 @@ is begin return (case PD is - when DDI_AE => Configs (Primary).Port = Internal or - Configs (Secondary).Port = Internal or - Configs (Tertiary).Port = Internal, + when DDI_AE => Configs (Primary).Port = eDP or + Configs (Secondary).Port = eDP or + Configs (Tertiary).Port = eDP, when DDI_B => Configs (Primary).Port = HDMI1 or Configs (Primary).Port = DP1 or Configs (Secondary).Port = HDMI1 or @@ -200,7 +200,7 @@ Configs (Tertiary).Port = HDMI3 or Configs (Tertiary).Port = DP3, when PW2 => (Configs (Primary).Port /= Disabled and - Configs (Primary).Port /= Internal) or + Configs (Primary).Port /= eDP) or Configs (Secondary).Port /= Disabled or Configs (Tertiary).Port /= Disabled); end Need_PD; -- To view, visit https://review.coreboot.org/c/libgfxinit/+/38239 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Iadf3c11bd35d085cf47a961e800b0d96b79f62f5 Gerrit-Change-Number: 38239 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-MessageType: newchange

2 7

Change in coreboot[master]: [NOT FOR MERGE]: Demo adding near_reset_vector symbol
by Marshall Dawson (Code Review) 05 Mar '20

05 Mar '20

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36418 ) Change subject: [NOT FOR MERGE]: Demo adding near_reset_vector symbol ...................................................................... [NOT FOR MERGE]: Demo adding near_reset_vector symbol In https://review.coreboot.org/c/coreboot/+/35035/8/src/arch/x86/early_dram.ld we had a discussion about whether an approach like for RESET_VECTOR_IN_RAM could potentially be used for a bootblock that needed to grow >64KB (to keep the first 16-bit jmp within reach). This is a mockup of the test I ran to verify that would be practical. Using this code I built a google/grunt and recorded the following with readelf. Section Headers: [Nr] Name Type Addr Off Size ES Flg Lk Inf Al [ 0] NULL 00000000 000000 000000 00 0 0 0 [ 1] .text PROGBITS ffff0000 000060 0059d0 00 AX 0 0 32 [ 2] .rel.text REL 00000000 01335c 001378 08 I 10 1 4 [ 3] .car.data NOBITS 00030000 000000 005860 00 WA 0 0 4 [ 4] .near_reset_vecto PROGBITS fffffe00 00fe60 0000bb 00 AX 0 0 4 [ 5] .rel.near_reset_v REL 00000000 0146d4 000040 08 I 10 4 4 [ 6] .reset PROGBITS fffffff0 010050 000010 00 AX 0 0 1 [ 7] .rel.reset REL 00000000 014714 000008 08 I 10 6 4 [ 8] .id PROGBITS ffffff4a 00ffaa 000036 00 A 0 0 1 [ 9] .gnu_debuglink PROGBITS 00000000 010060 000014 00 0 0 4 [10] .symtab SYMTAB 00000000 010074 001a80 10 11 243 4 [11] .strtab STRTAB 00000000 011af4 001868 00 0 0 1 [12] .shstrtab STRTAB 00000000 01471c 000064 00 0 0 1 Note, however, that I did not grow the bootblock.elf file; only inserted the section and relocated the _start16bit code. fffffe00 <_start16bit>: fffffe00: fa cli fffffe01: 66 89 c5 mov %ax,%bp fffffe04: b0 01 mov $0x1,%al fffffe06: e6 80 out %al,$0x80 fffffe08: 66 31 c0 xor %ax,%ax fffffe0b: 0f 22 d8 mov %eax,%cr3 fffffe0e: 8c c8 mov %cs,%eax fffffe10: c1 e0 04 shl $0x4,%eax fffffe13: bb 4c fe 29 c3 mov $0xc329fe4c,%ebx fffffe18: 2e 0f 01 1f lidtl %cs:(%edi) fffffe1c: bb 44 fe 29 c3 mov $0xc329fe44,%ebx fffffe21: 2e 66 0f 01 17 lgdtw %cs:(%edi) fffffe26: 0f 20 c0 mov %cr0,%eax fffffe29: 66 25 d1 ff and $0xffd1,%ax fffffe2d: fa cli fffffe2e: 7f 66 jg fffffe96 <__protected_start+0xb> fffffe30: 0d 01 00 00 60 or $0x60000001,%eax fffffe35: 0f 22 c0 mov %eax,%cr0 fffffe38: 66 89 e8 mov %bp,%ax fffffe3b: 66 ea 8b fe ff ff ljmpw $0xffff,$0xfe8b fffffe41: 08 00 or %al,(%eax) fffffe43: 90 nop Growing the elf should be reasonably straightforward. Right now reset16.ld has a built-in assumption of 64KB. For RESET_VECTOR_IN_RAM I've added a size symbol to Kconfig (yet to land still) for locating the reset vector and near_reset_vector at the very top, and so that the calculations are expected to match the instructions given to the PSP. Change-Id: I6e7888c778e1d1cc426e4160543f4a4662ebf834 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/cpu/x86/16bit/entry16.inc M src/cpu/x86/16bit/reset16.ld 2 files changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/36418/1 diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc index 9e00c55..6062abd 100644 --- a/src/cpu/x86/16bit/entry16.inc +++ b/src/cpu/x86/16bit/entry16.inc @@ -37,6 +37,9 @@ .align 4096 #endif .code16 + +.section ".near_reset_vector", "ax", %progbits + .globl _start16bit .type _start16bit, @function diff --git a/src/cpu/x86/16bit/reset16.ld b/src/cpu/x86/16bit/reset16.ld index c57cc96..31716e0 100644 --- a/src/cpu/x86/16bit/reset16.ld +++ b/src/cpu/x86/16bit/reset16.ld @@ -17,6 +17,14 @@ */ SECTIONS { + _ROMTOP = 0xfffffff0; + _NEAR_RESET_VECTOR = _ROMTOP + 0x10 - 0x200; + + . = _NEAR_RESET_VECTOR; + .near_reset_vector . : { + *(.near_reset_vector); + } + /* Trigger an error if I have an unuseable start address */ _bogus = ASSERT(_start16bit >= 0xffff0000, "_start16bit too low. Please report."); _ROMTOP = 0xfffffff0; -- To view, visit https://review.coreboot.org/c/coreboot/+/36418 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e7888c778e1d1cc426e4160543f4a4662ebf834 Gerrit-Change-Number: 36418 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newchange

4 28

Change in coreboot[master]: cpu/microcode: Fix config CPU_MICROCODE_CBFS_EXTERNAL_BINS
by Nico Huber (Code Review) 04 Mar '20

04 Mar '20

Hello Matt DeVillier, Patrick Georgi, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/39031 to review the following change. Change subject: cpu/microcode: Fix config CPU_MICROCODE_CBFS_EXTERNAL_BINS ...................................................................... cpu/microcode: Fix config CPU_MICROCODE_CBFS_EXTERNAL_BINS Make the variable override for CPU_MICROCODE_CBFS_EXTERNAL_BINS local to the target. Otherwise, `cpu_microcode_bin +=` lines that are evaluated after `src/cpu/Makefile.inc` still append to it. Change-Id: If81f307afc325ff3c1e987e9483ed5e45fdc403e Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/cpu/Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/39031/1 diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc index 0289be0..92e47aa 100644 --- a/src/cpu/Makefile.inc +++ b/src/cpu/Makefile.inc @@ -28,7 +28,7 @@ endif ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS),y) -cpu_microcode_bins := $(call strip_quotes,$(CONFIG_CPU_UCODE_BINARIES)) +$(obj)/cpu_microcode_blob.bin: cpu_microcode_bins := $(call strip_quotes,$(CONFIG_CPU_UCODE_BINARIES)) endif # otherwise `cpu_microcode_bins` should be filled by platform makefiles -- To view, visit https://review.coreboot.org/c/coreboot/+/39031 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If81f307afc325ff3c1e987e9483ed5e45fdc403e Gerrit-Change-Number: 39031 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

5 6

Change in coreboot[master]: soc/intel/cpu: Select NO_FIXED_XIP_ROM_SIZE
by Arthur Heymans (Code Review) 04 Mar '20

04 Mar '20

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36239 ) Change subject: soc/intel/cpu: Select NO_FIXED_XIP_ROM_SIZE ...................................................................... soc/intel/cpu: Select NO_FIXED_XIP_ROM_SIZE The cache as ram code will use one form of a non-eviction mode. Change-Id: I418eb48434aa3da3bf5ca65315bb8c9077523966 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/apollolake/Kconfig M src/soc/intel/cannonlake/Kconfig M src/soc/intel/common/block/cpu/Kconfig M src/soc/intel/skylake/Kconfig 4 files changed, 1 insertion(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/36239/1 diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index a1d3c07..ee473ba 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -48,7 +48,6 @@ select HAVE_SMI_HANDLER select MRC_SETTINGS_PROTECT select MRC_SETTINGS_VARIABLE_DATA - select NO_FIXED_XIP_ROM_SIZE select NO_XIP_EARLY_STAGES select PARALLEL_MP select PARALLEL_MP_AP_WORK diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index c1f53b1..12d9375 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -73,7 +73,6 @@ select INTEL_GMA_ADD_VBT if RUN_FSP_GOP select IOAPIC select MRC_SETTINGS_PROTECT - select NO_FIXED_XIP_ROM_SIZE select PARALLEL_MP select PARALLEL_MP_AP_WORK select PLATFORM_USES_FSP2_0 diff --git a/src/soc/intel/common/block/cpu/Kconfig b/src/soc/intel/common/block/cpu/Kconfig index 8cc572d..0882dd8 100644 --- a/src/soc/intel/common/block/cpu/Kconfig +++ b/src/soc/intel/common/block/cpu/Kconfig @@ -21,6 +21,7 @@ config SOC_INTEL_COMMON_BLOCK_CAR bool default n + select NO_FIXED_XIP_ROM_SIZE help This option allows you to select how cache-as-ram (CAR) is set up. diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 901e5f9..0e889cf 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -42,7 +42,6 @@ select INTEL_GMA_ACPI select IOAPIC select MRC_SETTINGS_PROTECT - select NO_FIXED_XIP_ROM_SIZE select PARALLEL_MP select PARALLEL_MP_AP_WORK select PCIEX_LENGTH_64MB -- To view, visit https://review.coreboot.org/c/coreboot/+/36239 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I418eb48434aa3da3bf5ca65315bb8c9077523966 Gerrit-Change-Number: 36239 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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