coreboot-gerrit November 2020

coreboot-gerrit@coreboot.org

1 participants
3243 discussions

Change in coreboot[master]: commonlib/storage: remove static from mmc speed change functions
by Bora Guvendik (Code Review) 10 Jun '23

10 Jun '23

Bora Guvendik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45984 ) Change subject: commonlib/storage: remove static from mmc speed change functions ...................................................................... commonlib/storage: remove static from mmc speed change functions Remove static from few mmc speed change functions so that they can be called by emmc dll tuning code. BUG=b:140124451 TEST=Boot to OS via emmc Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> Change-Id: If61345efb78a19dcaa2bcfe253dfe0ac4104bd10 --- M src/commonlib/include/commonlib/storage.h M src/commonlib/storage/mmc.c M src/commonlib/storage/sd_mmc.h 3 files changed, 13 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/45984/1 diff --git a/src/commonlib/include/commonlib/storage.h b/src/commonlib/include/commonlib/storage.h index a00b962..44e39fd 100644 --- a/src/commonlib/include/commonlib/storage.h +++ b/src/commonlib/include/commonlib/storage.h @@ -4,6 +4,7 @@ #define __COMMONLIB_STORAGE_H__ #include <commonlib/sd_mmc_ctrlr.h> +#include <stddef.h> /* * EXT_CSD fields @@ -132,4 +133,11 @@ void storage_display_setup(struct storage_media *media); +int sd_mmc_send_status(struct storage_media *media, ssize_t tries); +int mmc_select_hs(struct storage_media *media); +int mmc_select_ds(struct storage_media *media, int csd_timing_override); +int mmc_select_ddr50(struct storage_media *media); +int mmc_select_hs200(struct storage_media *media); +int mmc_select_hs400(struct storage_media *media); + #endif /* __COMMONLIB_STORAGE_H__ */ diff --git a/src/commonlib/storage/mmc.c b/src/commonlib/storage/mmc.c index a2bd067..2a4cb2b 100644 --- a/src/commonlib/storage/mmc.c +++ b/src/commonlib/storage/mmc.c @@ -161,7 +161,7 @@ SET_CLOCK(media->ctrlr, clock); } -static int mmc_select_hs(struct storage_media *media) +int mmc_select_hs(struct storage_media *media) { int ret; @@ -182,7 +182,7 @@ return ret; } -static int mmc_select_ddr50(struct storage_media *media) +int mmc_select_ddr50(struct storage_media *media) { int ret; @@ -209,7 +209,7 @@ return ret; } -static int mmc_select_ds(struct storage_media *media, int csd_timing_override) +int mmc_select_ds(struct storage_media *media, int csd_timing_override) { int ret; @@ -279,7 +279,7 @@ return -1; } -static int mmc_select_hs400(struct storage_media *media) +int mmc_select_hs400(struct storage_media *media) { uint8_t bus_width; uint32_t caps; @@ -328,7 +328,7 @@ return ret; } -static int mmc_select_hs200(struct storage_media *media) +int mmc_select_hs200(struct storage_media *media) { struct sd_mmc_ctrlr *ctrlr = media->ctrlr; int ret; diff --git a/src/commonlib/storage/sd_mmc.h b/src/commonlib/storage/sd_mmc.h index 9f6c077..2a3ea18 100644 --- a/src/commonlib/storage/sd_mmc.h +++ b/src/commonlib/storage/sd_mmc.h @@ -5,7 +5,6 @@ #include <commonlib/sd_mmc_ctrlr.h> #include <commonlib/storage.h> -#include <stddef.h> #include <console/console.h> #define SD_MMC_IO_RETRIES 1000 @@ -35,7 +34,6 @@ uint64_t sd_mmc_extract_uint32_bits(const uint32_t *array, int start, int count); int sd_mmc_go_idle(struct storage_media *media); -int sd_mmc_send_status(struct storage_media *media, ssize_t tries); int sd_mmc_set_blocklen(struct sd_mmc_ctrlr *ctrlr, int len); /* MMC support routines */ -- To view, visit https://review.coreboot.org/c/coreboot/+/45984 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If61345efb78a19dcaa2bcfe253dfe0ac4104bd10 Gerrit-Change-Number: 45984 Gerrit-PatchSet: 1 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-MessageType: newchange

2 3

Change in coreboot[master]: mb/google/dedede: Enable GPP_E5 for i2c-mux
by Evan Green (Code Review) 10 Jun '23

10 Jun '23

Evan Green has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46114 ) Change subject: mb/google/dedede: Enable GPP_E5 for i2c-mux ...................................................................... mb/google/dedede: Enable GPP_E5 for i2c-mux Waddledee is going to have an I2C mux controlled by a GPIO to separate cameras that both want the same I2C address. Enable this pin as an output so that it can control stuff. BUG=b:169444894 TEST=Test GPIO mux on reworked machine. Signed-off-by: Evan Green <evgreen(a)chromium.org> Change-Id: I12f2def0afec5873e72121ba8242b1160f99cfad --- M src/mainboard/google/dedede/variants/baseboard/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/46114/1 diff --git a/src/mainboard/google/dedede/variants/baseboard/gpio.c b/src/mainboard/google/dedede/variants/baseboard/gpio.c index 1d8d21d..352fe7b 100644 --- a/src/mainboard/google/dedede/variants/baseboard/gpio.c +++ b/src/mainboard/google/dedede/variants/baseboard/gpio.c @@ -200,7 +200,7 @@ /* E4 : IMGCLKOUT_2 */ PAD_NC(GPP_E4, NONE), /* E5 : AP_SUB_IO_2 */ - PAD_NC(GPP_E5, NONE), + PAD_CFG_GPO(GPP_E5, 0, PLTRST), /* E6 : GPP_E6/IMGCLKOUT_3 */ PAD_NC(GPP_E6, NONE), /* E7 : GPP_E7/SATA_1_DEVSLP */ -- To view, visit https://review.coreboot.org/c/coreboot/+/46114 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12f2def0afec5873e72121ba8242b1160f99cfad Gerrit-Change-Number: 46114 Gerrit-PatchSet: 1 Gerrit-Owner: Evan Green <evgreen(a)chromium.org> Gerrit-MessageType: newchange

2 1

Change in coreboot[master]: mb/asus/p2-99: add Asus P2-99 as a variant of Asus P2B
by Branden Waldner (Code Review) 10 Jun '23

10 Jun '23

Branden Waldner has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35530 ) Change subject: mb/asus/p2-99: add Asus P2-99 as a variant of Asus P2B ...................................................................... mb/asus/p2-99: add Asus P2-99 as a variant of Asus P2B Squash add Asus P2-99 as clone of Asus P2B and convert clone to variant Change-Id: I78bd3e215c9c35d272919850f52feac135d06ed8 --- M src/mainboard/asus/p2b/Kconfig M src/mainboard/asus/p2b/Kconfig.name 2 files changed, 11 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/35530/1 diff --git a/src/mainboard/asus/p2b/Kconfig b/src/mainboard/asus/p2b/Kconfig index f34b4dd..0c77779 100644 --- a/src/mainboard/asus/p2b/Kconfig +++ b/src/mainboard/asus/p2b/Kconfig @@ -12,7 +12,7 @@ ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## -if BOARD_ASUS_P2B +if BOARD_ASUS_P2B || BOARD_ASUS_P2_99 config BOARD_SPECIFIC_OPTIONS def_bool y @@ -28,12 +28,18 @@ string default asus/p2b +config VARIANT_DIR + string + default "p2-99" if BOARD_ASUS_P2_99 + default "p2b" if BOARD_ASUS_P2B + config MAINBOARD_PART_NUMBER string + default "P2-99" if BOARD_ASUS_P2_99 default "P2B" config IRQ_SLOT_COUNT int default 6 -endif # BOARD_ASUS_P2B +endif # BOARD_ASUS_P2B || BOARD_ASUS_P2_99 diff --git a/src/mainboard/asus/p2b/Kconfig.name b/src/mainboard/asus/p2b/Kconfig.name index 60d6028..a299a35 100644 --- a/src/mainboard/asus/p2b/Kconfig.name +++ b/src/mainboard/asus/p2b/Kconfig.name @@ -1,2 +1,5 @@ config BOARD_ASUS_P2B bool "P2B" + +config BOARD_ASUS_P2_99 + bool "P2-99" -- To view, visit https://review.coreboot.org/c/coreboot/+/35530 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78bd3e215c9c35d272919850f52feac135d06ed8 Gerrit-Change-Number: 35530 Gerrit-PatchSet: 1 Gerrit-Owner: Branden Waldner <scruffy99(a)gmail.com> Gerrit-MessageType: newchange

2 1

Change in coreboot[master]: helpers: add stringification macro
by Marty E. Plummer (Code Review) 10 Jun '23

10 Jun '23

Marty E. Plummer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46443 ) Change subject: helpers: add stringification macro ...................................................................... helpers: add stringification macro Change-Id: I25216be4041c4d485e16e362e22a75089f57f271 Signed-off-by: Marty E. Plummer <hanetzer(a)startmail.com> --- M src/commonlib/bsd/include/commonlib/bsd/helpers.h 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/46443/1 diff --git a/src/commonlib/bsd/include/commonlib/bsd/helpers.h b/src/commonlib/bsd/include/commonlib/bsd/helpers.h index 4e6ebee..4e80d25 100644 --- a/src/commonlib/bsd/include/commonlib/bsd/helpers.h +++ b/src/commonlib/bsd/include/commonlib/bsd/helpers.h @@ -8,6 +8,11 @@ #include <stddef.h> #endif +#if !defined(STR) && !defined(XSTR) +#define STR(x) XSTR(x) +#define XSTR(x) #x +#endif + #ifndef ARRAY_SIZE #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/46443 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I25216be4041c4d485e16e362e22a75089f57f271 Gerrit-Change-Number: 46443 Gerrit-PatchSet: 1 Gerrit-Owner: Marty E. Plummer <hanetzer(a)startmail.com> Gerrit-MessageType: newchange

3 4

Change in coreboot[master]: mb/clevo/l140cu: Remove duplicate Kconfig type definitions
by Felix Singer (Code Review) 10 Jun '23

10 Jun '23

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45637 ) Change subject: mb/clevo/l140cu: Remove duplicate Kconfig type definitions ...................................................................... mb/clevo/l140cu: Remove duplicate Kconfig type definitions Remove type definitions from Kconfig since these are already defined elsewhere. Change-Id: I39e5b27abdb17c1d72e316b92f7ee4c5cc1f5d97 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/clevo/l140cu/Kconfig 1 file changed, 0 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/45637/1 diff --git a/src/mainboard/clevo/l140cu/Kconfig b/src/mainboard/clevo/l140cu/Kconfig index 84d6530..5185087 100644 --- a/src/mainboard/clevo/l140cu/Kconfig +++ b/src/mainboard/clevo/l140cu/Kconfig @@ -22,59 +22,45 @@ select USE_LEGACY_8254_TIMER # Fix failure to boot GRUB config MAINBOARD_DIR - string default "clevo/l140cu" config MAINBOARD_PART_NUMBER - string default "L140CU" config MAINBOARD_SMBIOS_PRODUCT_NAME - string default "L140CU" config MAINBOARD_VERSION - string default "2.1A" config CBFS_SIZE - hex default 0xc00000 config CONSOLE_POST - bool default y config UART_FOR_CONSOLE - int default 2 config MAX_CPUS - int default 8 config DIMM_MAX - int default 2 config DIMM_SPD_SIZE - int default 512 config VGA_BIOS_FILE - string default "pci8086,9b41.rom" config VGA_BIOS_ID - string default "8086,9b41" config TPM_PIRQ - hex default 0x10 # GPP_A7/PIRQA# config POST_DEVICE - bool default n endif -- To view, visit https://review.coreboot.org/c/coreboot/+/45637 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I39e5b27abdb17c1d72e316b92f7ee4c5cc1f5d97 Gerrit-Change-Number: 45637 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

4 6

Change in coreboot[master]: mb/asus/f2a85-m_pro: Set Super I/O vendor firmware values in devicetree
by Paul Menzel (Code Review) 10 Jun '23

10 Jun '23

Paul Menzel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45999 ) Change subject: mb/asus/f2a85-m_pro: Set Super I/O vendor firmware values in devicetree ...................................................................... mb/asus/f2a85-m_pro: Set Super I/O vendor firmware values in devicetree Change-Id: I16f7026d6b151d8bbccb60665ec9e02005081419 Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> --- M src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb 1 file changed, 15 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/45999/1 diff --git a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb index c9de54c..8aa455d 100644 --- a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb +++ b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb @@ -48,7 +48,7 @@ io 0xe0 = 0x7f io 0xe1 = 0x10 io 0xe2 = 0x00 - io 0xe3 = 0x00 + io 0xe3 = 0x10 io 0xe4 = 0xff io 0xe5 = 0xff io 0xe6 = 0xff @@ -58,22 +58,22 @@ io 0xf4 = 0xff io 0xf5 = 0xff io 0xf6 = 0x00 - io 0xf7 = 0x00 + io 0xf7 = 0xff io 0xf8 = 0x00 end device pnp 2e.8 on # WDT1, GPIO0, GPIO1 - io 0x30 = 0x00 + io 0x30 = 0x02 io 0x60 = 0x00 io 0x61 = 0x00 io 0xe0 = 0xff - io 0xe1 = 0xff - io 0xe2 = 0xff - io 0xe3 = 0xff - io 0xe4 = 0xff + io 0xe1 = 0x80 + io 0xe2 = 0x00 + io 0xe3 = 0x80 + io 0xe4 = 0x00 io 0xf0 = 0xff io 0xf1 = 0x28 io 0xf2 = 0x00 - io 0xf3 = 0x00 + io 0xf3 = 0x28 io 0xf4 = 0x08 io 0xf5 = 0xff io 0xf6 = 0x00 @@ -84,12 +84,12 @@ io 0xe0 = 0xff io 0xe1 = 0x90 io 0xe2 = 0x00 - io 0xe3 = 0x00 + io 0xe3 = 0x90 io 0xe4 = 0x7f io 0xe5 = 0x76 io 0xe6 = 0x00 - io 0xe7 = 0x00 - io 0xe8 = 0x00 + io 0xe7 = 0x76 + io 0xe8 = 0x7b io 0xe9 = 0x00 io 0xea = 0x00 io 0xeb = 0x00 @@ -98,12 +98,13 @@ io 0xf1 = 0x7b io 0xf2 = 0x00 io 0xf4 = 0xff - io 0xf5 = 0xef + io 0xf5 = 0xff io 0xf6 = 0x00 - io 0xf7 = 0x00 + io 0xf7 = 0xff io 0xfe = 0x00 end device pnp 2e.a on # ACPI + io 0xe3 = 0x01 io 0xe6 = 0x4c io 0xe7 = 0x11 io 0xf2 = 0x5d @@ -121,7 +122,7 @@ io 0xe6 = 7f end device pnp 2e.14 off # PORT80 UART - io 0xe0 = 0x00 + io 0xe0 = 0x80 end device pnp 2e.16 off end # Deep Sleep end -- To view, visit https://review.coreboot.org/c/coreboot/+/45999 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I16f7026d6b151d8bbccb60665ec9e02005081419 Gerrit-Change-Number: 45999 Gerrit-PatchSet: 1 Gerrit-Owner: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: mb/google/zork/vilboz: Enable P sensor
by Peichao Li (Code Review) 10 Jun '23

10 Jun '23

Peichao Li has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43665 ) Change subject: mb/google/zork/vilboz: Enable P sensor ...................................................................... mb/google/zork/vilboz: Enable P sensor BUG=b:161759253 TEST=flash the BIOS and insure firmware node will be generate under the OS. Signed-off-by: Peichao.Wang <peichao.wang(a)bitland.corp-partner.google.com> Change-Id: I5e1a864bc156b434c39e8027fedf3a435757c1a7 --- M src/mainboard/google/zork/variants/vilboz/gpio.c M src/mainboard/google/zork/variants/vilboz/overridetree.cb 2 files changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/43665/1 diff --git a/src/mainboard/google/zork/variants/vilboz/gpio.c b/src/mainboard/google/zork/variants/vilboz/gpio.c index 4d292c2..29be3ae 100644 --- a/src/mainboard/google/zork/variants/vilboz/gpio.c +++ b/src/mainboard/google/zork/variants/vilboz/gpio.c @@ -9,6 +9,8 @@ static const struct soc_amd_gpio lte_gpio_set_stage_ram[] = { /* LTE POWER ENABLE */ PAD_GPO(GPIO_32, HIGH), + /* P sensor INT */ + PAD_SCI(GPIO_40, PULL_NONE, EDGE_LOW), }; diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb index 49d21d5..63d3f7d 100644 --- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb @@ -111,5 +111,12 @@ register "hid_desc_reg_offset" = "0x20" device i2c 2c on end end + chip drivers/i2c/generic + register "hid" = ""STH9324"" + register "name" = ""SEMTECH SX9324"" + register "desc" = ""SAR Proximity Sensor"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_40)" + device i2c 28 on end + end end end # chip soc/amd/picasso -- To view, visit https://review.coreboot.org/c/coreboot/+/43665 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5e1a864bc156b434c39e8027fedf3a435757c1a7 Gerrit-Change-Number: 43665 Gerrit-PatchSet: 1 Gerrit-Owner: Peichao Li <peichao.wang(a)bitland.corp-partner.google.com> Gerrit-MessageType: newchange

4 8

Change in coreboot[master]: mb/asus/a88xm-e/Kconfig: Remove `HUDSON_XHCI_ENABLE` override
by Paul Menzel (Code Review) 10 Jun '23

10 Jun '23

Paul Menzel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46365 ) Change subject: mb/asus/a88xm-e/Kconfig: Remove `HUDSON_XHCI_ENABLE` override ...................................................................... mb/asus/a88xm-e/Kconfig: Remove `HUDSON_XHCI_ENABLE` override Configuring this option here in the mainboard affects all boards. For example, for the Asus F2A85-M PRO, the default should be `y`, if the blobs repository is selected, but it is not selected. │ Symbol: HUDSON_XHCI_ENABLE [=n] │ │ Type : boolean │ │ Prompt: Enable Hudson XHCI Controller │ │ Location: │ │ -> Chipset │ │ Prompt: Enable Hudson XHCI Controller │ │ Location: │ │ -> Chipset │ │ Defined at src/mainboard/asus/a88xm-e/Kconfig:51 │ │ Depends on: VENDOR_ASUS [=y] && BOARD_ASUS_A88XM_E [=n] │ As this option is configurable under *Chipset*, use the same default for all boards and let the user choose. Board specific defaults only cause confusion. Change-Id: Iaeb27c42e97991f9389753856bd7deb3944e22d9 Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> --- M src/mainboard/asus/a88xm-e/Kconfig 1 file changed, 0 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/46365/1 diff --git a/src/mainboard/asus/a88xm-e/Kconfig b/src/mainboard/asus/a88xm-e/Kconfig index 17fbe28..622f1bd 100644 --- a/src/mainboard/asus/a88xm-e/Kconfig +++ b/src/mainboard/asus/a88xm-e/Kconfig @@ -48,10 +48,6 @@ string default "1002,990e" -config HUDSON_XHCI_ENABLE - bool - default n - config HUDSON_LEGACY_FREE bool default n -- To view, visit https://review.coreboot.org/c/coreboot/+/46365 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaeb27c42e97991f9389753856bd7deb3944e22d9 Gerrit-Change-Number: 46365 Gerrit-PatchSet: 1 Gerrit-Owner: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newchange

4 8

Change in coreboot[master]: drivers/uart: Fix control flow DEADCODE issue
by John Zhao (Code Review) 10 Jun '23

10 Jun '23

John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46506 ) Change subject: drivers/uart: Fix control flow DEADCODE issue ...................................................................... drivers/uart: Fix control flow DEADCODE issue Coverity detects the irq_gpio_index DEADCODE which is initialized as -1. This change updates irq_gpio_index based on irq_gpio.pin_count which differentiates gpio irq or pirq. Found-by: Coverity CID 1429983 TEST=None Signed-off-by: John Zhao <john.zhao(a)intel.com> Change-Id: I79f85f05b78e5569615ae4c4f7c81cc85c3999c9 --- M src/drivers/uart/acpi/acpi.c 1 file changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/46506/1 diff --git a/src/drivers/uart/acpi/acpi.c b/src/drivers/uart/acpi/acpi.c index f9d9d8f..df26f4e 100644 --- a/src/drivers/uart/acpi/acpi.c +++ b/src/drivers/uart/acpi/acpi.c @@ -73,8 +73,10 @@ acpi_device_write_uart(&config->uart); /* Use either Interrupt() or GpioInt() */ - if (config->irq_gpio.pin_count) + if (config->irq_gpio.pin_count) { acpi_device_write_gpio(&config->irq_gpio); + irq_gpio_index++; + } else acpi_device_write_interrupt(&config->irq); -- To view, visit https://review.coreboot.org/c/coreboot/+/46506 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79f85f05b78e5569615ae4c4f7c81cc85c3999c9 Gerrit-Change-Number: 46506 Gerrit-PatchSet: 1 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-MessageType: newchange

6 13

Change in coreboot[master]: device/pci_device: Map big PCI bars above 4 GiB
by Patrick Rudolph (Code Review) 10 Jun '23

10 Jun '23

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46617 ) Change subject: device/pci_device: Map big PCI bars above 4 GiB ...................................................................... device/pci_device: Map big PCI bars above 4 GiB Map BARs bigger than 4GiB to memory space above 4GiB. FIXME: This should probably go into the resource allocator. Required for Nvidia NV100, which has a 32GiB BAR for accessing the VRAM. Change-Id: Ief34e5bc1c2133ba7380acc9468d4e1042e6e100 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/device/pci_device.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/46617/1 diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 3623c3b..36af0d9 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -178,6 +178,9 @@ /* 64bit limit. */ resource->limit = 0xffffffffffffffffULL; resource->flags |= IORESOURCE_PCI64; + + if (resource->size >= 0x100000000ULL) + resource->flags |= IORESOURCE_ABOVE_4G; } else { /* Invalid value. */ printk(BIOS_ERR, "Broken BAR with value %lx\n", attr); -- To view, visit https://review.coreboot.org/c/coreboot/+/46617 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ief34e5bc1c2133ba7380acc9468d4e1042e6e100 Gerrit-Change-Number: 46617 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

5 7

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit November 2020