coreboot-gerrit November 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/common/acpi: drop the southridge scope around PEPD
by Nico Huber (Code Review) 19 Nov '20

19 Nov '20

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47246 ) Change subject: soc/intel/common/acpi: drop the southridge scope around PEPD ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/47246 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icb7a40e476966a7aca36bee055ee71d181508b87 Gerrit-Change-Number: 47246 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Venkata Krishna Nimmagadda <Venkata.krishna.nimmagadda(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 19 Nov 2020 22:49:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/kontron: Add Kontron mAL10 COMe module support
by Angel Pons (Code Review) 19 Nov '20

19 Nov '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39133 ) Change subject: mb/kontron: Add Kontron mAL10 COMe module support ...................................................................... Patch Set 57: Code-Review+2 (3 comments) https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/Kconfig: https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 6: HAVE_ACPI_RESUME > Does this even work with the chosen MRC options? Ack https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/ramstage.c: https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 8: /* Configure GPIO */ : size_t num = 0; : const struct pad_config *gpio_table = get_gpio_table(&num); : gpio_configure_pads(gpio_table, num); > now inside a function carrier_gpio_configure() Perfect https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 31: PkgCStateLimit > added comment here in the patchset:57 […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/39133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea Gerrit-Change-Number: 39133 Gerrit-PatchSet: 57 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <anpetrov(a)fb.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 19 Nov 2020 22:33:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Maxim Polyakov <max.senia.poliak(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso: Add data fabric read helper function
by Marshall Dawson (Code Review) 19 Nov '20

19 Nov '20

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47726 ) Change subject: soc/amd/picasso: Add data fabric read helper function ...................................................................... Patch Set 2: (3 comments) https://review.coreboot.org/c/coreboot/+/47726/2/src/soc/amd/picasso/data_f… File src/soc/amd/picasso/data_fabric.c: https://review.coreboot.org/c/coreboot/+/47726/2/src/soc/amd/picasso/data_f… PS2, Line 180: * requested offset.*/ Remove leading asterisk and add space in front of */ to match the short multi-line style. https://doc.coreboot.org/coding_style.html#commenting https://review.coreboot.org/c/coreboot/+/47726/2/src/soc/amd/picasso/includ… File src/soc/amd/picasso/include/soc/data_fabric.h: https://review.coreboot.org/c/coreboot/+/47726/2/src/soc/amd/picasso/includ… PS2, Line 10: 0xFF Use lower case for hex numbers here, line 31, 37, etc. https://review.coreboot.org/c/coreboot/+/47726/2/src/soc/amd/picasso/includ… PS2, Line 28: #define D18F0_DRAM_HOLE_CTL 0x104 Unless I'm mistaken, lines 28-56 are unrelated to the "add data fabric helper". Can you split these definitions into their own patch? -- To view, visit https://review.coreboot.org/c/coreboot/+/47726 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If0dc72063fbb99efaeea3fccef16cc1b5b8526f1 Gerrit-Change-Number: 47726 Gerrit-PatchSet: 2 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Justin Frodsham <justin.frodsham(a)protonmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 19 Nov 2020 22:30:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/kontron: Add Kontron mAL10 COMe module support
by Maxim Polyakov (Code Review) 19 Nov '20

19 Nov '20

Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39133 ) Change subject: mb/kontron: Add Kontron mAL10 COMe module support ...................................................................... Patch Set 57: (9 comments) https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/Kconfig: https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 51: config MAINBOARD_SMBIOS_MANUFACTURER : string : default "Kontron" > Redundant? Yes, removed https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 55: config MAINBOARD_SMBIOS_PRODUCT_NAME : string : default "COMe-mAL10" > Redundant? Yes, removed https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 59: config INTEL_GMA_VBT_FILE : string : default "src/mainboard/$(MAINBOARDDIR)/data.vbt" > Please mention this is necessary to override default variants behavior: […] Removed https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/acpi/cpld.asl: https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 3: Device (CPLD) > Why is this not under kontron/kempld? Done in CB:47774 https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 13: 0x0A80 > This magic number matches that of bootblock. […] Done in CB:47774 https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/ramstage.c: https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 8: /* Configure GPIO */ : size_t num = 0; : const struct pad_config *gpio_table = get_gpio_table(&num); : gpio_configure_pads(gpio_table, num); > Isn't there another place to do this? now inside a function carrier_gpio_configure() https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 14: * CPU Power Management Configuration from AMI UEFI BIOS v112: : * [AMI BIOS] -> [Advanced] -> [Cpu Configuration] : * : * | EIST | [Enabled] | : * | Turbo Mode | [Enabled] | : * | Boot performance mode | [Max Performance] | : * | C-States | [Enabled] | : * | Enhanced C-states | [Enabled] | : * | Max Package C State | C0 | : * | Max Core C State | [Core C6] | : * | C-State Auto Demoti | [C1] | : * | C-State Un-demotion | [C1] | : * > Is this info here for any particular reason? added comment instead this https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 31: PkgCStateLimit > Why? added comment here in the patchset:57 /* * Attention! Do not change PkgCStateLimit! This causes spikes in the power * consumption of the SoC when the system comes out of power saving mode, and * voltage sagging at the output of DC-DC converters on the COMe module. In the * AMI BIOS Setup shows this parameter, but does not allow changing it. */ https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 32: MaxCoreCState > No enum for this either? I marked this as TODO I would like to move these paramters to devicetree.cb the same patch will add enum -- To view, visit https://review.coreboot.org/c/coreboot/+/39133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea Gerrit-Change-Number: 39133 Gerrit-PatchSet: 57 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <anpetrov(a)fb.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 19 Nov 2020 22:29:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/kontron: Add Kontron mAL10 COMe module support
by Maxim Polyakov (Code Review) 19 Nov '20

19 Nov '20

Hello Felix Singer, build bot (Jenkins), Patrick Georgi, Angel Pons, Andrey Petrov, Patrick Rudolph, Aaron Durbin, Lance Zhao, Nico Huber, Martin Roth, Werner Zeh, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39133 to look at the new patch set (#57). Change subject: mb/kontron: Add Kontron mAL10 COMe module support ...................................................................... mb/kontron: Add Kontron mAL10 COMe module support This patch adds support for the Kontron mAL10 COMe module with the Apollo Lake SoC together with Kontron T10-TNI carrierboard. Working: - UART console and I2C on Kontron kempld; - USB2/3 - Ethernet controller - eMMC - SATA - PCIe ports - IGD/DP - SMBus - HWM Not tested: - IGD/LVDS - SDIO TODO: - HDA (codec IDT 92HD73C1X5, currently disabled) Tested payloads: - SeaBIOS - Tianocore, UEFIPayload - without video, EFI-shell in console only Tested on COMe module with Intel Atom x5-E3940 processor (4 Core, 1.6/1.8GHz, 9.5W TDP). Xubuntu 18.04.2 was used as a bootable OS (5.0.0-32-generic linux kernel) Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M Documentation/mainboard/index.md A Documentation/mainboard/kontron/mal10.md A src/mainboard/kontron/mal10/Kconfig A src/mainboard/kontron/mal10/Kconfig.name A src/mainboard/kontron/mal10/Makefile.inc A src/mainboard/kontron/mal10/acpi/dptf.asl A src/mainboard/kontron/mal10/board_info.txt A src/mainboard/kontron/mal10/bootblock.c A src/mainboard/kontron/mal10/carriers/t10-tni/Makefile.inc A src/mainboard/kontron/mal10/carriers/t10-tni/board_info.txt A src/mainboard/kontron/mal10/carriers/t10-tni/gpio.c A src/mainboard/kontron/mal10/carriers/t10-tni/include/carrier/gpio.h A src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb A src/mainboard/kontron/mal10/cmos.default A src/mainboard/kontron/mal10/cmos.layout A src/mainboard/kontron/mal10/data.vbt A src/mainboard/kontron/mal10/dsdt.asl A src/mainboard/kontron/mal10/mal10.fmd A src/mainboard/kontron/mal10/ramstage.c A src/mainboard/kontron/mal10/romstage.c A src/mainboard/kontron/mal10/variants/mal10/Makefile.inc A src/mainboard/kontron/mal10/variants/mal10/board_info.txt A src/mainboard/kontron/mal10/variants/mal10/devicetree.cb A src/mainboard/kontron/mal10/variants/mal10/gma-mainboard.ads A src/mainboard/kontron/mal10/variants/mal10/gpio.c A src/mainboard/kontron/mal10/variants/mal10/include/variant/gpio.h 26 files changed, 954 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/39133/57 -- To view, visit https://review.coreboot.org/c/coreboot/+/39133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea Gerrit-Change-Number: 39133 Gerrit-PatchSet: 57 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <anpetrov(a)fb.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: include/device/pci_ids: add model number to ATI GPU and HDA controller
by Felix Held (Code Review) 19 Nov '20

19 Nov '20

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47702 ) Change subject: include/device/pci_ids: add model number to ATI GPU and HDA controller ...................................................................... include/device/pci_ids: add model number to ATI GPU and HDA controller Change-Id: I215058bcb0d53bfec974b8d3721cb4c998fcbee5 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/include/device/pci_ids.h 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/47702/1 diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index c8d0c9a..5095f11 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -477,8 +477,8 @@ #define PCI_DEVICE_ID_AMD_FAM17H_LPC 0x790E #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_GBE 0x1458 -#define PCI_DEVICE_ID_ATI_FAM17H_GPU 0x15D8 -#define PCI_DEVICE_ID_ATI_FAM17H_HDA0 0x15DE +#define PCI_DEVICE_ID_ATI_FAM17H_MODEL18H_GPU 0x15D8 +#define PCI_DEVICE_ID_ATI_FAM17H_MODEL18H_HDA0 0x15DE #define PCI_VENDOR_ID_VLSI 0x1004 #define PCI_DEVICE_ID_VLSI_82C592 0x0005 -- To view, visit https://review.coreboot.org/c/coreboot/+/47702 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I215058bcb0d53bfec974b8d3721cb4c998fcbee5 Gerrit-Change-Number: 47702 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: vendorcode/amd/cimx/sb800: Add parentheses
by Nico Huber (Code Review) 19 Nov '20

19 Nov '20

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/21018 ) Change subject: vendorcode/amd/cimx/sb800: Add parentheses ...................................................................... Patch Set 2: Code-Review+2 (1 comment) https://review.coreboot.org/c/coreboot/+/21018/2//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/21018/2//COMMIT_MSG@7 PS2, Line 7: Add parentheses Please update, e.g. `Clarify config check` -- To view, visit https://review.coreboot.org/c/coreboot/+/21018 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idfd5f784872a37794ee43c8ec0a936f7be68ad64 Gerrit-Change-Number: 21018 Gerrit-PatchSet: 2 Gerrit-Owner: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 19 Nov 2020 22:00:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in em100[master]: Catch SIGTERM in addition to SIGINT
by Stefan Reinauer (Code Review) 19 Nov '20

19 Nov '20

Stefan Reinauer has uploaded this change for review. ( https://review.coreboot.org/c/em100/+/47732 ) Change subject: Catch SIGTERM in addition to SIGINT ...................................................................... Catch SIGTERM in addition to SIGINT SIGINT catches CTRL-C. However, if a user will just terminate the em100 utility by running killall without any signal argument, e.g. $ killall em100 The utility will not leave the em100 utility in a good state and and it will stop working on consecutive calls. Hence catch SIGTERM as well, to make calls killall calls non-lethal. Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Change-Id: I1299fe197240c92ceda57fa3db90ef3b41278e1a --- M em100.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/em100 refs/changes/32/47732/1 diff --git a/em100.c b/em100.c index 09cc490..e72f181 100644 --- a/em100.c +++ b/em100.c @@ -941,7 +941,7 @@ /* Set up signal handler. This is used for two reasons: * 1) to create a way to cleanly exit trace mode. * 2) to make sure that the em100 is not left in an improper state - * when receiving SIGINT for other reasons during operation. In + * when receiving SIGINT/SIGTERM for other reasons during operation. In * this second case, we just ignore SIGINT until em100 naturally * terminates or receives a second signal. This is OK because the * utility is short-running in nature. @@ -950,6 +950,7 @@ signal_action.sa_flags = 0; sigemptyset(&signal_action.sa_mask); sigaction(SIGINT, &signal_action, NULL); + sigaction(SIGTERM, &signal_action, NULL); if (em100->hwversion == HWVERSION_EM100PRO || em100->hwversion == HWVERSION_EM100PRO_EARLY) { printf("MCU version: %d.%02d\n", em100->mcu >> 8, em100->mcu & 0xff); -- To view, visit https://review.coreboot.org/c/em100/+/47732 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: em100 Gerrit-Branch: master Gerrit-Change-Id: I1299fe197240c92ceda57fa3db90ef3b41278e1a Gerrit-Change-Number: 47732 Gerrit-PatchSet: 1 Gerrit-Owner: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: vendorcode/amd/cimx/sb800: Add parentheses
by Paul Menzel (Code Review) 19 Nov '20

19 Nov '20

Hello Marc Jones, build bot (Jenkins), Nico Huber, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/21018 to look at the new patch set (#2). Change subject: vendorcode/amd/cimx/sb800: Add parentheses ...................................................................... vendorcode/amd/cimx/sb800: Add parentheses Clang 4.0.1 shows the error below. CC romstage/vendorcode/amd/cimx/sb800/GEC.o src/vendorcode/amd/cimx/sb800/GEC.c:140:8: error: logical not is only applied to the left hand side of this comparison [-Werror,-Wlogical-not-parentheses] if ( !pConfig->GecConfig == 0) { ^ ~~ Instead of adding the parentheses, use `!=`. Change-Id: Idfd5f784872a37794ee43c8ec0a936f7be68ad64 Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> --- M src/vendorcode/amd/cimx/sb800/GEC.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/21018/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/21018 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idfd5f784872a37794ee43c8ec0a936f7be68ad64 Gerrit-Change-Number: 21018 Gerrit-PatchSet: 2 Gerrit-Owner: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/zork: Set GPIO 86 high on boot
by Martin Roth (Code Review) 19 Nov '20

19 Nov '20

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47673 ) Change subject: mb/google/zork: Set GPIO 86 high on boot ...................................................................... mb/google/zork: Set GPIO 86 high on boot GPIO 86 should be set high on boot to save power. BUG=b:173340497 TEST=Build only BRANCH=Zork Signed-off-by: Martin Roth <martinroth(a)chromium.org> Change-Id: I31ef1d2a1967d82ba5370462783a909417088d2f --- M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/47673/1 diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index e43ccdd..884862d 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -97,8 +97,8 @@ PAD_GPI(GPIO_84, PULL_NONE), /* APU_EDP_BL_DISABLE TODP: Set low in depthcharge */ PAD_GPO(GPIO_85, HIGH), - /* RAM ID 2 */ - PAD_GPI(GPIO_86, PULL_NONE), + /* RAM ID 2 - Keep High */ + PAD_GPO(GPIO_86, HIGH), /* EMMC_DATA7 */ PAD_NF(GPIO_87, EMMC_DATA7, PULL_NONE), /* EMMC_DATA5 */ -- To view, visit https://review.coreboot.org/c/coreboot/+/47673 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31ef1d2a1967d82ba5370462783a909417088d2f Gerrit-Change-Number: 47673 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

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coreboot-gerrit November 2020