coreboot-gerrit November 2020

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Change in coreboot[master]: sb/intel/lynxpoint: Replace hard-coded IDs with defines
by Felix Singer (Code Review) 23 Nov '20

23 Nov '20

Hello build bot (Jenkins), Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/47808 to look at the new patch set (#10). Change subject: sb/intel/lynxpoint: Replace hard-coded IDs with defines ...................................................................... sb/intel/lynxpoint: Replace hard-coded IDs with defines Replace hard-coded IDs with defines introduced in CB:47807. Used documents: - 328904-003 - 329003-003 Built lenovo/t440p with BUILD_TIMELESS=1, coreboot.rom remains identical. Change-Id: I910ab356dd8728c316018989bfb2689d4c67c2dc Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/southbridge/intel/lynxpoint/azalia.c M src/southbridge/intel/lynxpoint/lpc.c M src/southbridge/intel/lynxpoint/me_9.x.c M src/southbridge/intel/lynxpoint/pcie.c M src/southbridge/intel/lynxpoint/sata.c M src/southbridge/intel/lynxpoint/serialio.c M src/southbridge/intel/lynxpoint/smbus.c M src/southbridge/intel/lynxpoint/usb_ehci.c M src/southbridge/intel/lynxpoint/usb_xhci.c 9 files changed, 79 insertions(+), 43 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/47808/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/47808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I910ab356dd8728c316018989bfb2689d4c67c2dc Gerrit-Change-Number: 47808 Gerrit-PatchSet: 10 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: include/device/pci_ids.h: Add PCI IDs used in Lynxpoint chipsets
by Felix Singer (Code Review) 23 Nov '20

23 Nov '20

Hello build bot (Jenkins), Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/47807 to look at the new patch set (#6). Change subject: include/device/pci_ids.h: Add PCI IDs used in Lynxpoint chipsets ...................................................................... include/device/pci_ids.h: Add PCI IDs used in Lynxpoint chipsets Used documents: - 328904-003 - 329003-003 Change-Id: I95790cda6f7c42a9de57bf5e92eb829ee1807dbe Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/include/device/pci_ids.h 1 file changed, 55 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/47807/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/47807 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I95790cda6f7c42a9de57bf5e92eb829ee1807dbe Gerrit-Change-Number: 47807 Gerrit-PatchSet: 6 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: include/device/pci_ids.h: Add PCI IDs used in Lynxpoint chipsets
by Felix Singer (Code Review) 23 Nov '20

23 Nov '20

Hello build bot (Jenkins), Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/47807 to look at the new patch set (#5). Change subject: include/device/pci_ids.h: Add PCI IDs used in Lynxpoint chipsets ...................................................................... include/device/pci_ids.h: Add PCI IDs used in Lynxpoint chipsets Used documents: - 328904-003 - 329003-003 Change-Id: I95790cda6f7c42a9de57bf5e92eb829ee1807dbe Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/include/device/pci_ids.h M src/southbridge/intel/lynxpoint/azalia.c M src/southbridge/intel/lynxpoint/lpc.c M src/southbridge/intel/lynxpoint/me_9.x.c M src/southbridge/intel/lynxpoint/pcie.c M src/southbridge/intel/lynxpoint/sata.c M src/southbridge/intel/lynxpoint/serialio.c M src/southbridge/intel/lynxpoint/smbus.c M src/southbridge/intel/lynxpoint/usb_ehci.c M src/southbridge/intel/lynxpoint/usb_xhci.c 10 files changed, 134 insertions(+), 43 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/47807/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/47807 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I95790cda6f7c42a9de57bf5e92eb829ee1807dbe Gerrit-Change-Number: 47807 Gerrit-PatchSet: 5 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: sb/intel/lynxpoint: Replace hard-coded IDs with defines
by Angel Pons (Code Review) 23 Nov '20

23 Nov '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47808 ) Change subject: sb/intel/lynxpoint: Replace hard-coded IDs with defines ...................................................................... Patch Set 9: Code-Review+1 (1 comment) Much better. Thanks! https://review.coreboot.org/c/coreboot/+/47808/9/src/southbridge/intel/lynx… File src/southbridge/intel/lynxpoint/smbus.c: https://review.coreboot.org/c/coreboot/+/47808/9/src/southbridge/intel/lynx… PS9, Line 83: 0x1c22, : 0x1e22, CB:47816 was merged, so a manual rebase is needed here -- To view, visit https://review.coreboot.org/c/coreboot/+/47808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I910ab356dd8728c316018989bfb2689d4c67c2dc Gerrit-Change-Number: 47808 Gerrit-PatchSet: 9 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 23 Nov 2020 18:01:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: sb/intel/lynxpoint: Replace hard-coded IDs with defines
by Felix Singer (Code Review) 23 Nov '20

23 Nov '20

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47808 ) Change subject: sb/intel/lynxpoint: Replace hard-coded IDs with defines ...................................................................... Patch Set 9: (1 comment) https://review.coreboot.org/c/coreboot/+/47808/5/src/southbridge/intel/lynx… File src/southbridge/intel/lynxpoint/azalia.c: https://review.coreboot.org/c/coreboot/+/47808/5/src/southbridge/intel/lynx… PS5, Line 136: /* 0x8c20 */ > So, if these numbers are meaningless, please don't put comments with them. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/47808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I910ab356dd8728c316018989bfb2689d4c67c2dc Gerrit-Change-Number: 47808 Gerrit-PatchSet: 9 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 23 Nov 2020 17:55:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: sb/intel/lynxpoint: Replace hard-coded IDs with defines
by Felix Singer (Code Review) 23 Nov '20

23 Nov '20

Hello build bot (Jenkins), Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/47808 to look at the new patch set (#9). Change subject: sb/intel/lynxpoint: Replace hard-coded IDs with defines ...................................................................... sb/intel/lynxpoint: Replace hard-coded IDs with defines Replace hard-coded IDs with defines introduced in CB:47807. Used documents: - 328904-003 - 329003-003 Built lenovo/t440p with BUILD_TIMELESS=1, coreboot.rom remains identical. Change-Id: I910ab356dd8728c316018989bfb2689d4c67c2dc Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/southbridge/intel/lynxpoint/azalia.c M src/southbridge/intel/lynxpoint/lpc.c M src/southbridge/intel/lynxpoint/me_9.x.c M src/southbridge/intel/lynxpoint/pcie.c M src/southbridge/intel/lynxpoint/sata.c M src/southbridge/intel/lynxpoint/serialio.c M src/southbridge/intel/lynxpoint/smbus.c M src/southbridge/intel/lynxpoint/usb_ehci.c M src/southbridge/intel/lynxpoint/usb_xhci.c 9 files changed, 81 insertions(+), 43 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/47808/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/47808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I910ab356dd8728c316018989bfb2689d4c67c2dc Gerrit-Change-Number: 47808 Gerrit-PatchSet: 9 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: sb/intel/lynxpoint: Replace hard-coded IDs with defines
by Angel Pons (Code Review) 23 Nov '20

23 Nov '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47808 ) Change subject: sb/intel/lynxpoint: Replace hard-coded IDs with defines ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/c/coreboot/+/47808/5/src/southbridge/intel/lynx… File src/southbridge/intel/lynxpoint/azalia.c: https://review.coreboot.org/c/coreboot/+/47808/5/src/southbridge/intel/lynx… PS5, Line 136: /* 0x8c20 */ > It might be useful to keep the IDs as comments, I don't know. I don't have a strong opinion on that. […] So, if these numbers are meaningless, please don't put comments with them. -- To view, visit https://review.coreboot.org/c/coreboot/+/47808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I910ab356dd8728c316018989bfb2689d4c67c2dc Gerrit-Change-Number: 47808 Gerrit-PatchSet: 8 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 23 Nov 2020 17:06:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: brya
by Tim Wawrzynczak (Code Review) 23 Nov '20

23 Nov '20

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47819 ) Change subject: brya ...................................................................... brya Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: Ia34130ff92a0a07063cb8e80527204b3a80184a0 --- A src/mainboard/google/brya/Kconfig A src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/board_info.txt A src/mainboard/google/brya/bootblock.c A src/mainboard/google/brya/chromeos.fmd A src/mainboard/google/brya/dsdt.asl A src/mainboard/google/brya/variants/baseboard/devicetree.cb 7 files changed, 68 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/47819/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig new file mode 100644 index 0000000..745a61d --- /dev/null +++ b/src/mainboard/google/brya/Kconfig @@ -0,0 +1,29 @@ +config BOARD_GOOGLE_BASEBOARD_BRYA + def_bool n + select BOARD_ROMSIZE_KB_32768 + select HAVE_ACPI_TABLES + select SOC_INTEL_ALDERLAKE + +if BOARD_GOOGLE_BASEBOARD_BRYA + +config BASEBOARD_BRYA_LAPTOP + def_bool n + select SYSTEM_TYPE_LAPTOP + +config DEVICETREE + string + default "variants/baseboard/devicetree.cb" + +config MAINBOARD_DIR + string + default "google/brya" + +config MAINBOARD_FAMILY + string + default "Google_Brya" if BOARD_GOOGLE_BRYA0 + +config MAINBOARD_PART_NUMBER + string + default "brya" if BOARD_GOOGLE_BRYA0 + +endif # BOARD_GOOGLE_BASEBOARD_BRYA diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name new file mode 100644 index 0000000..db2252a --- /dev/null +++ b/src/mainboard/google/brya/Kconfig.name @@ -0,0 +1,4 @@ +config BOARD_GOOGLE_BRYA0 + bool "Brya 0" + select BOARD_GOOGLE_BASEBOARD_BRYA + select BASEBOARD_BRYA_LAPTOP diff --git a/src/mainboard/google/brya/board_info.txt b/src/mainboard/google/brya/board_info.txt new file mode 100644 index 0000000..dad16fa --- /dev/null +++ b/src/mainboard/google/brya/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Google +Board name: Brya +Category: laptop +ROM protocol: SPI +ROM socketed: n +Flashrom support: y diff --git a/src/mainboard/google/brya/bootblock.c b/src/mainboard/google/brya/bootblock.c new file mode 100644 index 0000000..95f7497 --- /dev/null +++ b/src/mainboard/google/brya/bootblock.c @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <bootblock_common.h> + +void bootblock_mainboard_init(void) +{ + variant_configure_early_gpio_pads(); +} diff --git a/src/mainboard/google/brya/chromeos.fmd b/src/mainboard/google/brya/chromeos.fmd new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/mainboard/google/brya/chromeos.fmd diff --git a/src/mainboard/google/brya/dsdt.asl b/src/mainboard/google/brya/dsdt.asl new file mode 100644 index 0000000..10d08e2 --- /dev/null +++ b/src/mainboard/google/brya/dsdt.asl @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <acpi/acpi.h> + +DefinitionBlock( + "dsdt.aml", + "DSDT", + ACPI_DSDT_REV_2, + OEM_ID, + ACPI_TABLE_CREATOR, + 0x20110725 // OEM revision +) +{ +} diff --git a/src/mainboard/google/brya/variants/baseboard/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/devicetree.cb new file mode 100644 index 0000000..fbd7d72 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/devicetree.cb @@ -0,0 +1,5 @@ +chip soc/intel/alderlake + device cpu_cluster 0 on + device lapic 0 on end + end +end -- To view, visit https://review.coreboot.org/c/coreboot/+/47819 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia34130ff92a0a07063cb8e80527204b3a80184a0 Gerrit-Change-Number: 47819 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: nb/amd/agesa/family15tn: Add the audio device to the PCI devices
by Mike Banon (Code Review) 23 Nov '20

23 Nov '20

Mike Banon has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46589 ) Change subject: nb/amd/agesa/family15tn: Add the audio device to the PCI devices ...................................................................... nb/amd/agesa/family15tn: Add the audio device to the PCI devices Following the example of CB:7630 done for family16kb boards. Signed-off-by: Mike Banon <mikebdp2(a)gmail.com> Change-Id: Ic48c7475ceadb60f825ca9e3c3427c8a7525a266 --- M src/northbridge/amd/agesa/family15tn/pci_devs.h 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/46589/1 diff --git a/src/northbridge/amd/agesa/family15tn/pci_devs.h b/src/northbridge/amd/agesa/family15tn/pci_devs.h index ea79970..45ef546 100644 --- a/src/northbridge/amd/agesa/family15tn/pci_devs.h +++ b/src/northbridge/amd/agesa/family15tn/pci_devs.h @@ -12,6 +12,10 @@ #define GFX_FUNC 0 #define GFX_DEVFN PCI_DEVFN(GFX_DEV,GFX_FUNC) +/* Internal Audio Controller */ +#define ACTL_FUNC 1 +#define ACTL_DEVFN PCI_DEVFN(GFX_DEV,ACTL_FUNC) + /* PCIe Ports */ #define NB_PCIE_PORT1_DEV 0x2 #define NB_PCIE_PORT2_DEV 0x3 -- To view, visit https://review.coreboot.org/c/coreboot/+/46589 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic48c7475ceadb60f825ca9e3c3427c8a7525a266 Gerrit-Change-Number: 46589 Gerrit-PatchSet: 1 Gerrit-Owner: Mike Banon <mikebdp2(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/zork: correct USB2 phy TXVREFTUNE0 parameter name
by Kevin Chiu (Code Review) 23 Nov '20

23 Nov '20

Hello Kevin Chiu, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/47735 to review the following change. Change subject: mb/google/zork: correct USB2 phy TXVREFTUNE0 parameter name ...................................................................... mb/google/zork: correct USB2 phy TXVREFTUNE0 parameter name From spec, [31:28] "HS DC Voltage Level Adjustment" is "TXVREFTUNE0". correct rx_vref_tune -> tx_vref_tune BUG=None BRANCH=zork TEST=emerge-zork coreboot Signed-off-by: Kevin Chiu <kevin.chiu(a)quantatw.com> Change-Id: I27003a952d8f8bdd8fe52af8a37010e23ee9cdfd --- M src/mainboard/amd/mandolin/variants/cereme/devicetree.cb M src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/woomax/overridetree.cb 8 files changed, 33 insertions(+), 33 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/47735/1 diff --git a/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb b/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb index 1553288..86ff51c 100644 --- a/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb +++ b/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb @@ -21,7 +21,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -34,7 +34,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -47,7 +47,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -60,7 +60,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -73,7 +73,7 @@ .tx_pre_emp_amp_tune = 0x02, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x5, + .tx_vref_tune = 0x5, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -86,7 +86,7 @@ .tx_pre_emp_amp_tune = 0x02, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x5, + .tx_vref_tune = 0x5, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" diff --git a/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb b/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb index 3de5812..15b4924 100644 --- a/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb +++ b/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb @@ -21,7 +21,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -34,7 +34,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -47,7 +47,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -60,7 +60,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -73,7 +73,7 @@ .tx_pre_emp_amp_tune = 0x02, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x5, + .tx_vref_tune = 0x5, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -86,7 +86,7 @@ .tx_pre_emp_amp_tune = 0x02, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x5, + .tx_vref_tune = 0x5, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index 9f5ef0c..0b64855 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -64,7 +64,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -77,7 +77,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -90,7 +90,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -103,7 +103,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -116,7 +116,7 @@ .tx_pre_emp_amp_tune = 0x02, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x5, + .tx_vref_tune = 0x5, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -129,7 +129,7 @@ .tx_pre_emp_amp_tune = 0x02, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x5, + .tx_vref_tune = 0x5, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index ffe2b7f..4181b4a 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -64,7 +64,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -77,7 +77,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -90,7 +90,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -103,7 +103,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, + .tx_vref_tune = 0x6, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -116,7 +116,7 @@ .tx_pre_emp_amp_tune = 0x02, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x5, + .tx_vref_tune = 0x5, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -129,7 +129,7 @@ .tx_pre_emp_amp_tune = 0x02, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x5, + .tx_vref_tune = 0x5, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" diff --git a/src/mainboard/google/zork/variants/berknip/overridetree.cb b/src/mainboard/google/zork/variants/berknip/overridetree.cb index 602b5c7..e9ec23c 100644 --- a/src/mainboard/google/zork/variants/berknip/overridetree.cb +++ b/src/mainboard/google/zork/variants/berknip/overridetree.cb @@ -29,7 +29,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0xf, + .tx_vref_tune = 0xf, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -41,7 +41,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0xf, + .tx_vref_tune = 0xf, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -53,7 +53,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0xf, + .tx_vref_tune = 0xf, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -65,7 +65,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0xf, + .tx_vref_tune = 0xf, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" diff --git a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb index 6f4a38e..b7fee39 100644 --- a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb +++ b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb @@ -37,7 +37,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x9, + .tx_vref_tune = 0x9, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -49,7 +49,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0x9, + .tx_vref_tune = 0x9, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" diff --git a/src/mainboard/google/zork/variants/morphius/overridetree.cb b/src/mainboard/google/zork/variants/morphius/overridetree.cb index 9d3b7ee..dbdf2e9 100644 --- a/src/mainboard/google/zork/variants/morphius/overridetree.cb +++ b/src/mainboard/google/zork/variants/morphius/overridetree.cb @@ -43,7 +43,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0xf, + .tx_vref_tune = 0xf, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" diff --git a/src/mainboard/google/zork/variants/woomax/overridetree.cb b/src/mainboard/google/zork/variants/woomax/overridetree.cb index abbdd92..e31b035 100644 --- a/src/mainboard/google/zork/variants/woomax/overridetree.cb +++ b/src/mainboard/google/zork/variants/woomax/overridetree.cb @@ -30,7 +30,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0xf, + .tx_vref_tune = 0xf, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" @@ -42,7 +42,7 @@ .tx_pre_emp_amp_tune = 0x03, .tx_pre_emp_pulse_tune = 0x0, .tx_rise_tune = 0x1, - .rx_vref_tune = 0xf, + .tx_vref_tune = 0xf, .tx_hsxv_tune = 0x3, .tx_res_tune = 0x01, }" -- To view, visit https://review.coreboot.org/c/coreboot/+/47735 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27003a952d8f8bdd8fe52af8a37010e23ee9cdfd Gerrit-Change-Number: 47735 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-MessageType: newchange

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coreboot-gerrit November 2020