coreboot-gerrit November 2020

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Change in coreboot[master]: mb/prodrive/hermes: Use C-style comments
by Angel Pons (Code Review) 30 Nov '20

30 Nov '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47957 ) Change subject: mb/prodrive/hermes: Use C-style comments ...................................................................... mb/prodrive/hermes: Use C-style comments Most of the existing comments are C-style already. Change-Id: I9ca4779f5b0560320e9bce4f33e54766522689f9 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/prodrive/hermes/eeprom.c M src/mainboard/prodrive/hermes/ramstage.c M src/mainboard/prodrive/hermes/romstage.c M src/mainboard/prodrive/hermes/variants/baseboard/gpio.c M src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h 5 files changed, 8 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/47957/1 diff --git a/src/mainboard/prodrive/hermes/eeprom.c b/src/mainboard/prodrive/hermes/eeprom.c index bd5db5c..94811f6 100644 --- a/src/mainboard/prodrive/hermes/eeprom.c +++ b/src/mainboard/prodrive/hermes/eeprom.c @@ -14,7 +14,7 @@ u8 blob[8] = {0}; if (!read_write_config(addr, blob, EEPROM_OFFSET_FSP_SIGNATURE, 0, ARRAY_SIZE(blob))) { - // Check Signature + /* Check signature */ if (*(uint64_t *)blob == FSP_UPD_SIGNATURE) { printk(BIOS_DEBUG, "CFG EEPROM: Signature valid.\n"); return 1; @@ -25,7 +25,7 @@ return 0; } -// Read data from offset and write it to offset in UPD +/* Read data from offset and write it to offset in UPD */ bool read_write_config(u8 addr, void *blob, size_t read_offset, size_t write_offset, size_t size) { @@ -52,7 +52,7 @@ if (ret < 0) break; - // Write to UPD + /* Write to UPD */ uint8_t *writePointer = (uint8_t *)blob + write_offset + i; if (size > 1 && (size % 2 == 0)) memcpy(writePointer, tmp, 2); diff --git a/src/mainboard/prodrive/hermes/ramstage.c b/src/mainboard/prodrive/hermes/ramstage.c index 18fc915..135d775 100644 --- a/src/mainboard/prodrive/hermes/ramstage.c +++ b/src/mainboard/prodrive/hermes/ramstage.c @@ -5,7 +5,7 @@ #include "variants/baseboard/include/eeprom.h" static fsp_params parmas_list[] = { - // FIXME: Fill with additional options + /* FIXME: Fill with additional options */ }; void mainboard_silicon_init_params(FSP_S_CONFIG *params) @@ -19,7 +19,7 @@ params->SataLedEnable = 1; - // Overwrite params + /* Overwrite params */ if (!check_signature(I2C_ADDR_EEPROM)) return; diff --git a/src/mainboard/prodrive/hermes/romstage.c b/src/mainboard/prodrive/hermes/romstage.c index a25c43a..2bcd27a 100644 --- a/src/mainboard/prodrive/hermes/romstage.c +++ b/src/mainboard/prodrive/hermes/romstage.c @@ -18,7 +18,7 @@ memupd->FspmConfig.IedSize = 0x400000; cannonlake_memcfg_init(&memupd->FspmConfig, variant_memcfg_config()); - // Overwrite memupd + /* Overwrite memupd */ if (!check_signature(I2C_ADDR_EEPROM)) return; diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/gpio.c b/src/mainboard/prodrive/hermes/variants/baseboard/gpio.c index 9c01d24..8735a9e 100644 --- a/src/mainboard/prodrive/hermes/variants/baseboard/gpio.c +++ b/src/mainboard/prodrive/hermes/variants/baseboard/gpio.c @@ -194,7 +194,7 @@ /* GPP_K20 - CPU_CATERR_PCH_n */ PAD_CFG_GPI(GPP_K20, NONE, DEEP), /* GPP_K21 - TPM_INT_n */ - PAD_CFG_GPI_INT(GPP_K21, NONE, DEEP, OFF), // Trigger? + PAD_CFG_GPI_INT(GPP_K21, NONE, DEEP, OFF), /* Trigger? */ /* GPP_K22 - NC */ PAD_NC(GPP_K22, NONE), /* GPP_K23 - NC */ diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h b/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h index c41ead2..79fda3c 100644 --- a/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h +++ b/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h @@ -21,7 +21,7 @@ #define EEPROM_OFFSET_FSP_CONFIG (EEPROM_OFFSET_FSP_SIGNATURE + sizeof(FSP_UPD_HEADER)) #define GET_VALUE(x) {.offset = offsetof(FSP_S_CONFIG, x), \ .size = member_size(FSP_S_CONFIG, x)} -#endif // ENV_ROMSTAGE +#endif /* ENV_ROMSTAGE */ typedef struct { size_t offset; -- To view, visit https://review.coreboot.org/c/coreboot/+/47957 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ca4779f5b0560320e9bce4f33e54766522689f9 Gerrit-Change-Number: 47957 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: Add support to print TME status.
by Pratikkumar V Prajapati (Code Review) 30 Nov '20

30 Nov '20

Pratikkumar V Prajapati has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45088 ) Change subject: Add support to print TME status. ...................................................................... Add support to print TME status. Print whether the SOC supports TME. If the SOC supports TME, print the status of enable and lock bit from TME_ACTIVATE MSR. Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com> Change-Id: I584ac4b045ba80998d454283e02d3f28ef45692d --- M util/inteltool/cpu.c M util/inteltool/inteltool.c M util/inteltool/inteltool.h 3 files changed, 60 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/45088/1 diff --git a/util/inteltool/cpu.c b/util/inteltool/cpu.c index 284e90b..e671cc4 100644 --- a/util/inteltool/cpu.c +++ b/util/inteltool/cpu.c @@ -22,6 +22,10 @@ #define MTRR_CAP_MSR 0xfe #define PRMRR_SUPPORTED (1 << 12) #define SGX_SUPPORTED (1 << 2) +#define IA32_TME_ACTIVATE 0x982 +#define TME_SUPPORTED (1 << 13) +#define TME_LOCKED (1) +#define TME_ENABLED (1 << 1) int fd_msr; @@ -212,6 +216,50 @@ return error; } +static int is_tme_supported() +{ + cpuid_result_t cpuid_regs; + + /* CPUID leaf 0x7 subleaf 0x0 to detect TME support + * https://software.intel.com/sites/default/files/managed/a5/16/Multi-Key + * -Total-Memory-Encryption-Spec.pdf */ + cpuid_regs = cpuid_ext(0x7, 0x0); + return (cpuid_regs.ecx & TME_SUPPORTED); +} + +static int is_tme_locked(int cpunum) +{ + msr_t data; + data = rdmsr_from_cpu(cpunum, IA32_TME_ACTIVATE); + return (data.lo & TME_LOCKED); +} + +static int is_tme_enabled(int cpunum) +{ + msr_t data; + data = rdmsr_from_cpu(cpunum, IA32_TME_ACTIVATE); + return (data.lo & TME_ENABLED); +} + +void print_tme(void) +{ +#ifndef __DARWIN__ + int tme_supported = is_tme_supported(); + + printf("\n============= Dumping INTEL TME status =============\n"); + + printf("TME supported : %s\n", tme_supported ? "YES" : "NO"); + + if (tme_supported) { + printf("TME locked : %s\n", is_tme_locked(0) ? "YES" : "NO"); + printf("TME enabled : %s\n", is_tme_enabled(0) ? "YES" : "NO"); + } + printf("====================================================\n"); +#else + printf("Not Implemented\n"); +#endif +} + int print_intel_core_msrs(void) { unsigned int i, core, id, core_num = get_number_of_cores(); diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index 91a8b7e0..e79d8ff 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -512,6 +512,7 @@ " -M | --msrs: dump CPU MSRs\n" " -A | --ambs: dump AMB registers\n" " -x | --sgx: dump SGX status\n" + " -t | --tme: dump TME status\n" " -a | --all: dump all known (safe) registers\n" " --pcr=PORT_ID: dump all registers of a PCR port\n" " (may be specified max %d times)\n" @@ -572,7 +573,7 @@ int dump_gpios = 0, dump_mchbar = 0, dump_rcba = 0; int dump_pmbase = 0, dump_epbar = 0, dump_dmibar = 0; int dump_pciexbar = 0, dump_coremsrs = 0, dump_ambs = 0; - int dump_spi = 0, dump_gfx = 0, dump_ahci = 0, dump_sgx = 0; + int dump_spi = 0, dump_gfx = 0, dump_ahci = 0, dump_sgx = 0, dump_tme = 0; int dump_lpc = 0; int show_gpio_diffs = 0; size_t pcr_count = 0; @@ -599,10 +600,11 @@ {"ahci", 0, 0, 'R'}, {"sgx", 0, 0, 'x'}, {"pcr", required_argument, 0, LONG_OPT_PCR}, + {"tme", 0, 0, 't'}, {0, 0, 0, 0} }; - while ((opt = getopt_long(argc, argv, "vh?gGrplmedPMaAsfRS:x", + while ((opt = getopt_long(argc, argv, "vh?gGrplmedPMaAsfRS:xt", long_options, &option_index)) != EOF) { switch (opt) { case 'v': @@ -664,6 +666,7 @@ dump_spi = 1; dump_ahci = 1; dump_sgx = 1; + dump_tme = 1; break; case 'A': dump_ambs = 1; @@ -674,6 +677,9 @@ case 'x': dump_sgx = 1; break; + case 't': + dump_tme = 1; + break; case LONG_OPT_PCR: if (pcr_count < MAX_PCR_PORTS) { errno = 0; @@ -866,6 +872,9 @@ if (dump_sgx) print_sgx(); + if (dump_tme) + print_tme(); + if (pcr_count) print_pcr_ports(sb, dump_pcr, pcr_count); diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index e7d32a3..55c6470 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -412,6 +412,7 @@ int print_gfx(struct pci_dev *gfx); int print_ahci(struct pci_dev *ahci); int print_sgx(void); +void print_tme(void); void ivybridge_dump_timings(const char *dump_spd_file); #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/45088 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I584ac4b045ba80998d454283e02d3f28ef45692d Gerrit-Change-Number: 45088 Gerrit-PatchSet: 1 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newchange

6 21

Change in coreboot[master]: soc/amd/common: add comments and FIXME to Makefile.inc files
by Felix Held (Code Review) 30 Nov '20

30 Nov '20

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47877 ) Change subject: soc/amd/common: add comments and FIXME to Makefile.inc files ...................................................................... soc/amd/common: add comments and FIXME to Makefile.inc files Change-Id: Ie347ee508acd900353467b4a3e0a5d1928b110e1 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/soc/amd/common/block/pci/Makefile.inc M src/soc/amd/common/block/pi/Makefile.inc M src/soc/amd/common/block/s3/Makefile.inc M src/soc/amd/common/block/smbus/Makefile.inc 4 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/47877/1 diff --git a/src/soc/amd/common/block/pci/Makefile.inc b/src/soc/amd/common/block/pci/Makefile.inc index baebb6c..1fed96e 100644 --- a/src/soc/amd/common/block/pci/Makefile.inc +++ b/src/soc/amd/common/block/pci/Makefile.inc @@ -1,6 +1,6 @@ - ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PCI) += amd_pci_util.c +# FIXME: This gets added when CONFIG_SOC_AMD_COMMON is set, which is a bit unexpected. bootblock-y += amd_pci_mmconf.c verstage_x86-y += amd_pci_mmconf.c romstage-y += amd_pci_mmconf.c diff --git a/src/soc/amd/common/block/pi/Makefile.inc b/src/soc/amd/common/block/pi/Makefile.inc index 5afbb3e..7b5d73a 100644 --- a/src/soc/amd/common/block/pi/Makefile.inc +++ b/src/soc/amd/common/block/pi/Makefile.inc @@ -14,4 +14,4 @@ ramstage-y += image.c ramstage-y += refcode_loader.c -endif +endif # CONFIG_SOC_AMD_COMMON_BLOCK_PI diff --git a/src/soc/amd/common/block/s3/Makefile.inc b/src/soc/amd/common/block/s3/Makefile.inc index 9efc6bc..03395ec 100644 --- a/src/soc/amd/common/block/s3/Makefile.inc +++ b/src/soc/amd/common/block/s3/Makefile.inc @@ -3,4 +3,4 @@ romstage-y += s3_resume.c ramstage-y += s3_resume.c -endif +endif # CONFIG_SOC_AMD_COMMON_BLOCK_S3 diff --git a/src/soc/amd/common/block/smbus/Makefile.inc b/src/soc/amd/common/block/smbus/Makefile.inc index cfc954e..b9c7f2a 100644 --- a/src/soc/amd/common/block/smbus/Makefile.inc +++ b/src/soc/amd/common/block/smbus/Makefile.inc @@ -4,4 +4,4 @@ ramstage-y += smbus.c ramstage-y += sm.c -endif +endif # CONFIG_SOC_AMD_COMMON_BLOCK_SMBUS -- To view, visit https://review.coreboot.org/c/coreboot/+/47877 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie347ee508acd900353467b4a3e0a5d1928b110e1 Gerrit-Change-Number: 47877 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: soc/amd/common: simplify conditionals in Makefiles
by Felix Held (Code Review) 30 Nov '20

30 Nov '20

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47876 ) Change subject: soc/amd/common: simplify conditionals in Makefiles ...................................................................... soc/amd/common: simplify conditionals in Makefiles If there are multiple statements that are conditional on the same Kconfig option, group them and move the condition check around the statement. If there's only one statement depending on one condition, use the short form instead. Change-Id: I89cb17954150c146ffc762d8cb2e3b3b374924de Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/soc/amd/common/block/acpi/Makefile.inc M src/soc/amd/common/block/acpimmio/Makefile.inc M src/soc/amd/common/block/alink/Makefile.inc M src/soc/amd/common/block/gpio_banks/Makefile.inc M src/soc/amd/common/block/lpc/Makefile.inc M src/soc/amd/common/block/psp/Makefile.inc M src/soc/amd/common/block/spi/Makefile.inc 7 files changed, 91 insertions(+), 60 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/47876/1 diff --git a/src/soc/amd/common/block/acpi/Makefile.inc b/src/soc/amd/common/block/acpi/Makefile.inc index f0b336d..10e522f 100644 --- a/src/soc/amd/common/block/acpi/Makefile.inc +++ b/src/soc/amd/common/block/acpi/Makefile.inc @@ -1,6 +1,10 @@ -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI) += acpi.c -verstage_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI) += acpi.c -romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI) += acpi.c -ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI) += acpi.c -postcar-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI) += acpi.c -smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI) += acpi.c +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI),y) + +bootblock-y += acpi.c +verstage_x86-y += acpi.c +romstage-y += acpi.c +ramstage-y += acpi.c +postcar-y += acpi.c +smm-y += acpi.c + +endif # CONFIG_SOC_AMD_COMMON_BLOCK_ACPI diff --git a/src/soc/amd/common/block/acpimmio/Makefile.inc b/src/soc/amd/common/block/acpimmio/Makefile.inc index 553d9e2..6b3e423 100644 --- a/src/soc/amd/common/block/acpimmio/Makefile.inc +++ b/src/soc/amd/common/block/acpimmio/Makefile.inc @@ -1,13 +1,17 @@ -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO) += mmio_util.c -verstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO) += mmio_util.c -romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO) += mmio_util.c -postcar-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO) += mmio_util.c -ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO) += mmio_util.c -smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO) += mmio_util.c +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO),y) -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO) += biosram.c -verstage_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO) += biosram.c -romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO) += biosram.c -postcar-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO) += biosram.c -ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO) += biosram.c -smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO) += biosram.c +bootblock-y += mmio_util.c +verstage-y += mmio_util.c +romstage-y += mmio_util.c +postcar-y += mmio_util.c +ramstage-y += mmio_util.c +smm-y += mmio_util.c + +bootblock-y += biosram.c +verstage_x86-y += biosram.c +romstage-y += biosram.c +postcar-y += biosram.c +ramstage-y += biosram.c +smm-y += biosram.c + +endif # CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO diff --git a/src/soc/amd/common/block/alink/Makefile.inc b/src/soc/amd/common/block/alink/Makefile.inc index 9d27aec..b393c3d 100644 --- a/src/soc/amd/common/block/alink/Makefile.inc +++ b/src/soc/amd/common/block/alink/Makefile.inc @@ -1,6 +1,10 @@ -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK) += alink.c -verstage_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK) += alink.c -romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK) += alink.c -postcar-$(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK) += alink.c -ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK) += alink.c -smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK) += alink.c +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK),y) + +bootblock-y += alink.c +verstage_x86-y += alink.c +romstage-y += alink.c +postcar-y += alink.c +ramstage-y += alink.c +smm-y += alink.c + +endif # CONFIG_SOC_AMD_COMMON_BLOCK_ALINK diff --git a/src/soc/amd/common/block/gpio_banks/Makefile.inc b/src/soc/amd/common/block/gpio_banks/Makefile.inc index f1555b1..5b738bd 100644 --- a/src/soc/amd/common/block/gpio_banks/Makefile.inc +++ b/src/soc/amd/common/block/gpio_banks/Makefile.inc @@ -1,6 +1,10 @@ -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_BANKED_GPIOS) += gpio.c -verstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_BANKED_GPIOS) += gpio.c -romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_BANKED_GPIOS) += gpio.c -postcar-$(CONFIG_SOC_AMD_COMMON_BLOCK_BANKED_GPIOS) += gpio.c -ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_BANKED_GPIOS) += gpio.c -smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_BANKED_GPIOS) += gpio.c +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_BANKED_GPIOS),y) + +bootblock-y += gpio.c +verstage-y += gpio.c +romstage-y += gpio.c +postcar-y += gpio.c +ramstage-y += gpio.c +smm-y += gpio.c + +endif # CONFIG_SOC_AMD_COMMON_BLOCK_BANKED_GPIOS diff --git a/src/soc/amd/common/block/lpc/Makefile.inc b/src/soc/amd/common/block/lpc/Makefile.inc index 7db176b..68e528f 100644 --- a/src/soc/amd/common/block/lpc/Makefile.inc +++ b/src/soc/amd/common/block/lpc/Makefile.inc @@ -1,13 +1,21 @@ -ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_LPC) += lpc.c +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC),y) -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_LPC) += lpc_util.c -verstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_LPC) += lpc_util.c -romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_LPC) += lpc_util.c -postcar-$(CONFIG_SOC_AMD_COMMON_BLOCK_LPC) += lpc_util.c -ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_LPC) += lpc_util.c -smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_LPC) += lpc_util.c +ramstage-y += lpc.c -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_USE_ESPI) += espi_util.c -romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_USE_ESPI) += espi_util.c -ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_USE_ESPI) += espi_util.c -verstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_USE_ESPI) += espi_util.c +bootblock-y += lpc_util.c +verstage-y += lpc_util.c +romstage-y += lpc_util.c +postcar-y += lpc_util.c +ramstage-y += lpc_util.c +smm-y += lpc_util.c + +endif # CONFIG_SOC_AMD_COMMON_BLOCK_LPC + +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_USE_ESPI),y) + +bootblock-y += espi_util.c +romstage-y += espi_util.c +ramstage-y += espi_util.c +verstage-y += espi_util.c + +endif # CONFIG_SOC_AMD_COMMON_BLOCK_USE_ESPI diff --git a/src/soc/amd/common/block/psp/Makefile.inc b/src/soc/amd/common/block/psp/Makefile.inc index c2a3335..363a0ab 100644 --- a/src/soc/amd/common/block/psp/Makefile.inc +++ b/src/soc/amd/common/block/psp/Makefile.inc @@ -1,16 +1,27 @@ -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP) += psp.c -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1) += psp_gen1.c -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN2) += psp_gen2.c +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PSP),y) -romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP) += psp.c -romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1) += psp_gen1.c -romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN2) += psp_gen2.c +bootblock-y += psp.c +romstage-y += psp.c +ramstage-y += psp.c +smm-y += psp.c +smm-y += psp_smm.c -ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP) += psp.c -ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1) += psp_gen1.c -ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN2) += psp_gen2.c +endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP -smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP) += psp.c -smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP) += psp_smm.c -smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1) += psp_gen1.c -smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN2) += psp_gen2.c +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1),y) + +bootblock-y += psp_gen1.c +romstage-y += psp_gen1.c +ramstage-y += psp_gen1.c +smm-y += psp_gen1.c + +endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1 + +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN2),y) + +bootblock-y += psp_gen2.c +romstage-y += psp_gen2.c +ramstage-y += psp_gen2.c +smm-y += psp_gen2.c + +endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN2 diff --git a/src/soc/amd/common/block/spi/Makefile.inc b/src/soc/amd/common/block/spi/Makefile.inc index c8b733f..c58df39 100644 --- a/src/soc/amd/common/block/spi/Makefile.inc +++ b/src/soc/amd/common/block/spi/Makefile.inc @@ -5,18 +5,14 @@ verstage-y += fch_spi_ctrl.c postcar-y += fch_spi_ctrl.c ramstage-y += fch_spi_ctrl.c -ifeq ($(CONFIG_SPI_FLASH_SMM),y) -smm-y += fch_spi_ctrl.c -endif +smm-$(CONFIG_SPI_FLASH_SMM) += fch_spi_ctrl.c bootblock-y += fch_spi.c romstage-y += fch_spi.c postcar-y += fch_spi.c ramstage-y += fch_spi.c verstage-y += fch_spi.c -ifeq ($(CONFIG_SPI_FLASH_SMM),y) -smm-y += fch_spi.c -endif +smm-$(CONFIG_SPI_FLASH_SMM) += fch_spi.c bootblock-y += fch_spi_util.c romstage-y += fch_spi_util.c -- To view, visit https://review.coreboot.org/c/coreboot/+/47876 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89cb17954150c146ffc762d8cb2e3b3b374924de Gerrit-Change-Number: 47876 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: soc/amd/common/block/cpu: move CAR-specific Makefile to sub-directory
by Felix Held (Code Review) 30 Nov '20

30 Nov '20

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47875 ) Change subject: soc/amd/common/block/cpu: move CAR-specific Makefile to sub-directory ...................................................................... soc/amd/common/block/cpu: move CAR-specific Makefile to sub-directory Since there are sub-directories for both the cache-as-RAM case and the non-CAR case where the RAM is already initialized when the x86 cores are released from reset, move the CAR-specific parts of the Makefile.inc to another Makefile.inc in the car sub-directory. Further patches will add a Makefile.inc to the non-CAR directory. Change-Id: I43a3039237d96e02baa33488e71c5f24effe8359 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/soc/amd/common/block/cpu/Makefile.inc A src/soc/amd/common/block/cpu/car/Makefile.inc 2 files changed, 13 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/47875/1 diff --git a/src/soc/amd/common/block/cpu/Makefile.inc b/src/soc/amd/common/block/cpu/Makefile.inc index 395ab08..df2ccfa 100644 --- a/src/soc/amd/common/block/cpu/Makefile.inc +++ b/src/soc/amd/common/block/cpu/Makefile.inc @@ -1,8 +1 @@ -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/cache_as_ram.S -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/ap_exit_car.S -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/exit_car.S - -postcar-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/exit_car.S - -romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/ap_exit_car.S -romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/exit_car.S +subdirs-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car diff --git a/src/soc/amd/common/block/cpu/car/Makefile.inc b/src/soc/amd/common/block/cpu/car/Makefile.inc new file mode 100644 index 0000000..130b34b --- /dev/null +++ b/src/soc/amd/common/block/cpu/car/Makefile.inc @@ -0,0 +1,12 @@ +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_CAR),y) + +bootblock-y += cache_as_ram.S +bootblock-y += ap_exit_car.S +bootblock-y += exit_car.S + +postcar-y += exit_car.S + +romstage-y += ap_exit_car.S +romstage-y += exit_car.S + +endif # CONFIG_SOC_AMD_COMMON_BLOCK_CAR -- To view, visit https://review.coreboot.org/c/coreboot/+/47875 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I43a3039237d96e02baa33488e71c5f24effe8359 Gerrit-Change-Number: 47875 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

3 10

Change in coreboot[master]: drivers/intel/i210: Request Bus Master in .final ops
by Angel Pons (Code Review) 30 Nov '20

30 Nov '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47401 ) Change subject: drivers/intel/i210: Request Bus Master in .final ops ...................................................................... drivers/intel/i210: Request Bus Master in .final ops Commit bd31642ad8 (intel/i210: Set bus master bit in command register) is only necessary because a buggy OS expects Bus Master to be set, not because the hardware requires Bus Master during initialization. It is thus safe to defer the Bus Master request into the .final callback. Change-Id: Iecfa6366eb4b1438fd12cd9ebb1a77ada97fa2f6 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/drivers/intel/i210/i210.c 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/47401/1 diff --git a/src/drivers/intel/i210/i210.c b/src/drivers/intel/i210/i210.c index 852f368..8caa194 100644 --- a/src/drivers/intel/i210/i210.c +++ b/src/drivers/intel/i210/i210.c @@ -206,17 +206,17 @@ return; } -static void set_resources(struct device *dev) +static void enable_bus_master(struct device *dev) { - pci_dev_set_resources(dev); - dev->command |= PCI_COMMAND_MASTER; + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); } static struct device_operations i210_ops = { .read_resources = pci_dev_read_resources, - .set_resources = set_resources, + .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = init, + .final = enable_bus_master, }; static const unsigned short i210_device_ids[] = { 0x1537, 0x1538, 0x1533, 0 }; -- To view, visit https://review.coreboot.org/c/coreboot/+/47401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iecfa6366eb4b1438fd12cd9ebb1a77ada97fa2f6 Gerrit-Change-Number: 47401 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

6 5

Change in coreboot[master]: mb/siemens/mc_apl1: Deduplicate wait_for_legacy_dev()
by Patrick Georgi (Code Review) 30 Nov '20

30 Nov '20

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47402 ) Change subject: mb/siemens/mc_apl1: Deduplicate wait_for_legacy_dev() ...................................................................... mb/siemens/mc_apl1: Deduplicate wait_for_legacy_dev() There's one copy of this function for all variants except mc_apl4. Move one copy into common mainboard.c and exit early if running on mc_apl4. Change-Id: I4e35b58adc074831ccec433b8e014db0695b955e Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47402 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> --- M src/mainboard/siemens/mc_apl1/mainboard.c M src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c M src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c M src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c M src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c M src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c 6 files changed, 32 insertions(+), 141 deletions(-) Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c index 9540d6d..b2cd449 100644 --- a/src/mainboard/siemens/mc_apl1/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/mainboard.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <bootstate.h> #include <console/console.h> #include <device/mmio.h> #include <device/device.h> @@ -13,6 +14,7 @@ #include <soc/pci_devs.h> #include <string.h> #include <timer.h> +#include <timestamp.h> #include <baseboard/variants.h> #include <types.h> @@ -222,3 +224,33 @@ .init = mainboard_init, .final = mainboard_final, }; + +static void wait_for_legacy_dev(void *unused) +{ + uint32_t legacy_delay, us_since_boot; + struct stopwatch sw; + + if (CONFIG(BOARD_SIEMENS_MC_APL4)) + return; + + /* Open main hwinfo block. */ + if (hwilib_find_blocks("hwinfo.hex") != CB_SUCCESS) + return; + + /* Get legacy delay parameter from hwinfo. */ + if (hwilib_get_field(LegacyDelay, (uint8_t *) &legacy_delay, + sizeof(legacy_delay)) != sizeof(legacy_delay)) + return; + + us_since_boot = get_us_since_boot(); + /* No need to wait if the time since boot is already long enough.*/ + if (us_since_boot > legacy_delay) + return; + stopwatch_init_msecs_expire(&sw, (legacy_delay - us_since_boot) / 1000); + printk(BIOS_NOTICE, "Wait remaining %d of %d us for legacy devices...", + legacy_delay - us_since_boot, legacy_delay); + stopwatch_wait_until_expired(&sw); + printk(BIOS_NOTICE, "done!\n"); +} + +BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_ENTRY, wait_for_legacy_dev, NULL); diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c index e60ea64..5dbc4b9 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c @@ -9,8 +9,6 @@ #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> #include <soc/pcr_ids.h> -#include <timer.h> -#include <timestamp.h> #include <baseboard/variants.h> #include <types.h> @@ -51,36 +49,10 @@ pcr_rmw32(PID_MODPHY, TX_DWORD3, (0x00 << 16), (0x4a << 16)); } -static void wait_for_legacy_dev(void *unused) -{ - uint32_t legacy_delay, us_since_boot; - struct stopwatch sw; - - /* Open main hwinfo block. */ - if (hwilib_find_blocks("hwinfo.hex") != CB_SUCCESS) - return; - - /* Get legacy delay parameter from hwinfo. */ - if (hwilib_get_field(LegacyDelay, (uint8_t *) &legacy_delay, - sizeof(legacy_delay)) != sizeof(legacy_delay)) - return; - - us_since_boot = get_us_since_boot(); - /* No need to wait if the time since boot is already long enough.*/ - if (us_since_boot > legacy_delay) - return; - stopwatch_init_msecs_expire(&sw, (legacy_delay - us_since_boot) / 1000); - printk(BIOS_NOTICE, "Wait remaining %d of %d us for legacy devices...", - legacy_delay - us_since_boot, legacy_delay); - stopwatch_wait_until_expired(&sw); - printk(BIOS_NOTICE, "done!\n"); -} - static void finalize_boot(void *unused) { /* Set coreboot ready LED. */ gpio_output(CNV_RGI_DT, 1); } -BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_ENTRY, wait_for_legacy_dev, NULL); BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL); diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c index 000ee08..9cfd86f 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c @@ -7,8 +7,6 @@ #include <device/pci_ops.h> #include <hwilib.h> #include <intelblocks/lpc_lib.h> -#include <timer.h> -#include <timestamp.h> #include <baseboard/variants.h> #include <soc/pci_devs.h> #include <types.h> @@ -23,30 +21,3 @@ pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); } } - -static void wait_for_legacy_dev(void *unused) -{ - uint32_t legacy_delay, us_since_boot; - struct stopwatch sw; - - /* Open main hwinfo block. */ - if (hwilib_find_blocks("hwinfo.hex") != CB_SUCCESS) - return; - - /* Get legacy delay parameter from hwinfo. */ - if (hwilib_get_field(LegacyDelay, (uint8_t *) &legacy_delay, - sizeof(legacy_delay)) != sizeof(legacy_delay)) - return; - - us_since_boot = get_us_since_boot(); - /* No need to wait if the time since boot is already long enough.*/ - if (us_since_boot > legacy_delay) - return; - stopwatch_init_msecs_expire(&sw, (legacy_delay - us_since_boot) / 1000); - printk(BIOS_NOTICE, "Wait remaining %d of %d us for legacy devices...", - legacy_delay - us_since_boot, legacy_delay); - stopwatch_wait_until_expired(&sw); - printk(BIOS_NOTICE, "done!\n"); -} - -BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_ENTRY, wait_for_legacy_dev, NULL); diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c index 8b1a0e1..22d2388 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c @@ -12,8 +12,6 @@ #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> #include <soc/pcr_ids.h> -#include <timer.h> -#include <timestamp.h> #include <baseboard/variants.h> #include <types.h> @@ -70,36 +68,10 @@ outb(FULL_RST, RST_CNT); } -static void wait_for_legacy_dev(void *unused) -{ - uint32_t legacy_delay, us_since_boot; - struct stopwatch sw; - - /* Open main hwinfo block. */ - if (hwilib_find_blocks("hwinfo.hex") != CB_SUCCESS) - return; - - /* Get legacy delay parameter from hwinfo. */ - if (hwilib_get_field(LegacyDelay, (uint8_t *) &legacy_delay, - sizeof(legacy_delay)) != sizeof(legacy_delay)) - return; - - us_since_boot = get_us_since_boot(); - /* No need to wait if the time since boot is already long enough.*/ - if (us_since_boot > legacy_delay) - return; - stopwatch_init_msecs_expire(&sw, (legacy_delay - us_since_boot) / 1000); - printk(BIOS_NOTICE, "Wait remaining %d of %d us for legacy devices...", - legacy_delay - us_since_boot, legacy_delay); - stopwatch_wait_until_expired(&sw); - printk(BIOS_NOTICE, "done!\n"); -} - static void finalize_boot(void *unused) { /* Set coreboot ready LED. */ gpio_output(CNV_RGI_DT, 1); } -BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_ENTRY, wait_for_legacy_dev, NULL); BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL); diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c index c0a7d53..5a4c01f 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c @@ -10,8 +10,6 @@ #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> #include <soc/pcr_ids.h> -#include <timer.h> -#include <timestamp.h> #include <baseboard/variants.h> #include <types.h> @@ -69,36 +67,10 @@ } } -static void wait_for_legacy_dev(void *unused) -{ - uint32_t legacy_delay, us_since_boot; - struct stopwatch sw; - - /* Open main hwinfo block. */ - if (hwilib_find_blocks("hwinfo.hex") != CB_SUCCESS) - return; - - /* Get legacy delay parameter from hwinfo. */ - if (hwilib_get_field(LegacyDelay, (uint8_t *) &legacy_delay, - sizeof(legacy_delay)) != sizeof(legacy_delay)) - return; - - us_since_boot = get_us_since_boot(); - /* No need to wait if the time since boot is already long enough.*/ - if (us_since_boot > legacy_delay) - return; - stopwatch_init_msecs_expire(&sw, (legacy_delay - us_since_boot) / 1000); - printk(BIOS_NOTICE, "Wait remaining %d of %d us for legacy devices...", - legacy_delay - us_since_boot, legacy_delay); - stopwatch_wait_until_expired(&sw); - printk(BIOS_NOTICE, "done!\n"); -} - static void finalize_boot(void *unused) { /* Set coreboot ready LED. */ gpio_output(CNV_RGI_DT, 1); } -BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_ENTRY, wait_for_legacy_dev, NULL); BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL); diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c index f9345f4..15c170b 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c @@ -12,8 +12,6 @@ #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> #include <soc/pcr_ids.h> -#include <timer.h> -#include <timestamp.h> #include <baseboard/variants.h> #include <types.h> @@ -70,36 +68,10 @@ outb(FULL_RST, RST_CNT); } -static void wait_for_legacy_dev(void *unused) -{ - uint32_t legacy_delay, us_since_boot; - struct stopwatch sw; - - /* Open main hwinfo block. */ - if (hwilib_find_blocks("hwinfo.hex") != CB_SUCCESS) - return; - - /* Get legacy delay parameter from hwinfo. */ - if (hwilib_get_field(LegacyDelay, (uint8_t *) &legacy_delay, - sizeof(legacy_delay)) != sizeof(legacy_delay)) - return; - - us_since_boot = get_us_since_boot(); - /* No need to wait if the time since boot is already long enough.*/ - if (us_since_boot > legacy_delay) - return; - stopwatch_init_msecs_expire(&sw, (legacy_delay - us_since_boot) / 1000); - printk(BIOS_NOTICE, "Wait remaining %d of %d us for legacy devices...", - legacy_delay - us_since_boot, legacy_delay); - stopwatch_wait_until_expired(&sw); - printk(BIOS_NOTICE, "done!\n"); -} - static void finalize_boot(void *unused) { /* Set coreboot ready LED. */ gpio_output(CNV_RGI_DT, 1); } -BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_ENTRY, wait_for_legacy_dev, NULL); BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/47402 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e35b58adc074831ccec433b8e014db0695b955e Gerrit-Change-Number: 47402 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: siemens-bot Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: mb/siemens/mc_apl1: Deduplicate wait_for_legacy_dev()
by Patrick Georgi (Code Review) 30 Nov '20

30 Nov '20

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47402 ) Change subject: mb/siemens/mc_apl1: Deduplicate wait_for_legacy_dev() ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/47402 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e35b58adc074831ccec433b8e014db0695b955e Gerrit-Change-Number: 47402 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: siemens-bot Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 30 Nov 2020 07:57:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/siemens/mc_apl1: Simplify is_mac_adr_valid() logic
by Patrick Georgi (Code Review) 30 Nov '20

30 Nov '20

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47405 ) Change subject: mb/siemens/mc_apl1: Simplify is_mac_adr_valid() logic ...................................................................... mb/siemens/mc_apl1: Simplify is_mac_adr_valid() logic A MAC address that is neither 00:00:00:00:00:00 nor ff:ff:ff:ff:ff:ff is considered valid. Instead of using a temporary buffer and memcmp(), use a single loop that exits as soon as the MAC cannot possibly be invalid. Change-Id: I2b15b510092860fbbefd150c9060da38aeb13311 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47405 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> Reviewed-by: Uwe Poeche <uwe.poeche(a)siemens.com> --- M src/mainboard/siemens/mc_apl1/mainboard.c 1 file changed, 7 insertions(+), 9 deletions(-) Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved Mario Scheithauer: Looks good to me, but someone else must approve Uwe Poeche: Looks good to me, but someone else must approve diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c index ff0cc59..9540d6d 100644 --- a/src/mainboard/siemens/mc_apl1/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/mainboard.c @@ -35,15 +35,13 @@ */ static uint8_t is_mac_adr_valid(uint8_t mac[MAC_ADDR_LEN]) { - uint8_t buf[MAC_ADDR_LEN]; - - memset(buf, 0, sizeof(buf)); - if (!memcmp(buf, mac, sizeof(buf))) - return 0; - memset(buf, 0xff, sizeof(buf)); - if (!memcmp(buf, mac, sizeof(buf))) - return 0; - return 1; + for (size_t i = 0; i < MAC_ADDR_LEN; i++) { + if (mac[i] != 0x00 && mac[i] != 0xff) + return 1; + if (mac[i] != mac[0]) + return 1; + } + return 0; } /** \brief This function will search for a MAC address which can be assigned -- To view, visit https://review.coreboot.org/c/coreboot/+/47405 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b15b510092860fbbefd150c9060da38aeb13311 Gerrit-Change-Number: 47405 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

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Change in coreboot[master]: drivers/intel/i210: Define MAC_ADDR_LEN
by Patrick Georgi (Code Review) 30 Nov '20

30 Nov '20

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47404 ) Change subject: drivers/intel/i210: Define MAC_ADDR_LEN ...................................................................... drivers/intel/i210: Define MAC_ADDR_LEN Define and use the MAC_ADDR_LEN macro in place of the `6` magic value. Change-Id: Icfa2ad9bca6668bea3d84b10f613d01e437ac6a2 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47404 Tested-by: siemens-bot Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> --- M src/drivers/intel/i210/i210.h M src/mainboard/siemens/mc_apl1/mainboard.c 2 files changed, 7 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified siemens-bot: Verified Werner Zeh: Looks good to me, approved diff --git a/src/drivers/intel/i210/i210.h b/src/drivers/intel/i210/i210.h index 718992e..1cc6a28 100644 --- a/src/drivers/intel/i210/i210.h +++ b/src/drivers/intel/i210/i210.h @@ -27,9 +27,10 @@ #define I210_CHECKSUM_ERROR 0x00000010 #define I210_FLASH_UPDATE_ERROR 0x00000020 +#define MAC_ADDR_LEN 6 + /* We need one function we can call to get a MAC address to use */ /* This function can be coded somewhere else but must exist. */ -extern enum cb_err mainboard_get_mac_address(struct device *dev, - uint8_t mac[6]); +extern enum cb_err mainboard_get_mac_address(struct device *dev, uint8_t mac[MAC_ADDR_LEN]); #endif /* _INTEL_I210_H_ */ diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c index 5b8f70f..ff0cc59 100644 --- a/src/mainboard/siemens/mc_apl1/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/mainboard.c @@ -33,9 +33,9 @@ * @param mac Buffer to the MAC address to check * @return 0 if address is not valid, otherwise 1 */ -static uint8_t is_mac_adr_valid(uint8_t mac[6]) +static uint8_t is_mac_adr_valid(uint8_t mac[MAC_ADDR_LEN]) { - uint8_t buf[6]; + uint8_t buf[MAC_ADDR_LEN]; memset(buf, 0, sizeof(buf)); if (!memcmp(buf, mac, sizeof(buf))) @@ -52,7 +52,7 @@ * @param mac buffer where to store the MAC address * @return cb_err CB_ERR or CB_SUCCESS */ -enum cb_err mainboard_get_mac_address(struct device *dev, uint8_t mac[6]) +enum cb_err mainboard_get_mac_address(struct device *dev, uint8_t mac[MAC_ADDR_LEN]) { struct bus *parent = dev->bus; uint8_t buf[16], mapping[16], i = 0, chain_len = 0; @@ -92,7 +92,7 @@ if (memcmp(buf, mapping, chain_len + 4)) continue; /* There is a matching mapping available, get MAC address. */ - if (hwilib_get_field(XMac1 + i, mac, 6) == 6) { + if (hwilib_get_field(XMac1 + i, mac, MAC_ADDR_LEN) == MAC_ADDR_LEN) { if (is_mac_adr_valid(mac)) return CB_SUCCESS; } -- To view, visit https://review.coreboot.org/c/coreboot/+/47404 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icfa2ad9bca6668bea3d84b10f613d01e437ac6a2 Gerrit-Change-Number: 47404 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: siemens-bot Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

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coreboot-gerrit November 2020