coreboot-gerrit November 2020

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Change in coreboot[master]: mb/asus/am1i-a: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 26 Jan '21

26 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46157 ) Change subject: mb/asus/am1i-a: Convert to ASL 2.0 syntax ...................................................................... mb/asus/am1i-a: Convert to ASL 2.0 syntax Change-Id: I856494c634c8c932faa7840b0fd0a35663f4de57 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/asus/am1i-a/acpi/sata.asl M src/mainboard/asus/am1i-a/acpi/sleep.asl 2 files changed, 16 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/46157/1 diff --git a/src/mainboard/asus/am1i-a/acpi/sata.asl b/src/mainboard/asus/am1i-a/acpi/sata.asl index 84cc348..27e5222 100644 --- a/src/mainboard/asus/am1i-a/acpi/sata.asl +++ b/src/mainboard/asus/am1i-a/acpi/sata.asl @@ -22,7 +22,7 @@ Device(PMST) { Name(_ADR, 0) Method(_STA,0) { - if (LGreater(P0IS,0)) { + if (P0IS > 0) { return (0x0F) /* sata is visible */ } else { @@ -35,7 +35,7 @@ { Name(_ADR, 1) Method(_STA,0) { - if (LGreater(P1IS,0)) { + if (P1IS > 0) { return (0x0F) /* sata is visible */ } else { @@ -57,7 +57,7 @@ { Name(_ADR, 0) Method(_STA,0) { - if (LGreater(P2IS,0)) { + if (P2IS > 0) { return (0x0F) /* sata is visible */ } else { @@ -70,7 +70,7 @@ { Name(_ADR, 1) Method(_STA,0) { - if (LGreater(P3IS,0)) { + if (P3IS > 0) { return (0x0F) /* sata is visible */ } else { @@ -84,35 +84,35 @@ Scope(\_GPE) { Method(_L1F,0x0,NotSerialized) { if (\_SB.P0PR) { - if (LGreater(\_SB.P0IS,0)) { + if (\_SB.P0IS > 0) { sleep(32) } Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */ - store(one, \_SB.P0PR) + \_SB.P0PR = 1 } if (\_SB.P1PR) { - if (LGreater(\_SB.P1IS,0)) { + if (\_SB.P1IS > 0) { sleep(32) } Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */ - store(one, \_SB.P1PR) + \_SB.P1PR = 1 } if (\_SB.P2PR) { - if (LGreater(\_SB.P2IS,0)) { + if (\_SB.P2IS > 0) { sleep(32) } Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */ - store(one, \_SB.P2PR) + \_SB.P2PR = 1 } if (\_SB.P3PR) { - if (LGreater(\_SB.P3IS,0)) { + if (\_SB.P3IS > 0) { sleep(32) } Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */ - store(one, \_SB.P3PR) + \_SB.P3PR = 1 } } } diff --git a/src/mainboard/asus/am1i-a/acpi/sleep.asl b/src/mainboard/asus/am1i-a/acpi/sleep.asl index 47dd146..fc26c30 100644 --- a/src/mainboard/asus/am1i-a/acpi/sleep.asl +++ b/src/mainboard/asus/am1i-a/acpi/sleep.asl @@ -30,9 +30,9 @@ /* DBGO("\n") */ /* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 \_SB.APTS(Arg0) } /* End Method(\_PTS) */ @@ -56,7 +56,7 @@ /* DBGO("From S") */ /* DBGO(Arg0) */ /* DBGO(" to S0\n") */ - Store(1,USBS) + USBS = 1 \_SB.AWAK(Arg0) -- To view, visit https://review.coreboot.org/c/coreboot/+/46157 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I856494c634c8c932faa7840b0fd0a35663f4de57 Gerrit-Change-Number: 46157 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/bap/ode_e20XX: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 26 Jan '21

26 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46160 ) Change subject: mb/bap/ode_e20XX: Convert to ASL 2.0 syntax ...................................................................... mb/bap/ode_e20XX: Convert to ASL 2.0 syntax Change-Id: I07705aed2f41cd0d2a7f4b980046995f44395f07 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/bap/ode_e20XX/acpi/sleep.asl 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/46160/1 diff --git a/src/mainboard/bap/ode_e20XX/acpi/sleep.asl b/src/mainboard/bap/ode_e20XX/acpi/sleep.asl index 47dd146..fc26c30 100644 --- a/src/mainboard/bap/ode_e20XX/acpi/sleep.asl +++ b/src/mainboard/bap/ode_e20XX/acpi/sleep.asl @@ -30,9 +30,9 @@ /* DBGO("\n") */ /* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 \_SB.APTS(Arg0) } /* End Method(\_PTS) */ @@ -56,7 +56,7 @@ /* DBGO("From S") */ /* DBGO(Arg0) */ /* DBGO(" to S0\n") */ - Store(1,USBS) + USBS = 1 \_SB.AWAK(Arg0) -- To view, visit https://review.coreboot.org/c/coreboot/+/46160 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I07705aed2f41cd0d2a7f4b980046995f44395f07 Gerrit-Change-Number: 46160 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/asus/p2b: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 26 Jan '21

26 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46159 ) Change subject: mb/asus/p2b: Convert to ASL 2.0 syntax ...................................................................... mb/asus/p2b: Convert to ASL 2.0 syntax Change-Id: Ib07e4147f7f1b90f721be147d48ed12ae793c4fd Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/asus/p2b/dsdt.asl 1 file changed, 14 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/46159/1 diff --git a/src/mainboard/asus/p2b/dsdt.asl b/src/mainboard/asus/p2b/dsdt.asl index e1bda17..ef9a4a8 100644 --- a/src/mainboard/asus/p2b/dsdt.asl +++ b/src/mainboard/asus/p2b/dsdt.asl @@ -59,23 +59,23 @@ Method (\_PTS, 1, NotSerialized) { /* Disable fan, blink power LED, if not turning off */ - If (LNotEqual (Arg0, 0x05)) + If (Arg0 != 0x05) { - Store (Zero, FANM) - Store (Zero, PLED) + FANM = 0 + PLED = 0 } /* Arms SMI for device 12 */ - Store (One, TO12) + TO12 = 1 /* Put out a POST code */ - Or (Arg0, 0xF0, P80) + P80 = Arg0 | 0xF0 } Method (\_WAK, 1, NotSerialized) { /* Re-enable fan, stop power led blinking */ - Store (One, FANM) - Store (One, PLED) + FANM = 1 + PLED = 1 /* wake OK */ Return(Package(0x02){0x00, 0x00}) } @@ -204,10 +204,10 @@ CreateWordField (BUF1, _Y07._MIN, SBLO) CreateWordField (BUF1, _Y07._MAX, SBRL) - And (\_SB.PCI0.PX43.PM00, 0xFFFE, PMLO) - And (\_SB.PCI0.PX43.SB00, 0xFFFE, SBLO) - Store (PMLO, PMRL) - Store (SBLO, SBRL) + PMLO = \_SB.PCI0.PX43.PM00 & 0xFFFE + SBLO = \_SB.PCI0.PX43.SB00 & 0xFFFE + PMRL = PMLO + SBRL = SBLO Return (BUF1) } } @@ -238,13 +238,13 @@ { Method (_MSG, 1, NotSerialized) { - If (LEqual (Arg0, Zero)) + If (Arg0 == 0) { - Store (One, MSG0) + MSG0 = 1 } Else { - Store (Zero, MSG0) + MSG0 = 0 } } } -- To view, visit https://review.coreboot.org/c/coreboot/+/46159 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib07e4147f7f1b90f721be147d48ed12ae793c4fd Gerrit-Change-Number: 46159 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/lenovo/t60: Convert *.asl to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 26 Jan '21

26 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46010 ) Change subject: mb/lenovo/t60: Convert *.asl to ASL 2.0 syntax ...................................................................... mb/lenovo/t60: Convert *.asl to ASL 2.0 syntax Change-Id: Iea2c0600d696f9da6774affdc33d9c50d5cf2c95 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/lenovo/t60/acpi/dock.asl M src/mainboard/lenovo/t60/acpi/gpe.asl M src/mainboard/lenovo/t60/acpi/platform.asl 3 files changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/46010/1 diff --git a/src/mainboard/lenovo/t60/acpi/dock.asl b/src/mainboard/lenovo/t60/acpi/dock.asl index 8d03dab..a67b412 100644 --- a/src/mainboard/lenovo/t60/acpi/dock.asl +++ b/src/mainboard/lenovo/t60/acpi/dock.asl @@ -28,7 +28,7 @@ TRAP(SMI_DOCK_DISCONNECT) } - Xor(Arg0, DSTA, Local0) + Local0 = Arg0 ^ DSTA Return (Local0) } diff --git a/src/mainboard/lenovo/t60/acpi/gpe.asl b/src/mainboard/lenovo/t60/acpi/gpe.asl index 62e7b37..9984636 100644 --- a/src/mainboard/lenovo/t60/acpi/gpe.asl +++ b/src/mainboard/lenovo/t60/acpi/gpe.asl @@ -5,8 +5,8 @@ Method(_L18, 0, NotSerialized) { /* Read EC register to clear wake status */ - Store(\_SB.PCI0.LPCB.EC.WAKE, Local0) + Local0 = \_SB.PCI0.LPCB.EC.WAKE /* So that we don't get a warning that Local0 is unused. */ - Increment (Local0) + Local0++ } } diff --git a/src/mainboard/lenovo/t60/acpi/platform.asl b/src/mainboard/lenovo/t60/acpi/platform.asl index c9551b5..ca52e5d 100644 --- a/src/mainboard/lenovo/t60/acpi/platform.asl +++ b/src/mainboard/lenovo/t60/acpi/platform.asl @@ -24,12 +24,12 @@ // was inserted while a sleep state was active. // Are we going to S3? - If (LEqual(Arg0, 3)) { + If (Arg0 == 3) { // .. } // Are we going to S4? - If (LEqual(Arg0, 4)) { + If (Arg0 == 4) { // .. } @@ -60,7 +60,7 @@ * running: Windows XP SP1 needs to have C-State coordination * enabled in SMM. */ - If (LAnd(LEqual(OSYS, 2001), MPEN)) { + If ((OSYS == 2001) && MPEN) { // TRAP(61) // TODO } -- To view, visit https://review.coreboot.org/c/coreboot/+/46010 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea2c0600d696f9da6774affdc33d9c50d5cf2c95 Gerrit-Change-Number: 46010 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/kontron/986lcd-m: Convert *.asl to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 26 Jan '21

26 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46009 ) Change subject: mb/kontron/986lcd-m: Convert *.asl to ASL 2.0 syntax ...................................................................... mb/kontron/986lcd-m: Convert *.asl to ASL 2.0 syntax Change-Id: I2ef51c0348e76cb34e118ed207de88cc753f8fe0 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/kontron/986lcd-m/acpi/platform.asl 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/46009/1 diff --git a/src/mainboard/kontron/986lcd-m/acpi/platform.asl b/src/mainboard/kontron/986lcd-m/acpi/platform.asl index 30e4d2c..cf73fc1 100644 --- a/src/mainboard/kontron/986lcd-m/acpi/platform.asl +++ b/src/mainboard/kontron/986lcd-m/acpi/platform.asl @@ -20,12 +20,12 @@ // was inserted while a sleep state was active. // Are we going to S3? - If (LEqual(Arg0, 3)) { + If (Arg0 == 3) { // .. } // Are we going to S4? - If (LEqual(Arg0, 4)) { + If (Arg0 == 4) { // .. } -- To view, visit https://review.coreboot.org/c/coreboot/+/46009 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2ef51c0348e76cb34e118ed207de88cc753f8fe0 Gerrit-Change-Number: 46009 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/gigabyte/ga-945gcm-s2l: Convert *.asl to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 26 Jan '21

26 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46008 ) Change subject: mb/gigabyte/ga-945gcm-s2l: Convert *.asl to ASL 2.0 syntax ...................................................................... mb/gigabyte/ga-945gcm-s2l: Convert *.asl to ASL 2.0 syntax Change-Id: Ic01ca9b58fe948fe5ffbc9e80ea4bae91fb6d581 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/gigabyte/ga-945gcm-s2l/acpi/platform.asl M src/mainboard/gigabyte/ga-945gcm-s2l/acpi/superio.asl 2 files changed, 2 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/46008/1 diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/platform.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/platform.asl index 30e4d2c..cf73fc1 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/platform.asl +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/platform.asl @@ -20,12 +20,12 @@ // was inserted while a sleep state was active. // Are we going to S3? - If (LEqual(Arg0, 3)) { + If (Arg0 == 3) { // .. } // Are we going to S4? - If (LEqual(Arg0, 4)) { + If (Arg0 == 4) { // .. } diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/superio.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/superio.asl index 2997587..e69de29 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/superio.asl +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/superio.asl @@ -1 +0,0 @@ -/* dummy */ -- To view, visit https://review.coreboot.org/c/coreboot/+/46008 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic01ca9b58fe948fe5ffbc9e80ea4bae91fb6d581 Gerrit-Change-Number: 46008 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/msi/ms7721: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 26 Jan '21

26 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46209 ) Change subject: mb/msi/ms7721: Convert to ASL 2.0 syntax ...................................................................... mb/msi/ms7721: Convert to ASL 2.0 syntax Change-Id: Iaf26af76935dc8cd9642f047e833f0e8b14e6931 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/msi/ms7721/acpi/sleep.asl 1 file changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/46209/1 diff --git a/src/mainboard/msi/ms7721/acpi/sleep.asl b/src/mainboard/msi/ms7721/acpi/sleep.asl index e08accd..07f6419 100644 --- a/src/mainboard/msi/ms7721/acpi/sleep.asl +++ b/src/mainboard/msi/ms7721/acpi/sleep.asl @@ -26,20 +26,20 @@ /* DBGO("\n") */ /* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/ /* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(\_SB.SBRI, 0x13)) { - * Store(0,\_SB.PWDE) + /*if (\_SB.SBRI <= 0x13) { + * \_SB.PWDE = 0 *} */ /* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 - Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(\_PTS) */ /* -- To view, visit https://review.coreboot.org/c/coreboot/+/46209 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaf26af76935dc8cd9642f047e833f0e8b14e6931 Gerrit-Change-Number: 46209 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/roda/rk9: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 26 Jan '21

26 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46210 ) Change subject: mb/roda/rk9: Convert to ASL 2.0 syntax ...................................................................... mb/roda/rk9: Convert to ASL 2.0 syntax Change-Id: I3cfa9d3a199a33ac8faddf4dbc1eed0df8703835 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/roda/rk9/acpi/battery.asl M src/mainboard/roda/rk9/acpi/ec.asl M src/mainboard/roda/rk9/acpi/platform.asl M src/mainboard/roda/rk9/acpi/superio.asl M src/mainboard/roda/rk9/acpi/thermal.asl 5 files changed, 147 insertions(+), 147 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/46210/1 diff --git a/src/mainboard/roda/rk9/acpi/battery.asl b/src/mainboard/roda/rk9/acpi/battery.asl index 72475d6..88e8aca 100644 --- a/src/mainboard/roda/rk9/acpi/battery.asl +++ b/src/mainboard/roda/rk9/acpi/battery.asl @@ -59,9 +59,9 @@ Method(_BIF, 0) { If(\_SB.PCI0.LPCB.EC0.ECON) { - Store (\_SB.PCI0.LPCB.EC0.B1DW, Index(PBIF, 1)) - Store (\_SB.PCI0.LPCB.EC0.B1FW, Index(PBIF, 2)) - Store (\_SB.PCI0.LPCB.EC0.B1DV, Index(PBIF, 4)) + PBIF [1] = \_SB.PCI0.LPCB.EC0.B1DW + PBIF [2] = \_SB.PCI0.LPCB.EC0.B1FW + PBIF [4] = \_SB.PCI0.LPCB.EC0.B1DV } Return(PBIF) @@ -71,26 +71,26 @@ Method(_BST, 0) { If(\_SB.PCI0.LPCB.EC0.ECON) { - Store (\_SB.PCI0.LPCB.EC0.B1PW, Local0) - If (LGreaterEqual (Local0, 0x8000)) { - Subtract (0x10000, Local0, Local0) + Local0 = \_SB.PCI0.LPCB.EC0.B1PW + If (Local0 >= 0x8000) { + Local0 = 0x10000 - Local0 } - Store (Local0, Index(PBST, 1)) - Store (\_SB.PCI0.LPCB.EC0.B1PV, Index(PBST, 3)) + PBST [1] = Local0 + PBST [3] = \_SB.PCI0.LPCB.EC0.B1PV - Store (\_SB.PCI0.LPCB.EC0.B1RW, Index(PBST, 2)) + PBST [2] = \_SB.PCI0.LPCB.EC0.B1RW If (\_SB.PCI0.LPCB.EC0.ACCH) { If (\_SB.PCI0.LPCB.EC0.B1CH) { If (\_SB.PCI0.LPCB.EC0.B1CG) { - Store (2, Index(PBST, 0)) + PBST [0] = 2 } } } Else { If (\_SB.PCI0.LPCB.EC0.B1LO) { - Store (5, Index(PBST, 0)) + PBST [0] = 5 } Else { - Store (1, Index(PBST, 0)) + PBST [0] = 1 } } } @@ -153,9 +153,9 @@ Method(_BIF, 0) { If(\_SB.PCI0.LPCB.EC0.ECON) { - Store (\_SB.PCI0.LPCB.EC0.B2DW, Index(PBIF, 1)) - Store (\_SB.PCI0.LPCB.EC0.B2FW, Index(PBIF, 2)) - Store (\_SB.PCI0.LPCB.EC0.B2DV, Index(PBIF, 4)) + PBIF [1] = \_SB.PCI0.LPCB.EC0.B2DW + PBIF [2] = \_SB.PCI0.LPCB.EC0.B2FW + PBIF [4] = \_SB.PCI0.LPCB.EC0.B2DV } Return(PBIF) @@ -165,26 +165,26 @@ Method(_BST, 0) { If(\_SB.PCI0.LPCB.EC0.ECON) { - Store (\_SB.PCI0.LPCB.EC0.B2PW, Local0) - If (LGreaterEqual (Local0, 0x8000)) { - Subtract (0x10000, Local0, Local0) + Local0 = \_SB.PCI0.LPCB.EC0.B2PW + If (Local0 >= 0x8000) { + Local0 = 0x10000 - Local0 } - Store (Local0, Index(PBST, 1)) - Store (\_SB.PCI0.LPCB.EC0.B2PV, Index(PBST, 3)) + PBST [1] = Local0 + PBST [3] = \_SB.PCI0.LPCB.EC0.B2PV - Store (\_SB.PCI0.LPCB.EC0.B2RW, Index(PBST, 2)) + PBST [2] = \_SB.PCI0.LPCB.EC0.B2RW If (\_SB.PCI0.LPCB.EC0.ACCH) { If (\_SB.PCI0.LPCB.EC0.B2CH) { If (\_SB.PCI0.LPCB.EC0.B2CG) { - Store (2, Index(PBST, 0)) + PBST [0] = 2 } } } Else { If (\_SB.PCI0.LPCB.EC0.B2LO) { - Store (5, Index(PBST, 0)) + PBST [0] = 5 } Else { - Store (1, Index(PBST, 0)) + PBST [0] = 1 } } } @@ -199,7 +199,7 @@ Name (_HID, "ACPI0003") Method (_PSR, 0) { - Store (\_SB.PCI0.LPCB.EC0.ACCH, PWRS) + PWRS = \_SB.PCI0.LPCB.EC0.ACCH Stall (0x02) Return (PWRS) } diff --git a/src/mainboard/roda/rk9/acpi/ec.asl b/src/mainboard/roda/rk9/acpi/ec.asl index 7284ccd..720f92f 100644 --- a/src/mainboard/roda/rk9/acpi/ec.asl +++ b/src/mainboard/roda/rk9/acpi/ec.asl @@ -70,8 +70,8 @@ // This method is needed by Windows XP/2000 for // EC initialization before a driver is loaded - If (LEqual(Arg0, 0x03)) { - Store (Arg1, ECON) + If (Arg0 == 0x03) { + ECON = Arg1 } } @@ -79,98 +79,98 @@ Method (_Q11, 0) { - Store("_Q11: Fn-F8 (Sleep Button) pressed", Debug) + Debug = "_Q11: Fn-F8 (Sleep Button) pressed" Notify(SLPB, 0x80) } Method (_Q30, 0) { - Store("_Q30: AC In", Debug) + Debug = "_Q30: AC In" Notify(ADP1, 0x80) // Tell the Power Adapter PNOT() // and the CPU and Battery } Method (_Q31, 0) { - Store("_Q31: AC Out", Debug) + Debug = "_Q31: AC Out" Notify(ADP1, 0x80) // Tell the Power Adapter PNOT() // and the CPU and Battery } Method (_Q32, 0) { - Store("_Q32: Bat1 In", Debug) + Debug = "_Q32: Bat1 In" Notify(BAT1, 0x81) } Method (_Q33, 0) { - Store("_Q33: Bat1 Out", Debug) + Debug = "_Q33: Bat1 Out" Notify(BAT1, 0x81) } Method (_Q34, 0) { - Store("_Q34: Bat2 In", Debug) + Debug = "_Q34: Bat2 In" Notify(BAT2, 0x81) } Method (_Q35, 0) { - Store("_Q35: Bat2 Out", Debug) + Debug = "_Q35: Bat2 Out" Notify(BAT2, 0x81) } Method (_Q36, 0) { - Store("_Q36: Bat1 Low Power", Debug) + Debug = "_Q36: Bat1 Low Power" Notify(BAT1, 0x80) } Method (_Q37, 0) { - Store("_Q37: Bat1 Full Charge", Debug) + Debug = "_Q37: Bat1 Full Charge" Notify(BAT1, 0x80) } Method (_Q38, 0) { - Store("_Q38: Bat2 Low Power", Debug) + Debug = "_Q38: Bat2 Low Power" Notify(BAT2, 0x80) } Method (_Q39, 0) { - Store("_Q39: Bat2 Full Charge", Debug) + Debug = "_Q39: Bat2 Full Charge" Notify(BAT2, 0x80) } Method (_Q40, 0) { - Store("_Q40: LID Open/Close", Debug) + Debug = "_Q40: LID Open/Close" Notify(LID0, 0x80) } Method (_Q41, 0) { - Store("_Q41: Floppy on Parallel Port: Call the Museum!", Debug) + Debug = "_Q41: Floppy on Parallel Port: Call the Museum!" } Method (_Q50, 0) { - Store("_Q50: Processor is hot", Debug) + Debug = "_Q50: Processor is hot" Notify(\_TZ.THRM, 0x80) } Method (_Q51, 0) { - Store("_Q51: Processor is boiling", Debug) + Debug = "_Q51: Processor is boiling" Notify(\_TZ.THRM, 0x80) } Method (_Q52, 0) { - Store("_Q52: Processor is burning", Debug) + Debug = "_Q52: Processor is burning" Notify(\_TZ.THRM, 0x80) } diff --git a/src/mainboard/roda/rk9/acpi/platform.asl b/src/mainboard/roda/rk9/acpi/platform.asl index b4d67f5..ee7556c 100644 --- a/src/mainboard/roda/rk9/acpi/platform.asl +++ b/src/mainboard/roda/rk9/acpi/platform.asl @@ -20,12 +20,12 @@ // was inserted while a sleep state was active. // Are we going to S3? - If (LEqual(Arg0, 3)) { + If (Arg0 == 3) { // .. } // Are we going to S4? - If (LEqual(Arg0, 4)) { + If (Arg0 == 4) { // .. } @@ -59,7 +59,7 @@ * running: Windows XP SP1 needs to have C-State coordination * enabled in SMM. */ - If (LAnd(LEqual(OSYS, 2001), MPEN)) { + If ((OSYS == 2001) && MPEN) { // TRAP(61) // TODO } diff --git a/src/mainboard/roda/rk9/acpi/superio.asl b/src/mainboard/roda/rk9/acpi/superio.asl index 6f356e9..efca0a1e 100644 --- a/src/mainboard/roda/rk9/acpi/superio.asl +++ b/src/mainboard/roda/rk9/acpi/superio.asl @@ -19,13 +19,13 @@ Method (READ, 3) { Acquire (SIOM, 0xffff) - If (LEqual(Arg0, 0)) { - Store (0x55, INDX) - Store (Arg1, INDX) - Store (DATA, Local1) - Store (0xaa, INDX) + If (Arg0 == 0) { + INDX = 0x55 + INDX = Arg1 + Local1 = DATA + INDX = 0xaa } - And (Local1, Arg2, Local1) + Local1 &= Arg2 Release(SIOM) Return(Local1) } @@ -33,11 +33,11 @@ Method (WRIT, 3) { Acquire (SIOM, 0xffff) - If (LEqual(Arg0, 0)) { - Store (0x55, INDX) - Store (Arg1, INDX) - Store (Arg2, DATA) - Store (0xaa, INDX) + If (Arg0 == 0) { + INDX = 0x55 + INDX = Arg1 + DATA = Arg2 + INDX = 0xaa } Release(SIOM) } @@ -52,18 +52,18 @@ Method (_STA, 0) { // Device disabled by coreboot? - If (LEqual(CMAP, 0)) { + If (CMAP == 0) { Return (0) } // Is the hardware enabled? - Store (READ(0, 0x24, 0xff), Local0) - If (LEqual(Local0, 0)) { + Local0 = READ (0, 0x24, 0xff) + If (Local0 == 0) { Return (0xd) } Else { // Power Enabled? - Store (READ(0, 0x02, 0x08), Local0) - If (LEqual(Local0, 0)) { + Local0 = READ (0, 0x02, 0x08) + If (Local0 == 0) { Return (0x0d) } Else { Return (0x0f) @@ -76,12 +76,12 @@ { WRIT(0, 0x24, 0x00) - Store(READ(0, 0x28, 0x0f), Local0) + Local0 = READ (0, 0x28, 0x0f) WRIT(0, 0x28, Local0) - Store(READ(0, 0x02, 0xff), Local0) - Not(0x08, Local1) - And(Local0, Local1, Local0) + Local0 = READ(0, 0x02, 0xff) + Local1 = 0x08 + Local0 &= Local1 WRIT(0, 0x02, Local0) } @@ -106,8 +106,8 @@ IRQNoFlags(_IRA) { 4 } }) - And (_STA(), 0x02, Local0) - If (LEqual(Local0, 0)) { + Local0 = _STA() & 0x02 + If (Local0 == 0) { Return(NONE) } @@ -119,15 +119,15 @@ \_SB.PCI0.LPCB.SIO1.COMA._CRS._IRA._INT, IRQ) /* I/O Base */ - Store (READ(0, 0x24, 0xfe), Local0) - ShiftLeft(Local0, 0x02, Local0) - Store(Local0, IOMN) - Store(Local0, IOMX) + Local0 = READ (0, 0x24, 0xfe) + Local0 <<= 2 + IOMN = Local0 + IOMX = Local0 /* Interrupt */ - Store(READ(0, 0x28, 0xf0), Local0) - ShiftRight(Local0, 4, Local0) - ShiftLeft(1, Local0, IRQ) + Local0 = READ (0, 0x28, 0xf0) + Local0 >>= 4 + IRQ = 1 << Local0 Return(RSRC) } @@ -140,29 +140,29 @@ WRIT(0, 0x24, 0) FindSetRightBit(IRQL, Local0) - Decrement(Local0) - ShiftLeft(Local0, 4, Local0) + Local0-- + Local0 <<= 4 - Store(READ(0, 0x28, 0x0f), Local1) - Or(Local0, Local1, Local0) + Local1 = READ (0, 0x28, 0x0f) + Local0 |= Local1 WRIT(0, 0x28, Local0) - Store(IOLO, Local0) - ShiftRight(Local0, 2, Local0) - And(Local0, 0xfe, Local0) + Local0 = IOLO + Local0 >>= 2 + Local0 &= 0xfe - Store(IOHI, Local1) - ShiftLeft(Local1, 6, Local1) - Or (Local0, Local1, Local0) + Local1 = IOHI + Local1 <<= 6 + Local0 |= Local1 WRIT(0, 0x24, Local0) - Store(READ(0, 0x02, 0xff), Local0) - Or(Local0, 0x08, Local0) + Local0 = READ(0, 0x02, 0xff) + Local0 |= 0x08 WRIT(0, 0x02, Local0) - Store(READ(0, 0x07, 0xff), Local0) - Not(0x40, Local1) - And (Local0, Local1, Local0) + Local0 = READ (0, 0x07, 0xff) + Local1 = ~0x40 + Local0 &= Local1 WRIT(0, 0x07, Local0) } @@ -170,22 +170,22 @@ /* D0 state - Line drivers are on */ Method (_PS0, 0) { - Store(READ(0, 0x02, 0xff), Local0) - Or(Local0, 0x08, Local0) + Local0 = READ(0, 0x02, 0xff) + Local0 |= 0x08 WRIT(0, 0x02, Local0) - Store (READ(0, 0x07, 0xff), Local0) - Not(0x40, Local1) - And(Local0, Local1, Local0) + Local0 = READ (0, 0x07, 0xff) + Local1 = ~0x40 + Local0 &= Local1 WRIT(0, 0x07, Local0) } /* D3 State - Line drivers are off */ Method(_PS3, 0) { - Store(READ(0, 0x02, 0xff), Local0) - Not(0x08, Local1) - And(Local0, Local1, Local0) + Local0 = READ(0, 0x02, 0xff) + Local1 = 0x08 + Local0 &= Local1 WRIT(0, 0x02, Local0) } } @@ -200,24 +200,24 @@ Method (_STA, 0) { // Device disabled by coreboot? - If (LEqual(CMBP, 0)) { + If (CMBP == 0) { Return (0) } /* IRDA? */ - Store(READ(0, 0x0c, 0x38), Local0) - If (LNotEqual(Local0, Zero)) { + Local0 = READ (0, 0x0c, 0x38) + If (Local0 != 0) { Return (0) } // Is the hardware enabled? - Store (READ(0, 0x25, 0xff), Local0) - If (LEqual(Local0, 0)) { + Local0 = READ (0, 0x25, 0xff) + If (Local0 == 0) { Return (0xd) } Else { // Power Enabled? - Store (READ(0, 0x02, 0x80), Local0) - If (LEqual(Local0, 0)) { + Local0 = READ (0, 0x02, 0x80) + If (Local0 == 0) { Return (0x0d) } Else { Return (0x0f) @@ -230,12 +230,12 @@ { WRIT(0, 0x25, 0x00) - Store(READ(0, 0x28, 0xf0), Local0) + Local0 = READ (0, 0x28, 0xf0) WRIT(0, 0x28, Local0) - Store(READ(0, 0x02, 0xff), Local0) - Not(0x80, Local1) - And(Local0, Local1, Local0) + Local0 = READ(0, 0x02, 0xff) + Local1 = ~0x80 + Local0 &= Local1 WRIT(0, 0x02, Local0) } @@ -260,8 +260,8 @@ IRQNoFlags(_IRB) { 3 } }) - And (_STA(), 0x02, Local0) - If (LEqual(Local0, 0)) { + Local0 = _STA() & 0x02 + If (Local0 == 0) { Return(NONE) } @@ -273,14 +273,14 @@ \_SB.PCI0.LPCB.SIO1.COMB._CRS._IRB._INT, IRQ) /* I/O Base */ - Store (READ(0, 0x25, 0xfe), Local0) - ShiftLeft(Local0, 0x02, Local0) - Store(Local0, IOMN) - Store(Local0, IOMX) + Local0 = READ (0, 0x25, 0xfe) + Local0 <<= 2 + IOMN = Local0 + IOMX = Local0 /* Interrupt */ - Store(READ(0, 0x28, 0x0f), Local0) - ShiftLeft(1, Local0, IRQ) + Local0 = READ (0, 0x28, 0x0f) + IRQ = 1 << Local0 Return(RSRC) } @@ -293,55 +293,55 @@ WRIT(0, 0x25, 0) FindSetRightBit(IRQL, Local0) - Decrement(Local0) + Local0-- - Store(READ(0, 0x28, 0xf0), Local1) - Or(Local0, Local1, Local0) + Local1 = READ (0, 0x28, 0xf0) + Local0 |= Local1 WRIT(0, 0x28, Local0) - Store(IOLO, Local0) - ShiftRight(Local0, 2, Local0) - And(Local0, 0xfe, Local0) + Local0 = IOLO + Local0 >>= 2 + Local0 &= 0xfe - Store(IOHI, Local1) - ShiftLeft(Local1, 6, Local1) - Or (Local0, Local1, Local0) + Local1 = IOHI + Local1 <<= 6 + Local0 |= Local1 WRIT(0, 0x25, Local0) - Store(READ(0, 0x0c, 0xff), Local0) - Not(0x38, Local1) - And(Local0, Local1, Local0) + Local0 = READ (0, 0x0c, 0xff) + Local1 = ~0x38 + Local0 &= Local1 WRIT(0, 0x0c, Local0) - Store(READ(0, 0x02, 0xff), Local0) - Or(Local0, 0x80, Local0) + Local0 = READ(0, 0x02, 0xff) + Local0 |= 0x80 WRIT(0, 0x02, Local0) - Store(READ(0, 0x07, 0xff), Local0) - Not(0x20, Local1) - And (Local0, Local1, Local0) + Local0 = READ (0, 0x07, 0xff) + Local1 = ~0x20 + Local0 &= Local1 WRIT(0, 0x07, Local0) } /* D0 state - Line drivers are on */ Method (_PS0, 0) { - Store(READ(0, 0x02, 0xff), Local0) - Or(Local0, 0x80, Local0) + Local0 = READ(0, 0x02, 0xff) + Local0 |= 0x80 WRIT(0, 0x02, Local0) - Store (READ(0, 0x07, 0xff), Local0) - Not(0x20, Local1) - And(Local0, Local1, Local0) + Local0 = READ (0, 0x07, 0xff) + Local1 = ~0x20 + Local0 &= Local1 WRIT(0, 0x07, Local0) } /* D3 State - Line drivers are off */ Method(_PS3, 0) { - Store(READ(0, 0x02, 0xff), Local0) - Not(0x80, Local1) - And(Local0, Local1, Local0) + Local0 = READ(0, 0x02, 0xff) + Local1 = ~0x80 + Local0 &= Local1 WRIT(0, 0x02, Local0) } } diff --git a/src/mainboard/roda/rk9/acpi/thermal.asl b/src/mainboard/roda/rk9/acpi/thermal.asl index c9bc4d5..907edc1 100644 --- a/src/mainboard/roda/rk9/acpi/thermal.asl +++ b/src/mainboard/roda/rk9/acpi/thermal.asl @@ -43,18 +43,18 @@ Method (_TMP, 0, Serialized) { If (\_SB.PCI0.LPCB.EC0.ALRC) { - Store(0, \_SB.PCI0.LPCB.EC0.ALRC) + \_SB.PCI0.LPCB.EC0.ALRC = 0 Return(_AC0()) } If (\_SB.PCI0.LPCB.EC0.ALRL) { - Store(0, THRO) - Store(0, \_SB.PCI0.LPCB.EC0.ALRL) + THRO = 0 + \_SB.PCI0.LPCB.EC0.ALRL = 0 } If (\_SB.PCI0.LPCB.EC0.ALRH) { - Store(1, THRO) - Store(0, \_SB.PCI0.LPCB.EC0.ALRH) + THRO = 1 + \_SB.PCI0.LPCB.EC0.ALRH = 0 } /* vendor BIOS reports 0K if TCPU >= 128 deg C ?!? */ -- To view, visit https://review.coreboot.org/c/coreboot/+/46210 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3cfa9d3a199a33ac8faddf4dbc1eed0df8703835 Gerrit-Change-Number: 46210 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 4

Change in coreboot[master]: mb/roda/rv11: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 26 Jan '21

26 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46211 ) Change subject: mb/roda/rv11: Convert to ASL 2.0 syntax ...................................................................... mb/roda/rv11: Convert to ASL 2.0 syntax Change-Id: Id12c20dbe949c4badfe07578c6d202cd4cfb8191 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/roda/rv11/acpi/alsd.asl M src/mainboard/roda/rv11/acpi/thermal.asl 2 files changed, 23 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/46211/1 diff --git a/src/mainboard/roda/rv11/acpi/alsd.asl b/src/mainboard/roda/rv11/acpi/alsd.asl index f910dc6..b3028e3 100644 --- a/src/mainboard/roda/rv11/acpi/alsd.asl +++ b/src/mainboard/roda/rv11/acpi/alsd.asl @@ -10,12 +10,12 @@ Method (_ALI, 0, NotSerialized) // _ALI: Ambient Light Illuminance { - Store (\_SB.PCI0.LPCB.EC0.LUXH, Local0) - Or (ShiftLeft (Local0, 8), \_SB.PCI0.LPCB.EC0.LUXL, Local0) - Store ("-----> _ALI: ", Debug) - Store (Local0, Debug) - Store (\_SB.PCI0.LPCB.EC0.LUXH, Debug) - Store (\_SB.PCI0.LPCB.EC0.LUXL, Debug) + Local0 = \_SB.PCI0.LPCB.EC0.LUXH + Local0 = (Local0 << 8) | \_SB.PCI0.LPCB.EC0.LUXL + Debug = "-----> _ALI: " + Debug = Local0 + Debug = \_SB.PCI0.LPCB.EC0.LUXH + Debug = \_SB.PCI0.LPCB.EC0.LUXL Return (Local0) } diff --git a/src/mainboard/roda/rv11/acpi/thermal.asl b/src/mainboard/roda/rv11/acpi/thermal.asl index 7f356e3..1d18781 100644 --- a/src/mainboard/roda/rv11/acpi/thermal.asl +++ b/src/mainboard/roda/rv11/acpi/thermal.asl @@ -10,10 +10,10 @@ // Convert from Degrees C to 1/10 Kelvin for ACPI Method (CTOK, 1) { // 10th of Degrees C - Multiply (Arg0, 10, Local0) + Local0 = Arg0 * 10 // Convert to Kelvin - Add (Local0, 2732, Local0) + Local0 += 2732 Return (Local0) } @@ -49,17 +49,17 @@ Method (_TMP, 0, NotSerialized) // _TMP: Temperature { - Store (\_SB.PCI0.LPCB.EC0.CPUT, Local0) + Local0 = \_SB.PCI0.LPCB.EC0.CPUT If (Local0 >= 0x80) { - Store ("-----> CPU Temperature (INVALID): ", Debug) - Store (Local0, Debug) + Debug = "-----> CPU Temperature (INVALID): " + Debug = Local0 Return (CTOK (0)) } - Store ("-----> CPU Temperature: ", Debug) - Store (Local0, Debug) + Debug = "-----> CPU Temperature: " + Debug = Local0 Return (CTOK (Local0)) } @@ -82,17 +82,17 @@ Method (_TMP, 0, NotSerialized) // _TMP: Temperature { - Store (\_SB.PCI0.LPCB.EC0.LOCT, Local0) + Local0 = \_SB.PCI0.LPCB.EC0.LOCT If (Local0 >= 0x80) { - Store ("-----> LOC Temperature (INVALID): ", Debug) - Store (Local0, Debug) + Debug = "-----> LOC Temperature (INVALID): " + Debug = Local0 Return (CTOK (0)) } - Store ("-----> LOC Temperature: ", Debug) - Store (Local0, Debug) + Debug = "-----> LOC Temperature: " + Debug = Local0 Return (CTOK (Local0)) } @@ -114,17 +114,17 @@ Method (_TMP, 0, NotSerialized) // _TMP: Temperature { - Store (\_SB.PCI0.LPCB.EC0.OEMT, Local0) + Local0 = \_SB.PCI0.LPCB.EC0.OEMT If (Local0 >= 0x80) { - Store ("-----> OEM Temperature (INVALID): ", Debug) - Store (Local0, Debug) + Debug = "-----> OEM Temperature (INVALID): " + Debug = Local0 Return (CTOK (0)) } - Store ("-----> OEM Temperature: ", Debug) - Store (Local0, Debug) + Debug = "-----> OEM Temperature: " + Debug = Local0 Return (CTOK (Local0)) } -- To view, visit https://review.coreboot.org/c/coreboot/+/46211 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id12c20dbe949c4badfe07578c6d202cd4cfb8191 Gerrit-Change-Number: 46211 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 3

Change in coreboot[master]: mb/google/stout: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 26 Jan '21

26 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46180 ) Change subject: mb/google/stout: Convert to ASL 2.0 syntax ...................................................................... mb/google/stout: Convert to ASL 2.0 syntax Change-Id: I1ceb2abdd2562c145b01db7307d817c858d6b978 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/google/stout/acpi/mainboard.asl M src/mainboard/google/stout/acpi/platform.asl M src/mainboard/google/stout/acpi/thermal.asl 3 files changed, 16 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/46180/1 diff --git a/src/mainboard/google/stout/acpi/mainboard.asl b/src/mainboard/google/stout/acpi/mainboard.asl index 6cbe92e..f8cbe21 100644 --- a/src/mainboard/google/stout/acpi/mainboard.asl +++ b/src/mainboard/google/stout/acpi/mainboard.asl @@ -9,14 +9,14 @@ Method (_LID, 0) { - Store (\_SB.PCI0.LPCB.EC0.HPLD, \LIDS) + \LIDS = \_SB.PCI0.LPCB.EC0.HPLD Return (\LIDS) } Method (_PSW, 1) { // Enable/Disable LID as a wake source - Store (Arg0, \_SB.PCI0.LPCB.EC0.HWLO) + \_SB.PCI0.LPCB.EC0.HWLO = Arg0 } } } diff --git a/src/mainboard/google/stout/acpi/platform.asl b/src/mainboard/google/stout/acpi/platform.asl index 8220599..b3421d5 100644 --- a/src/mainboard/google/stout/acpi/platform.asl +++ b/src/mainboard/google/stout/acpi/platform.asl @@ -7,7 +7,7 @@ Method(_PTS,1) { // Notify EC to enter S3 - Store(0x01, \_SB.PCI0.LPCB.EC0.S3FG) + \_SB.PCI0.LPCB.EC0.S3FG = 0x01 } /* The _WAK method is called on system wakeup */ @@ -15,16 +15,16 @@ Method(_WAK,1) { /* Update AC status */ - Store (\_SB.PCI0.LPCB.EC0.ACPW, Local0) - if (LNotEqual (Local0, \PWRS)) { - Store (Local0, \PWRS) + Local0 = \_SB.PCI0.LPCB.EC0.ACPW + if (Local0 != \PWRS) { + \PWRS = Local0 Notify (\_SB.PCI0.LPCB.EC0.AC, 0x80) } /* Update LID status */ - Store (NOT(\_SB.PCI0.LPCB.EC0.HPLD), Local0) - if (LNotEqual (Local0, \LIDS)) { - Store (Local0, \LIDS) + Local0 = ~\_SB.PCI0.LPCB.EC0.HPLD + if (Local0 != \LIDS) { + \LIDS = Local0 Notify (\_SB.LID0, 0x80) } diff --git a/src/mainboard/google/stout/acpi/thermal.asl b/src/mainboard/google/stout/acpi/thermal.asl index 2484332..72324d7 100644 --- a/src/mainboard/google/stout/acpi/thermal.asl +++ b/src/mainboard/google/stout/acpi/thermal.asl @@ -22,10 +22,10 @@ Method (CTOK, 1) { // 10th of Degrees C - Multiply (Arg0, 10, Local0) + Local0 = Arg0 * 10 // Convert to Kelvin - Add (Local0, 2732, Local0) + Local0 += 2732 Return (Local0) } @@ -51,21 +51,21 @@ Method (_TMP, 0, Serialized) { // Returns Higher of the two readings for CPU & VGA Temperature - If (LGreater (\_SB.PCI0.LPCB.EC0.TMP2, \_SB.PCI0.LPCB.EC0.TMP1)) + If (\_SB.PCI0.LPCB.EC0.TMP2 > \_SB.PCI0.LPCB.EC0.TMP1) { // CPU high temperature - Store (\_SB.PCI0.LPCB.EC0.TMP2, Local0) + Local0 = \_SB.PCI0.LPCB.EC0.TMP2 } Else { // VGA high temperature - Store (\_SB.PCI0.LPCB.EC0.TMP1, Local0) + Local0 = \_SB.PCI0.LPCB.EC0.TMP1 } // If temp less 35 or great then 115, set default 35 - If (Or (LLess (Local0, 35), LGreater (Local0, 115))) + If ((Local0 < 35) || (Local0 > 115)) { - Store (35, Local0) + Local0 = 35 } Return (CTOK (Local0)) -- To view, visit https://review.coreboot.org/c/coreboot/+/46180 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ceb2abdd2562c145b01db7307d817c858d6b978 Gerrit-Change-Number: 46180 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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