David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35320 )
Change subject: soc/fsp_broadwell_de: Move function to get CPUBUSNO(1) into common file
......................................................................
Patch Set 5: Code-Review+2
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34089 )
Change subject: src/soc/intel/common/itss: Add support to get IRQ configuration for PCI devices
......................................................................
Patch Set 19:
(3 comments)
https://review.coreboot.org/c/coreboot/+/34089/19/src/soc/intel/common/bloc…
File src/soc/intel/common/block/itss/irq.c:
https://review.coreboot.org/c/coreboot/+/34089/19/src/soc/intel/common/bloc…
PS19, Line 31: alteast
at least
https://review.coreboot.org/c/coreboot/+/34089/19/src/soc/intel/common/bloc…
PS19, Line 69: printk(BIOS_ERR, "LPSS controller D: 0x%x F: 0x%x uses irq %d"
: ", conflicts with gpio mapped to irq %d\n",
: irq_entry->slot, irq_entry->func, int_lpss,
: int_lpss);
Shouldn't we die() with this? It means there's a fatal configuration error, and I'm assuming that the affected LPSS device's IRQ won't function as expected?
https://review.coreboot.org/c/coreboot/+/34089/19/src/soc/intel/common/bloc…
PS19, Line 108: create_irq_entry(dev, &irq_entry);
: irq_config[index] = irq_entry;
You could just do create_irq_entry(dev, &irq_config[index]) to avoid the extra copy
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Gerrit-Comment-Date: Fri, 20 Sep 2019 20:28:09 +0000
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Hello Patrick Rudolph, Patrick Rudolph, David Hendricks, Philipp Deppenwiese, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35322
to look at the new patch set (#8).
Change subject: mainboard/ocp/monolake: Hide internal NIC
......................................................................
mainboard/ocp/monolake: Hide internal NIC
Disable root port IOU0 to which built-in NIC is attached.
TEST=on OCP monolake, hide built-in NIC and make sure OS does not report
built-in NIC
Change-Id: I2384e7dd073355f0ced2902ac2d8418996b1c5aa
Signed-off-by: Andrey Petrov <anpetrov(a)fb.com>
---
M src/mainboard/ocp/monolake/devicetree.cb
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/35322/8
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Hello Werner Zeh, Patrick Rudolph, Matt DeVillier, David Hendricks, Philipp Deppenwiese, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35320
to look at the new patch set (#5).
Change subject: soc/fsp_broadwell_de: Move function to get CPUBUSNO(1) into common file
......................................................................
soc/fsp_broadwell_de: Move function to get CPUBUSNO(1) into common file
Change-Id: I189eb8ffce2f0735ad9ba603b1d96786aa00fafb
Signed-off-by: Andrey Petrov <anpetrov(a)fb.com>
---
M src/soc/intel/fsp_broadwell_de/include/soc/pci_devs.h
M src/soc/intel/fsp_broadwell_de/include/soc/vtd.h
M src/soc/intel/fsp_broadwell_de/romstage/romstage.c
3 files changed, 19 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/35320/5
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Hello Werner Zeh, Patrick Rudolph, Patrick Rudolph, Matt DeVillier, David Hendricks, Philipp Deppenwiese, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#7).
Change subject: soc/fsp_broadwell_de: Add devhide functionality
......................................................................
soc/fsp_broadwell_de: Add devhide functionality
Add function to hide IIO PCIe root ports.
TEST=On OCP Monolake, hide built-in NIC PCIe root port [0.2.2 and 0.2.3]
and make sure OS does not detect built-in NIC.
Change-Id: I2fcac5b7d9a7a52a2801c010bfccf247f2a44581
Signed-off-by: Andrey Petrov <anpetrov(a)fb.com>
---
M src/soc/intel/fsp_broadwell_de/include/soc/pci_devs.h
M src/soc/intel/fsp_broadwell_de/include/soc/ubox.h
M src/soc/intel/fsp_broadwell_de/romstage/romstage.c
M src/soc/intel/fsp_broadwell_de/southcluster.c
4 files changed, 60 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/35321/7
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