coreboot-gerrit September 2019

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mediatek/mt8183: Use different DRAM frequencies for eMCP DDR
by Hung-Te Lin (Code Review) 23 Sep '19

23 Sep '19

Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34990 ) Change subject: mediatek/mt8183: Use different DRAM frequencies for eMCP DDR ...................................................................... Patch Set 35: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/34990 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab6a9c2c390feeb9497b051a255b29566909e656 Gerrit-Change-Number: 34990 Gerrit-PatchSet: 35 Gerrit-Owner: huayang duan <huayangduan(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: SJ Huang <sj.huang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: You-Cheng Syu <youcheng(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: huayang duan <huayangduan(a)gmail.com> Gerrit-CC: Huayang Duan <huayang.duan(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 23 Sep 2019 06:46:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/cse: Add boot partition related APIs
by Rizwan Qureshi (Code Review) 23 Sep '19

23 Sep '19

Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35402 ) Change subject: soc/intel/common/block/cse: Add boot partition related APIs ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… File src/soc/intel/common/block/include/intelblocks/cse.h: https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… PS6, Line 147: MAX_ME_PARTITIONS > There are three things here: […] Ok, We should add a config to indicate if the FWU is supported on the platform, and then we can tie "Max number of the partitions" config to that one. -- To view, visit https://review.coreboot.org/c/coreboot/+/35402 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa62409c0616d5913d21374a8a6804f82258eb4f Gerrit-Change-Number: 35402 Gerrit-PatchSet: 6 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 23 Sep 2019 06:42:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/cse: Add boot partition related APIs
by Rizwan Qureshi (Code Review) 23 Sep '19

23 Sep '19

Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35402 ) Change subject: soc/intel/common/block/cse: Add boot partition related APIs ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/coreboot/+/35402/6//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/35402/6//COMMIT_MSG@7 PS6, Line 7: APIs > Are these APIs supported by all platforms? No, these are news APIs and will be supported 14.0 onwards. All prior versions will not support this and also none of the TXE versions, i.e., 3.0 and 4.0 will support them. CSME will report result as UNSUPPORTED in response, when this request is sent in an unsupported platform. -- To view, visit https://review.coreboot.org/c/coreboot/+/35402 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa62409c0616d5913d21374a8a6804f82258eb4f Gerrit-Change-Number: 35402 Gerrit-PatchSet: 6 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 23 Sep 2019 06:34:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/basecode: Add support for updating ucode loaded via FIT
by Rizwan Qureshi (Code Review) 23 Sep '19

23 Sep '19

Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27369 ) Change subject: soc/intel/basecode: Add support for updating ucode loaded via FIT ...................................................................... Patch Set 48: (1 comment) https://review.coreboot.org/c/coreboot/+/27369/46/src/soc/intel/common/base… File src/soc/intel/common/basecode/fw_update/ucode_update.c: https://review.coreboot.org/c/coreboot/+/27369/46/src/soc/intel/common/base… PS46, Line 33: __weak void ucode_update_reboot(void) > provide an option for the caller to define their own reset function, if they want to do any housekee […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/27369 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab6ba36a2eb587f331fe522c778e2c430c8eb655 Gerrit-Change-Number: 27369 Gerrit-PatchSet: 48 Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Dhaval Sharma <dhaval.v.sharma(a)intel.corp-partner.google.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-CC: rushikesh s kadam <rushikesh.s.kadam(a)intel.com> Gerrit-Comment-Date: Mon, 23 Sep 2019 05:36:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <siro(a)das-labor.org> Comment-In-Reply-To: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/gigabyte/ga-h61m-s2pv: Improve LPC decoding
by Angel Pons (Code Review) 22 Sep '19

22 Sep '19

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35444 ) Change subject: mb/gigabyte/ga-h61m-s2pv: Improve LPC decoding ...................................................................... mb/gigabyte/ga-h61m-s2pv: Improve LPC decoding Drop unused CNF2_LPC_EN, as there is no device which uses IO 0x4e/4f. Do not use the mainboard model to set COMA_LPC_EN. Make use of NO_UART_ON_SUPERIO instead, as it is more future-proof. Change-Id: Iac49250b0f509a42012f82db8aa85ba85559c66f Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c 1 file changed, 4 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/35444/1 diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c index 27fbb2c..a51595f 100644 --- a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c +++ b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c @@ -25,14 +25,11 @@ void pch_enable_lpc(void) { - if (CONFIG(BOARD_GIGABYTE_GA_H61M_S2PV)) { - pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | - CNF1_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN); - pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10); + pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | CNF1_LPC_EN); - } else if (CONFIG(BOARD_GIGABYTE_GA_H61MA_D3V)) { - pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | - CNF1_LPC_EN); + if (!CONFIG(NO_UART_ON_SUPERIO)) { + pci_or_config16(PCH_LPC_DEV, LPC_EN, COMA_LPC_EN); + pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10); } } -- To view, visit https://review.coreboot.org/c/coreboot/+/35444 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac49250b0f509a42012f82db8aa85ba85559c66f Gerrit-Change-Number: 35444 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/mainboard/hatch: add spd: 8G_3200 for Akemi
by Peichao Li (Code Review) 22 Sep '19

22 Sep '19

Peichao Li has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35511 ) Change subject: mb/mainboard/hatch: add spd: 8G_3200 for Akemi ...................................................................... mb/mainboard/hatch: add spd: 8G_3200 for Akemi BUG=b:140545732 TEST=build bios and spd index set to 6, verify DUT bring up normally Signed-off-by: Peichao Wang <peichao.wang(a)bitland.corp-partner.google.com> Change-Id: I337b0bdcd37a9c4baacccbc6786968031a41b31e --- M src/mainboard/google/hatch/variants/akemi/Makefile.inc 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/35511/1 diff --git a/src/mainboard/google/hatch/variants/akemi/Makefile.inc b/src/mainboard/google/hatch/variants/akemi/Makefile.inc index 6cabe91..e86b4dd 100644 --- a/src/mainboard/google/hatch/variants/akemi/Makefile.inc +++ b/src/mainboard/google/hatch/variants/akemi/Makefile.inc @@ -18,6 +18,7 @@ SPD_SOURCES += 8G_2666 # 0b011 SPD_SOURCES += 16G_2400 # 0b100 SPD_SOURCES += 16G_2666 # 0b101 +SPD_SOURCES += 8G_3200 # 0b110 bootblock-y += gpio.c ramstage-y += gpio.c -- To view, visit https://review.coreboot.org/c/coreboot/+/35511 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I337b0bdcd37a9c4baacccbc6786968031a41b31e Gerrit-Change-Number: 35511 Gerrit-PatchSet: 1 Gerrit-Owner: Peichao Li <peichao.wang(a)bitland.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/ocp/monolake: Add vboot RO only support
by Philipp Deppenwiese (Code Review) 22 Sep '19

22 Sep '19

Philipp Deppenwiese has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35492 ) Change subject: mb/ocp/monolake: Add vboot RO only support ...................................................................... mb/ocp/monolake: Add vboot RO only support Change-Id: I28a21d64e2781af294670a94c1fc88fb81e80f9e Signed-off-by: Philipp Deppenwiese <zaolin(a)das-labor.org> --- M src/mainboard/ocp/monolake/Kconfig M src/mainboard/ocp/monolake/cmos.layout A src/mainboard/ocp/monolake/vboot-ro.fmd 3 files changed, 31 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/35492/1 diff --git a/src/mainboard/ocp/monolake/Kconfig b/src/mainboard/ocp/monolake/Kconfig index 9536c30..ad4e9c7 100644 --- a/src/mainboard/ocp/monolake/Kconfig +++ b/src/mainboard/ocp/monolake/Kconfig @@ -14,6 +14,14 @@ select MAINBOARD_HAS_TPM1 select IPMI_KCS +config VBOOT + select VBOOT_VBNV_CMOS + select VBOOT_NO_BOARD_SUPPORT + select GBB_FLAG_DISABLE_LID_SHUTDOWN + select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_FWMP + config INTEGRATED_UART def_bool n diff --git a/src/mainboard/ocp/monolake/cmos.layout b/src/mainboard/ocp/monolake/cmos.layout index 3c5bc3b..3aaa56b 100644 --- a/src/mainboard/ocp/monolake/cmos.layout +++ b/src/mainboard/ocp/monolake/cmos.layout @@ -81,6 +81,7 @@ 408 1 e 1 nmi 409 2 e 7 power_on_after_fail #411 5 r 0 unused +416 128 r 0 vbnv # MRC Scrambler Seed values 896 32 r 0 mrc_scrambler_seed diff --git a/src/mainboard/ocp/monolake/vboot-ro.fmd b/src/mainboard/ocp/monolake/vboot-ro.fmd new file mode 100644 index 0000000..0530cf8 --- /dev/null +++ b/src/mainboard/ocp/monolake/vboot-ro.fmd @@ -0,0 +1,22 @@ +FLASH 16M { + SI_ALL@0x0 0x800000 { + SI_DESC@0x0 0x1000 + SI_ME@0x1000 0x7ff000 + } + SI_BIOS@0x800000 0x800000 { + MISC_RW@0x0 0x20000 { + RW_MRC_CACHE@0x0 0x10000 + RW_VPD(PRESERVE)@0x010000 0x4000 + } + WP_RO@0x020000 0x7e0000 { + RO_VPD(PRESERVE)@0x0 0x4000 + RO_SECTION@0x4000 0x7dc000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0xef000 + COREBOOT(CBFS)@0xf0000 0x6ec000 + } + } + } +} \ No newline at end of file -- To view, visit https://review.coreboot.org/c/coreboot/+/35492 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28a21d64e2781af294670a94c1fc88fb81e80f9e Gerrit-Change-Number: 35492 Gerrit-PatchSet: 1 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/hatch: Add G2Touch Touchscreen support
by Chen Wisley (Code Review) 22 Sep '19

22 Sep '19

Chen Wisley has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35470 ) Change subject: mb/google/hatch: Add G2Touch Touchscreen support ...................................................................... mb/google/hatch: Add G2Touch Touchscreen support Add G2Touch Touchscreen support for dratini BUG=b:141281841 TEST=emerge-hatch coreboot chromeos-bootimage, and check touchscreen work. Change-Id: I0dbde7f8396da6335b22aeb4a9703336e2b862b8 Signed-off-by: Wisley Chen <wisley.chen(a)quantatw.com> --- M src/mainboard/google/hatch/variants/dratini/overridetree.cb 1 file changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/35470/1 diff --git a/src/mainboard/google/hatch/variants/dratini/overridetree.cb b/src/mainboard/google/hatch/variants/dratini/overridetree.cb index b2ec3d7..65649d1 100644 --- a/src/mainboard/google/hatch/variants/dratini/overridetree.cb +++ b/src/mainboard/google/hatch/variants/dratini/overridetree.cb @@ -65,6 +65,20 @@ end end # I2C #0 device pci 15.1 on + chip drivers/i2c/hid + register "generic.hid" = ""GTCH7503"" + register "generic.desc" = ""G2TOUCH Touchscreen"" + register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)" + register "generic.probed" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)" + register "generic.reset_delay_ms" = "50" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)" + register "generic.enable_delay_ms" = "1" + register "generic.has_power_resource" = "1" + register "generic.disable_gpio_export_in_crs" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 40 on end + end chip drivers/i2c/generic register "hid" = ""ELAN0001"" register "desc" = ""ELAN Touchscreen"" -- To view, visit https://review.coreboot.org/c/coreboot/+/35470 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0dbde7f8396da6335b22aeb4a9703336e2b862b8 Gerrit-Change-Number: 35470 Gerrit-PatchSet: 1 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/facebook/watson: Enable vboot for measurements
by David Hendricks (Code Review) 22 Sep '19

22 Sep '19

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35232 ) Change subject: mb/facebook/watson: Enable vboot for measurements ...................................................................... mb/facebook/watson: Enable vboot for measurements Signed-off-by: Philipp Deppenwiese <philipp.deppenwiese(a)9elements.com> Change-Id: I8287d475301aaaae736df9cc95fcd18cc04b40fb --- M src/mainboard/facebook/watson/Kconfig M src/mainboard/facebook/watson/cmos.layout A src/mainboard/facebook/watson/vboot-ro.fmd 3 files changed, 35 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/35232/1 diff --git a/src/mainboard/facebook/watson/Kconfig b/src/mainboard/facebook/watson/Kconfig index 43b4784..3235b6c 100644 --- a/src/mainboard/facebook/watson/Kconfig +++ b/src/mainboard/facebook/watson/Kconfig @@ -13,6 +13,14 @@ select MAINBOARD_HAS_TPM1 select NO_UART_ON_SUPERIO +config VBOOT + select VBOOT_VBNV_CMOS + select VBOOT_NO_BOARD_SUPPORT + select GBB_FLAG_DISABLE_LID_SHUTDOWN + select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_FWMP + config MAINBOARD_DIR string default "facebook/watson" diff --git a/src/mainboard/facebook/watson/cmos.layout b/src/mainboard/facebook/watson/cmos.layout index 85506eb..675370d 100644 --- a/src/mainboard/facebook/watson/cmos.layout +++ b/src/mainboard/facebook/watson/cmos.layout @@ -72,6 +72,7 @@ #392 3 r 0 unused 395 4 e 6 debug_level #399 1 r 0 unused +416 128 r 0 vbnv # coreboot config options: check sums 984 16 h 0 check_sum diff --git a/src/mainboard/facebook/watson/vboot-ro.fmd b/src/mainboard/facebook/watson/vboot-ro.fmd new file mode 100644 index 0000000..bcb075a --- /dev/null +++ b/src/mainboard/facebook/watson/vboot-ro.fmd @@ -0,0 +1,26 @@ +FLASH 16M { + SI_ALL@0x0 0x600000 { + SI_DESC@0x0 0x1000 + UNUSED_1@0x1000 0x1000 + IDPROM@0x2000 0x400 + UNUSED_2@0x2400 0x1ec00 + SI_ME@0x21000 0x3de000 + UNUSED_3@0x400000 0x200000 + } + SI_BIOS@0x600000 0xA00000 { + MISC_RW@0x0 0x20000 { + RW_MRC_CACHE@0x0 0x10000 + RW_VPD(PRESERVE)@0x010000 0x4000 + } + WP_RO@0x20000 0x9e0000 { + RO_VPD(PRESERVE)@0x0 0x4000 + RO_SECTION@0x4000 0x9dc000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0xef000 + COREBOOT(CBFS)@0xf0000 0x8ec000 + } + } + } +} -- To view, visit https://review.coreboot.org/c/coreboot/+/35232 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8287d475301aaaae736df9cc95fcd18cc04b40fb Gerrit-Change-Number: 35232 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: Documentation: Capitalize Super I/O
by Paul Menzel (Code Review) 22 Sep '19

22 Sep '19

Paul Menzel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35487 ) Change subject: Documentation: Capitalize Super I/O ...................................................................... Documentation: Capitalize Super I/O Change-Id: I6bfe11abc1b3763f3d6c390bbccd9191b417945d Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> --- M Documentation/mainboard/supermicro/x10slm-f.md 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/35487/1 diff --git a/Documentation/mainboard/supermicro/x10slm-f.md b/Documentation/mainboard/supermicro/x10slm-f.md index 7abbbfd..4f1daac 100644 --- a/Documentation/mainboard/supermicro/x10slm-f.md +++ b/Documentation/mainboard/supermicro/x10slm-f.md @@ -134,7 +134,7 @@ can't be used for temperature readings. - There is no automatic, OS-independent fan control. This is because - the super I/O hardware monitor can only obtain valid CPU temperature + the Super I/O hardware monitor can only obtain valid CPU temperature readings from the PECI agent, but the required driver doesn't exist in coreboot. The `coretemp` driver can still be used for accurate CPU temperature readings from an OS, and hence the OS can do fan control. -- To view, visit https://review.coreboot.org/c/coreboot/+/35487 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6bfe11abc1b3763f3d6c390bbccd9191b417945d Gerrit-Change-Number: 35487 Gerrit-PatchSet: 1 Gerrit-Owner: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newchange

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coreboot-gerrit September 2019