coreboot-gerrit September 2019

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/fsp_broadwell_de: Implement bank/locator scheme
by David Hendricks (Code Review) 20 Sep '19

20 Sep '19

David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35319 ) Change subject: soc/fsp_broadwell_de: Implement bank/locator scheme ...................................................................... Patch Set 3: Code-Review-1 (2 comments) Commit message needs some minor tweaks. https://review.coreboot.org/c/coreboot/+/35319/3//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/35319/3//COMMIT_MSG@7 PS3, Line 7: soc/fsp_broadwell_de mb/ocp/monolake https://review.coreboot.org/c/coreboot/+/35319/3//COMMIT_MSG@9 PS3, Line 9: UEFI bios. vendor BIOS -- To view, visit https://review.coreboot.org/c/coreboot/+/35319 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia271ff1e596ba469cf42e23d8390401c27670a27 Gerrit-Change-Number: 35319 Gerrit-PatchSet: 3 Gerrit-Owner: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 20 Sep 2019 18:52:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/fsp_broadwell_de: Use DIMM numbers relative to channel
by David Hendricks (Code Review) 20 Sep '19

20 Sep '19

David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35318 ) Change subject: soc/fsp_broadwell_de: Use DIMM numbers relative to channel ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/35318 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e7858545471867a0210e1b9ef646529b8e2a31c Gerrit-Change-Number: 35318 Gerrit-PatchSet: 3 Gerrit-Owner: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Hendricks <dhendrix.sync(a)gmail.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Fri, 20 Sep 2019 18:36:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/cse: Add boot partition related APIs
by Furquan Shaikh (Code Review) 20 Sep '19

20 Sep '19

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Change in coreboot[master]: soc/intel/common/block/cse: Add boot partition related APIs
by Rizwan Qureshi (Code Review) 20 Sep '19

20 Sep '19

Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35402 ) Change subject: soc/intel/common/block/cse: Add boot partition related APIs ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… File src/soc/intel/common/block/include/intelblocks/cse.h: https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… PS6, Line 147: MAX_ME_PARTITIONS > Is this true for all platforms? wanted to use a config for this value for the same reason, however this does not change for the platforms that we foresee in the near future hence decided to keep a fixed value for now. -- To view, visit https://review.coreboot.org/c/coreboot/+/35402 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa62409c0616d5913d21374a8a6804f82258eb4f Gerrit-Change-Number: 35402 Gerrit-PatchSet: 6 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 20 Sep 2019 17:09:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in gerrit-avatars[master]: add my avatar
by Michael Niewöhner (Code Review) 20 Sep '19

20 Sep '19

Michael Niewöhner has uploaded this change for review. ( https://review.coreboot.org/c/gerrit-avatars/+/35483 ) Change subject: add my avatar ...................................................................... add my avatar Change-Id: I830cfbc9042c74d185bc39435eaae6db455e1695 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- A 1002536.jpg 1 file changed, 0 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/gerrit-avatars refs/changes/83/35483/1 diff --git a/1002536.jpg b/1002536.jpg new file mode 100644 index 0000000..6c88278 --- /dev/null +++ b/1002536.jpg Binary files differ -- To view, visit https://review.coreboot.org/c/gerrit-avatars/+/35483 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: gerrit-avatars Gerrit-Branch: master Gerrit-Change-Id: I830cfbc9042c74d185bc39435eaae6db455e1695 Gerrit-Change-Number: 35483 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner Gerrit-MessageType: newchange

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Change in coreboot[master]: [RFC] util/sconfig: Drop topology from early static tree
by Kyösti Mälkki (Code Review) 20 Sep '19

20 Sep '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31936 ) Change subject: [RFC] util/sconfig: Drop topology from early static tree ...................................................................... Patch Set 5: (1 comment) > Patch Set 5: Code-Review+1 > > (1 comment) > > As long as we don't identify devices by their full path, > this makes absolute sense. > > Why the Kconfig, though? I'm eager to find out what > Jenkins has to say :) We need topology in romstages as long as we use some derivative of pcidev_on_root() to find node configs. While I don't like it, some bootblocks seemed to require static devicetree too. I would like to exclude static.c from bootblock-y, smm-y and maybe postcar-y too. Kconfig is introduced to allow make the change gradually. https://review.coreboot.org/c/coreboot/+/31936/3/util/sconfig/main.c File util/sconfig/main.c: https://review.coreboot.org/c/coreboot/+/31936/3/util/sconfig/main.c@803 PS3, Line 803: ops > I'm not sure where the journey goes, currently. Do we want to keep […] CB:33921 possiby did this already. The 'simple device' functions (pci_read/write_config) are not the .ops discussed here. -- To view, visit https://review.coreboot.org/c/coreboot/+/31936 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icdc63123fb8bcb39a0fc86e1e60b8eebb909223c Gerrit-Change-Number: 31936 Gerrit-PatchSet: 5 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 20 Sep 2019 14:29:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC] util/sconfig: Drop topology from early static tree
by Nico Huber (Code Review) 20 Sep '19

20 Sep '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31936 ) Change subject: [RFC] util/sconfig: Drop topology from early static tree ...................................................................... Patch Set 5: Code-Review+1 (1 comment) As long as we don't identify devices by their full path, this makes absolute sense. Why the Kconfig, though? I'm eager to find out what Jenkins has to say :) https://review.coreboot.org/c/coreboot/+/31936/3/util/sconfig/main.c File util/sconfig/main.c: https://review.coreboot.org/c/coreboot/+/31936/3/util/sconfig/main.c@803 PS3, Line 803: ops > should we also drop these elements from the type in non-ramstage environments, so any attempt to use […] I'm not sure where the journey goes, currently. Do we want to keep the `simple device` functions in the long run? If so, this sounds very reasonable. -- To view, visit https://review.coreboot.org/c/coreboot/+/31936 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icdc63123fb8bcb39a0fc86e1e60b8eebb909223c Gerrit-Change-Number: 31936 Gerrit-PatchSet: 5 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 20 Sep 2019 09:47:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mediatek/mt8183: Use different DRAM frequencies for eMCP DDR
by Yu-Ping Wu (Code Review) 20 Sep '19

20 Sep '19

Yu-Ping Wu has uploaded a new patch set (#35) to the change originally created by huayang duan. ( https://review.coreboot.org/c/coreboot/+/34990 ) Change subject: mediatek/mt8183: Use different DRAM frequencies for eMCP DDR ...................................................................... mediatek/mt8183: Use different DRAM frequencies for eMCP DDR Devices using eMCP may run at a high DRAM frequency (e.g., 3600Mbps) while those with discrete DRAM can only run at 3200Mbps. This patch enables 3600Mbps for eMCP DDR for better system performance. BUG=b:80501386 BRANCH=none TEST=Boots correctly and stress test passes on Kukui Change-Id: Iab6a9c2c390feeb9497b051a255b29566909e656 Signed-off-by: Huayang Duan <huayang.duan(a)mediatek.com> --- M src/soc/mediatek/mt8183/emi.c M src/soc/mediatek/mt8183/include/soc/dramc_common_mt8183.h 2 files changed, 27 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/34990/35 -- To view, visit https://review.coreboot.org/c/coreboot/+/34990 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab6a9c2c390feeb9497b051a255b29566909e656 Gerrit-Change-Number: 34990 Gerrit-PatchSet: 35 Gerrit-Owner: huayang duan <huayangduan(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: SJ Huang <sj.huang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: You-Cheng Syu <youcheng(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: huayang duan <huayangduan(a)gmail.com> Gerrit-CC: Huayang Duan <huayang.duan(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/block/cse: Add boot partition related APIs
by Furquan Shaikh (Code Review) 20 Sep '19

20 Sep '19

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35402 ) Change subject: soc/intel/common/block/cse: Add boot partition related APIs ...................................................................... Patch Set 6: (11 comments) https://review.coreboot.org/c/coreboot/+/35402/6//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/35402/6//COMMIT_MSG@7 PS6, Line 7: APIs Are these APIs supported by all platforms? https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… File src/soc/intel/common/block/cse/cse.c: https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… PS6, Line 89: MKHI_BUP_COMMON_GROUP_ID Can you please ensure that the naming is consistent. Line 74 is very different than line 77 and this defintion. Also, can you please put all these group ids together. https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… PS6, Line 760: set_cse_next_boot_partition What exactly is this function doing? Under what conditions can this function be called? What are the expectations after this function is done? Does it need a reset? https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… PS6, Line 774: .group_id = MKHI_BUP_COMMON_GROUP_ID, Move this to next line. https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… PS6, Line 779: +1 Why add 1? https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… File src/soc/intel/common/block/include/intelblocks/cse.h: https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… PS6, Line 147: MAX_ME_PARTITIONS Is this true for all platforms? https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… PS6, Line 150: BP_STATUS_SUCCESS = 0, : BP_STATUS_GENERAL_FAILURE = 1, : BP_STATUS_PARTITION_NOT_PRESENT = 2, : BP_STATUS_HOST_REQUEST_FOR_PARTITION_SWITCH = 3, > consistent spacing? Can you please add comments indicating what each really means? https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… PS6, Line 175: mkhi_hdr This should be added as a separate CL. And all platforms using this should get rid of the redundant declarations. https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… PS6, Line 183: /* Boot Partition Info Flag Redundancy Enabled */ : #define BP_INFO_REDUNDANCY_EN (1 << 0) : : /* Boot Partition Info Flag Min. Recovery Mode Enabled */ : #define BP_INFO_MIN_RECO_MODE_EN (1 << 1) : : /* Boot Partition Info Flag Read only Config Enabled */ : #define BP_INFO_READ_ONLY_CFG (1 << 2) It is not clear to me from the comments what the flags really mean. https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… PS6, Line 212: /* Retrieves boot partitions Info CSE */ Can you please add more details as to what this function really does.What is the return value? What is the input parameter? Is it necessary to expose get_boot_partition_info_resp? https://review.coreboot.org/c/coreboot/+/35402/6/src/soc/intel/common/block… PS6, Line 215: /* Sets CSE's next boot partition to boot */ what are the return values? What are the valid values for input parameter? -- To view, visit https://review.coreboot.org/c/coreboot/+/35402 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa62409c0616d5913d21374a8a6804f82258eb4f Gerrit-Change-Number: 35402 Gerrit-PatchSet: 6 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 20 Sep 2019 08:34:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mediatek/mt8183: Use different DRAM frequencies for eMCP DDR
by Hung-Te Lin (Code Review) 20 Sep '19

20 Sep '19

Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34990 ) Change subject: mediatek/mt8183: Use different DRAM frequencies for eMCP DDR ...................................................................... Patch Set 34: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/34990 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab6a9c2c390feeb9497b051a255b29566909e656 Gerrit-Change-Number: 34990 Gerrit-PatchSet: 34 Gerrit-Owner: huayang duan <huayangduan(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: SJ Huang <sj.huang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: You-Cheng Syu <youcheng(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: huayang duan <huayangduan(a)gmail.com> Gerrit-CC: Huayang Duan <huayang.duan(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 20 Sep 2019 08:15:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit September 2019