coreboot-gerrit June 2019

coreboot-gerrit@coreboot.org

1 participants
1454 discussions

Change in ...coreboot[master]: arch/x86: Make X86 specific options depend on ARCH_X86
by Paul Menzel (Code Review) 24 Jun '19

24 Jun '19

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31316 ) Change subject: arch/x86: Make X86 specific options depend on ARCH_X86 ...................................................................... Patch Set 5: (1 comment) https://review.coreboot.org/#/c/31316/5//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/31316/5//COMMIT_MSG@9 PS5, Line 9: result results -- To view, visit https://review.coreboot.org/c/coreboot/+/31316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic77b696f493d7648f317f0ba0a27fdee5212961e Gerrit-Change-Number: 31316 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Guckian Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Vanny E <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 24 Jun 2019 10:36:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: drivers/intel/fsp1_1/raminit.c: Always check FSP HOBs
by Frans Hendriks (Code Review) 24 Jun '19

24 Jun '19

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29371 ) Change subject: drivers/intel/fsp1_1/raminit.c: Always check FSP HOBs ...................................................................... Patch Set 9: (1 comment) https://review.coreboot.org/#/c/29371/9/src/drivers/intel/fsp1_1/ramstage.c File src/drivers/intel/fsp1_1/ramstage.c: https://review.coreboot.org/#/c/29371/9/src/drivers/intel/fsp1_1/ramstage.c… PS9, Line 63: if (CONFIG(DISPLAY_HOBS)) > The hob info in display in both romstage and ramstage. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/29371 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3776fa37866c7ef3aea090842387660c22bbdd4d Gerrit-Change-Number: 29371 Gerrit-PatchSet: 9 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Hendricks <david.hendricks(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 24 Jun 2019 10:13:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Frans Hendriks <fhendriks(a)eltan.com> Comment-In-Reply-To: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: drivers/intel/fsp1_1/raminit.c: Always check FSP HOBs
by Frans Hendriks (Code Review) 24 Jun '19

24 Jun '19

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29371 ) Change subject: drivers/intel/fsp1_1/raminit.c: Always check FSP HOBs ...................................................................... Patch Set 9: (2 comments) https://review.coreboot.org/#/c/29371/9/src/drivers/intel/fsp1_1/raminit.c File src/drivers/intel/fsp1_1/raminit.c: https://review.coreboot.org/#/c/29371/9/src/drivers/intel/fsp1_1/raminit.c@… PS9, Line 209: > Comment on patch set #4 to not touch the cbmem related a hob info. Done https://review.coreboot.org/#/c/29371/9/src/drivers/intel/fsp1_1/raminit.c@… PS9, Line 224: > display_hob_info() is not only displaying hob only, but checking if graphics hob is available. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/29371 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3776fa37866c7ef3aea090842387660c22bbdd4d Gerrit-Change-Number: 29371 Gerrit-PatchSet: 9 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Hendricks <david.hendricks(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 24 Jun 2019 10:12:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Frans Hendriks <fhendriks(a)eltan.com> Comment-In-Reply-To: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: cbfstool: Drop update-fit option
by Patrick Rudolph (Code Review) 24 Jun '19

24 Jun '19

Patrick Rudolph has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31496 ) Change subject: cbfstool: Drop update-fit option ...................................................................... cbfstool: Drop update-fit option The ifittool is used instead. Drop old code. Change-Id: I70fec5fef9ffd1ba3049badb398783f31aefb02f Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31496 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M src/soc/intel/Kconfig M util/cbfstool/Makefile.inc M util/cbfstool/cbfstool.c M util/cbfstool/fit.c M util/cbfstool/fit.h 5 files changed, 1 insertion(+), 174 deletions(-) Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved diff --git a/src/soc/intel/Kconfig b/src/soc/intel/Kconfig index c447046..b8befc0 100644 --- a/src/soc/intel/Kconfig +++ b/src/soc/intel/Kconfig @@ -46,5 +46,5 @@ hold a microcode) whose address as the first entry in the topswap FIT. This is useful in creating a asymmetric FIT in top swap bootblock than the one in non-topswap bootblock. This string will be passed - onto cbfstool (-q option). cbfstool will not parse the region for MCU + onto ifittool (-A -n option). ifittool will not parse the region for MCU entries, and only locate the region and insert its address into FIT. diff --git a/util/cbfstool/Makefile.inc b/util/cbfstool/Makefile.inc index 0340c3e..efc3dca 100644 --- a/util/cbfstool/Makefile.inc +++ b/util/cbfstool/Makefile.inc @@ -21,7 +21,6 @@ cbfsobj += elfheaders.o cbfsobj += rmodule.o cbfsobj += xdr.o -cbfsobj += fit.o cbfsobj += partitioned_file.o # COMMONLIB cbfsobj += cbfs.o diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index e8b1f6f..cf89b47 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -28,7 +28,6 @@ #include "cbfs_image.h" #include "cbfs_sections.h" #include "elfparsing.h" -#include "fit.h" #include "partitioned_file.h" #include <commonlib/fsp.h> #include <commonlib/endian.h> @@ -84,7 +83,6 @@ bool autogen_attr; bool machine_parseable; bool unprocessed; - int fit_empty_entries; enum comp_algo compression; int precompression; enum vb2_hash_algorithm hash; @@ -1190,54 +1188,6 @@ return buffer_write_file(param.image_region, param.filename); } -static int cbfs_update_fit(void) -{ - if (!param.name) { - ERROR("You need to specify -n/--name.\n"); - return 1; - } - - if (param.fit_empty_entries <= 0) { - ERROR("Invalid number of fit entries " - "(-x/--empty-fits): %d\n", param.fit_empty_entries); - return 1; - } - - struct buffer bootblock; - // The bootblock is part of the CBFS on x86 - buffer_clone(&bootblock, param.image_region); - - struct cbfs_image image; - if (cbfs_image_from_buffer(&image, param.image_region, - param.headeroffset)) - return 1; - - uint32_t addr = 0; - - /* - * Get the address of provided region for first row. - */ - if (param.ucode_region) { - struct buffer ucode; - - if (partitioned_file_read_region(&ucode, - param.image_file, param.ucode_region)) - addr = -convert_to_from_top_aligned(&ucode, 0); - else - return 1; - } - - - if (fit_update_table(&bootblock, &image, param.name, - param.fit_empty_entries, convert_to_from_top_aligned, - param.topswap_size, addr)) - return 1; - - // The region to be written depends on the type of image, so we write it - // here rather than having main() write the CBFS region back as usual. - return !partitioned_file_write_region(param.image_file, &bootblock); -} - static int cbfs_copy(void) { struct cbfs_image src_image; @@ -1320,7 +1270,6 @@ {"print", "H:r:vkh?", cbfs_print, true, false}, {"read", "r:f:vh?", cbfs_read, true, false}, {"remove", "H:r:n:vh?", cbfs_remove, true, true}, - {"update-fit", "H:r:n:x:vh?j:q:", cbfs_update_fit, true, true}, {"write", "r:f:i:Fudvh?", cbfs_write, true, true}, {"expand", "r:h?", cbfs_expand, true, true}, {"truncate", "r:h?", cbfs_truncate, true, true}, @@ -1486,15 +1435,6 @@ "Truncate CBFS and print new size on stdout\n" " expand [-r fmap-region] " "Expand CBFS to span entire region\n" - " update-fit [-r image,regions] -n MICROCODE_BLOB_NAME \\\n" - " -x EMTPY_FIT_ENTRIES \\ \n" - " [-j topswap-size [-q ucode-region](Intel CPUs only)] " - "Updates the FIT table with microcode entries.\n" - " " - " ucode-region is a region in the FMAP, its address is \n" - " " - " inserted as the first entry in the topswap FIT. \n" - "\n" "OFFSETs:\n" " Numbers accompanying -b, -H, and -o switches* may be provided\n" " in two possible formats: if their value is greater than\n" @@ -1732,15 +1672,6 @@ case 'w': param.show_immutable = true; break; - case 'x': - param.fit_empty_entries = strtol( - optarg, &suffix, 0); - if (!*optarg || (suffix && *suffix)) { - ERROR("Invalid number of fit entries " - "'%s'.\n", optarg); - return 1; - } - break; case 'j': param.topswap_size = strtol(optarg, NULL, 0); if (!is_valid_topswap()) diff --git a/util/cbfstool/fit.c b/util/cbfstool/fit.c index 86dde4d..4cd84f2 100644 --- a/util/cbfstool/fit.c +++ b/util/cbfstool/fit.c @@ -737,99 +737,3 @@ return 0; } - -/* Legacy code. TODO: Remove once ifittool is merged. */ - -static void add_microcodde_entries(struct fit_table *fit, - const struct cbfs_image *image, - ssize_t num_mcus, - struct microcode_entry *mcus, - fit_offset_converter_t offset_helper, - uint32_t first_mcu_addr) -{ - int i = 0; - /* - * Check if an entry has to be forced into the FIT at index 0. - * first_mcu_addr is an address (in ROM) that will point to a - * microcode patch. - */ - if (first_mcu_addr) { - struct fit_entry *entry = &fit->entries[0]; - update_fit_ucode_entry(fit, entry, first_mcu_addr); - i = 1; - } - - struct microcode_entry *mcu = &mcus[0]; - for (; i < num_mcus; i++) { - struct fit_entry *entry = &fit->entries[i]; - update_fit_ucode_entry(fit, entry, offset_to_ptr(offset_helper, - &image->buffer, mcu->offset)); - mcu++; - } -} - -int fit_update_table(struct buffer *bootblock, struct cbfs_image *image, - const char *microcode_blob_name, - unsigned int empty_entries, - fit_offset_converter_t offset_fn, uint32_t topswap_size, - uint32_t first_mcu_addr) -{ - struct fit_table *fit, *fit2; - struct microcode_entry *mcus; - size_t mcus_found; - - int ret = 0; - - fit = fit_get_table(bootblock, offset_fn, 0); - if (!fit) { - ERROR("FIT not found.\n"); - return 1; - } - - mcus = malloc(sizeof(*mcus) * empty_entries); - if (!mcus) { - ERROR("Couldn't allocate memory for microcode entries.\n"); - return 1; - } - - if (parse_microcode_blob(image, microcode_blob_name, &mcus_found, - mcus, empty_entries)) { - ERROR("Couldn't parse microcode blob.\n"); - ret = 1; - goto out; - } - - add_microcodde_entries(fit, image, mcus_found, mcus, offset_fn, 0); - - update_fit_checksum(fit); - - /* A second fit is exactly topswap size away from the bottom one */ - if (topswap_size) { - - fit2 = fit_get_table(bootblock, offset_fn, topswap_size); - - if (!fit_table_verified(fit2)) { - ERROR("second FIT is invalid\n"); - ret = 1; - goto out; - } - /* Check if we have room for first entry */ - if (first_mcu_addr) { - if (mcus_found >= empty_entries) { - ERROR("No room, blob mcus = %zd, total entries" - " = %d\n", mcus_found, empty_entries); - ret = 1; - goto out; - } - /* Add 1 for the first entry */ - mcus_found++; - } - /* Add entries in the second FIT */ - add_microcodde_entries(fit2, image, mcus_found, mcus, - offset_fn, first_mcu_addr); - update_fit_checksum(fit2); - } -out: - free(mcus); - return ret; -} diff --git a/util/cbfstool/fit.h b/util/cbfstool/fit.h index e5872ab..c647ec5 100644 --- a/util/cbfstool/fit.h +++ b/util/cbfstool/fit.h @@ -72,11 +72,4 @@ fit_offset_converter_t offset_helper, const size_t max_fit_entries); -/* Legacy code */ -int fit_update_table(struct buffer *bootblock, struct cbfs_image *image, - const char *microcode_blob_name, - unsigned int empty_entries, - fit_offset_converter_t offset_fn, uint32_t topswap_size, - uint32_t first_mcu_addr); - #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/31496 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70fec5fef9ffd1ba3049badb398783f31aefb02f Gerrit-Change-Number: 31496 Gerrit-PatchSet: 14 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Amol N Sukerkar <amol.n.sukerkar(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kai Michaelis <kai.michaelis(a)9elements.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in ...coreboot[master]: Makefile: Use ifittool to update FIT
by Philipp Deppenwiese (Code Review) 24 Jun '19

24 Jun '19

Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31495 ) Change subject: Makefile: Use ifittool to update FIT ...................................................................... Makefile: Use ifittool to update FIT Depend on ifittool and use it to update FIT instead cbfstool FIT code. Move the TOPSWAP / microcode handling out of cbfstool and implement it in the Makefile. The new FIT looks like the old one and has been tested on Broadwell-DE. The TOPSWAP / microcode code path needs test on real hardware. Change-Id: I687469d62557f81e9d88398cfc93182164fdac95 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31495 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Reviewed-by: Christian Walter <christian.walter(a)9elements.com> --- M Makefile.inc 1 file changed, 34 insertions(+), 11 deletions(-) Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved Christian Walter: Looks good to me, but someone else must approve diff --git a/Makefile.inc b/Makefile.inc index 7ac0a82..362243e 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -513,6 +513,7 @@ FMAPTOOL:=$(objutil)/cbfstool/fmaptool RMODTOOL:=$(objutil)/cbfstool/rmodtool IFWITOOL:=$(objutil)/cbfstool/ifwitool +IFITTOOL:=$(objutil)/cbfstool/ifittool $(obj)/cbfstool: $(CBFSTOOL) cp $< $@ @@ -526,6 +527,9 @@ $(obj)/ifwitool: $(IFWITOOL) cp $< $@ +$(obj)/ifittool: $(IFITTOOL) + cp $< $@ + _WINCHECK=$(shell uname -o 2> /dev/null) STACK= ifeq ($(_WINCHECK),Msys) @@ -638,7 +642,7 @@ include util/crossgcc/Makefile.inc .PHONY: tools -tools: $(objutil)/kconfig/conf $(CBFSTOOL) $(objutil)/cbfstool/cbfs-compression-tool $(FMAPTOOL) $(RMODTOOL) $(IFWITOOL) $(objutil)/nvramtool/nvramtool $(ROMCC_BIN) $(objutil)/sconfig/sconfig $(IFDTOOL) $(CBOOTIMAGE) $(AMDFWTOOL) $(FUTILITY) $(BINCFG) +tools: $(objutil)/kconfig/conf $(CBFSTOOL) $(objutil)/cbfstool/cbfs-compression-tool $(FMAPTOOL) $(RMODTOOL) $(IFWITOOL) $(objutil)/nvramtool/nvramtool $(ROMCC_BIN) $(objutil)/sconfig/sconfig $(IFDTOOL) $(CBOOTIMAGE) $(AMDFWTOOL) $(FUTILITY) $(BINCFG) $(IFITTOOL) ########################################################################### # Common recipes for all stages @@ -1008,10 +1012,9 @@ ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y) TS_OPTIONS := -j $(CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE) -FIT_OPTIONS := $(TS_OPTIONS) endif ifneq ($(CONFIG_UPDATE_IMAGE),y) -$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file) $(obj)/fmap.fmap $(obj)/fmap.desc +$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $(IFITTOOL) $$(cpu_ucode_cbfs_file) $(obj)/fmap.fmap $(obj)/fmap.desc $(CBFSTOOL) $@.tmp create -M $(obj)/fmap.fmap -r $(shell cat $(obj)/fmap.desc) ifeq ($(CONFIG_ARCH_X86),y) $(CBFSTOOL) $@.tmp add \ @@ -1055,9 +1058,6 @@ endif FIT_ENTRY=$(call strip_quotes, $(CONFIG_INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG)) -ifneq ($(FIT_ENTRY),) -FIT_OPTIONS += -q $(FIT_ENTRY) -endif ifeq ($(CONFIG_HAVE_RAMSTAGE),y) RAMSTAGE=$(objcbfs)/ramstage.elf @@ -1087,15 +1087,38 @@ ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y) ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) @printf " UPDATE-FIT\n" - $(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \ - $(FIT_OPTIONS) + $(IFITTOOL) -f $@.tmp -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \ + -r COREBOOT endif - ifeq ($(CONFIG_USE_CPU_MICROCODE_CBFS_BINS),y) @printf " UPDATE-FIT\n" - $(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \ - $(FIT_OPTIONS) + $(IFITTOOL) -f $@.tmp -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \ + -r COREBOOT endif + $(IFITTOOL) -f $@.tmp -D -r COREBOOT + +# Second FIT in TOP_SWAP bootblock +ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y) +# INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG adds a region as first ucode into the seconds bootblock +ifneq ($(FIT_ENTRY),) + @printf " UPDATE-FIT2\n" + $(IFITTOOL) -f $@.tmp -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \ + $(TS_OPTIONS) -r COREBOOT +endif +ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) + @printf " UPDATE-FIT2\n" + $(IFITTOOL) -f $@.tmp -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \ + $(TS_OPTIONS) -r COREBOOT +endif +ifeq ($(CONFIG_USE_CPU_MICROCODE_CBFS_BINS),y) + @printf " UPDATE-FIT2\n" + $(IFITTOOL) -f $@.tmp -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \ + $(TS_OPTIONS) -r COREBOOT +endif + $(IFITTOOL) -f $@.tmp -D $(TS_OPTIONS) -r COREBOOT + +endif + endif mv $@.tmp $@ @printf " CBFSLAYOUT $(subst $(obj)/,,$(@))\n\n" -- To view, visit https://review.coreboot.org/c/coreboot/+/31495 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I687469d62557f81e9d88398cfc93182164fdac95 Gerrit-Change-Number: 31495 Gerrit-PatchSet: 16 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Amol N Sukerkar <amol.n.sukerkar(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kai Michaelis <kai.michaelis(a)9elements.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in ...coreboot[master]: cbfstool: Add ifittool
by Philipp Deppenwiese (Code Review) 24 Jun '19

24 Jun '19

Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31493 ) Change subject: cbfstool: Add ifittool ...................................................................... cbfstool: Add ifittool Add the IntelFirmwareInterfaceTable-tool to modify the FIT. As cbfstool is overloaded with arguments, introduce a new tool to only modify FIT, which brings it's own command line syntax. Provide clean interface to: * Clear FIT * Add entry to CBFS file * Add entry to REGION * Delete entries * Add support for types other than 1 * Add support to dump current table * Add support for top-swap * Sort entries by type Most code is reused from existing cbfstool and functionality of cbfstool is kept. It will be removed once the make system uses only ifittool. Based on "Intel Trusted Execution Technology (Intel TXT) LAB Handout" and https://github.com/slimbootloader/slimbootloader . Change-Id: I0fe8cd70611d58823aca1147d5b830722ed72bd5 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31493 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M util/cbfstool/Makefile M util/cbfstool/Makefile.inc M util/cbfstool/fit.c M util/cbfstool/fit.h A util/cbfstool/ifittool.c 5 files changed, 1,121 insertions(+), 140 deletions(-) Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile index d7137e9..d5321f6 100644 --- a/util/cbfstool/Makefile +++ b/util/cbfstool/Makefile @@ -12,7 +12,7 @@ VBOOT_SOURCE ?= $(top)/3rdparty/vboot .PHONY: all -all: cbfstool fmaptool rmodtool ifwitool cbfs-compression-tool +all: cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool cbfstool: $(objutil)/cbfstool/cbfstool @@ -22,15 +22,18 @@ ifwitool: $(objutil)/cbfstool/ifwitool +ifittool: $(objutil)/cbfstool/ifittool + cbfs-compression-tool: $(objutil)/cbfstool/cbfs-compression-tool -.PHONY: clean cbfstool fmaptool rmodtool ifwitool cbfs-compression-tool +.PHONY: clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool clean: $(RM) fmd_parser.c fmd_parser.h fmd_scanner.c fmd_scanner.h $(RM) $(objutil)/cbfstool/cbfstool $(cbfsobj) $(RM) $(objutil)/cbfstool/fmaptool $(fmapobj) $(RM) $(objutil)/cbfstool/rmodtool $(rmodobj) $(RM) $(objutil)/cbfstool/ifwitool $(ifwiobj) + $(RM) $(objutil)/cbfstool/ifittool $(ifitobj) $(RM) $(objutil)/cbfstool/cbfs-compression-tool $(cbfscompobj) linux_trampoline.c: linux_trampoline.S @@ -49,6 +52,7 @@ $(INSTALL) fmaptool $(DESTDIR)$(BINDIR) $(INSTALL) rmodtool $(DESTDIR)$(BINDIR) $(INSTALL) ifwitool $(DESTDIR)$(BINDIR) + $(INSTALL) ifittool $(DESTDIR)$(BINDIR) $(INSTALL) cbfs-compression-tool $(DESTDIR)$(BINDIR) ifneq ($(V),1) diff --git a/util/cbfstool/Makefile.inc b/util/cbfstool/Makefile.inc index 7928520..0340c3e 100644 --- a/util/cbfstool/Makefile.inc +++ b/util/cbfstool/Makefile.inc @@ -66,6 +66,35 @@ ifwiobj += ifwitool.o ifwiobj += common.o +ifitobj := +ifitobj += ifittool.o +ifitobj += common.o +ifitobj += fit.o +ifitobj += cbfs_image.o +# Make it link .... +ifitobj += xdr.o +ifitobj += elfheaders.o +ifitobj += partitioned_file.o +ifitobj += cbfs-mkstage.o +ifitobj += cbfs-mkpayload.o +ifitobj += rmodule.o +# COMMONLIB +ifitobj += cbfs.o +ifitobj += mem_pool.o +ifitobj += region.o +# CRYPTOLIB +ifitobj += 2sha_utility.o +ifitobj += 2sha1.o +ifitobj += 2sha256.o +ifitobj += 2sha512.o +# FMAP +ifitobj += fmap.o +ifitobj += kv_pair.o +ifitobj += valstr.o +# compression algorithms +ifitobj += $(compressionobj) + + cbfscompobj := cbfscompobj += $(compressionobj) cbfscompobj += cbfscomptool.o @@ -149,6 +178,10 @@ printf " HOSTCC $(subst $(objutil)/,,$(@)) (link)\n" $(HOSTCC) $(TOOLLDFLAGS) -o $@ $(addprefix $(objutil)/cbfstool/,$(ifwiobj)) +$(objutil)/cbfstool/ifittool: $(addprefix $(objutil)/cbfstool/,$(ifitobj)) + printf " HOSTCC $(subst $(objutil)/,,$(@)) (link)\n" + $(HOSTCC) $(TOOLLDFLAGS) -o $@ $(addprefix $(objutil)/cbfstool/,$(ifitobj)) + $(objutil)/cbfstool/cbfs-compression-tool: $(addprefix $(objutil)/cbfstool/,$(cbfscompobj)) printf " HOSTCC $(subst $(objutil)/,,$(@)) (link)\n" $(HOSTCC) $(TOOLLDFLAGS) -o $@ $(addprefix $(objutil)/cbfstool/,$(cbfscompobj)) diff --git a/util/cbfstool/fit.c b/util/cbfstool/fit.c index aeb1755..86dde4d 100644 --- a/util/cbfstool/fit.c +++ b/util/cbfstool/fit.c @@ -2,6 +2,8 @@ * Firmware Interface Table support. * * Copyright (C) 2012 Google Inc. + * Copyright (C) 2019 9elements Agency GmbH + * Copyright (C) 2019 Facebook Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,17 +27,42 @@ #define FIT_POINTER_LOCATION 0xffffffc0 #define FIT_TABLE_LOWEST_ADDRESS ((uint32_t)(-(16 << 20))) #define FIT_ENTRY_CHECKSUM_VALID 0x80 -#define FIT_TYPE_HEADER 0x0 -#define FIT_HEADER_VERSION 0x0100 -#define FIT_HEADER_ADDRESS "_FIT_ " -#define FIT_TYPE_MICROCODE 0x1 -#define FIT_MICROCODE_VERSION 0x0100 +#define FIT_HEADER_VERSION 0x0100 +#define FIT_HEADER_ADDRESS "_FIT_ " +#define FIT_MICROCODE_VERSION 0x0100 +#define FIT_TXT_VERSION 0x0100 + +#define FIT_SIZE_ALIGNMENT 16 struct fit_entry { + /** + * Address is the base address of the firmware component + * must be aligned on 16 byte boundary + */ uint64_t address; + /** + * Size is the span of the component in multiple of 16 bytes + * Bits [24:31] are reserved and must be set to 0 + */ uint32_t size_reserved; + /** + * Component's version number in binary coded decimal (BCD) format. + * For the FIT header entry, the value in this field will indicate the + * revision number of the FIT data structure. The upper byte of the + * revision field indicates the major revision and the lower byte + * indicates the minor revision. + */ uint16_t version; + /** + * FIT types 0x00 to 0x7F + * Bit 7 (C_V) indicates whether component has valid checksum. + */ uint8_t type_checksum_valid; + /** + * Component's checksum. The modulo sum of all the bytes in the + * component and the value in this field (Chksum) must add up to zero. + * This field is only valid if the C_V flag is non-zero. + */ uint8_t checksum; } __packed; @@ -67,20 +94,20 @@ return &buffer->data[offset]; } -static inline int fit_entry_size_bytes(struct fit_entry *entry) +static inline size_t fit_entry_size_bytes(const struct fit_entry *entry) { return (entry->size_reserved & 0xffffff) << 4; } static inline void fit_entry_update_size(struct fit_entry *entry, - int size_bytes) + const int size_bytes) { /* Size is multiples of 16 bytes. */ entry->size_reserved = (size_bytes >> 4) & 0xffffff; } static inline void fit_entry_add_size(struct fit_entry *entry, - int size_bytes) + const int size_bytes) { int size = fit_entry_size_bytes(entry); size += size_bytes; @@ -114,8 +141,70 @@ return -helper(region, offset); } +/* + * Return the number of FIT entries. + */ +static inline size_t fit_table_entries(const struct fit_table *fit) +{ + if (!fit) + return 0; + + return (fit_entry_size_bytes(&fit->header) / FIT_SIZE_ALIGNMENT) - 1; +} + +/* + * Return the number of unused entries. + */ +static inline size_t fit_free_space(struct fit_table *fit, + const size_t max_entries) +{ + if (!fit) + return 0; + + return max_entries - fit_table_entries(fit); +} + +/* + * Sort entries by type and fill gaps (entries with type unused). + * To be called after adding or deleting entries. + * + * This one is critical, as mentioned in Chapter 1.2.1 "FIT Ordering Rules" + * "Firmware Interface Table BIOS Specification". + * + * We need to use a stable sorting algortihm, as the order of + * FIT_TYPE_BIOS_STARTUP matter for measurements. + */ +static void sort_fit_table(struct fit_table *fit) +{ + struct fit_entry tmp; + size_t i, j; + int swapped; + + /* Bubble sort entries */ + for (j = 0; j < fit_table_entries(fit) - 1; j++) { + swapped = 0; + for (i = 0; i < fit_table_entries(fit) - j - 1; i++) { + if (fit->entries[i].type_checksum_valid <= + fit->entries[i + 1].type_checksum_valid) + continue; + /* SWAP entries */ + memcpy(&tmp, &fit->entries[i], sizeof(tmp)); + memcpy(&fit->entries[i], &fit->entries[i + 1], + sizeof(fit->entries[i])); + memcpy(&fit->entries[i + 1], &tmp, + sizeof(fit->entries[i + 1])); + swapped = 1; + } + if (!swapped) + break; + } +} + static int fit_table_verified(struct fit_table *table) { + if (!table) + return 0; + /* Check that the address field has the proper signature. */ if (strncmp((const char *)&table->header.address, FIT_HEADER_ADDRESS, sizeof(table->header.address))) @@ -127,35 +216,17 @@ if (fit_entry_type(&table->header) != FIT_TYPE_HEADER) return 0; - /* Assume that the FIT table only contains the header */ - if (fit_entry_size_bytes(&table->header) != sizeof(struct fit_entry)) + /* Assume that the FIT table contains at least the header */ + if (fit_entry_size_bytes(&table->header) < sizeof(struct fit_entry)) return 0; return 1; } -static struct fit_table *locate_fit_table(fit_offset_converter_t offset_helper, - struct buffer *buffer) -{ - struct fit_table *table; - uint32_t *fit_pointer; - - fit_pointer = rom_buffer_pointer(buffer, - ptr_to_offset(offset_helper, buffer, - FIT_POINTER_LOCATION)); - - /* Ensure pointer is below 4GiB and within 16MiB of 4GiB */ - if (fit_pointer[1] != 0 || fit_pointer[0] < FIT_TABLE_LOWEST_ADDRESS) - return NULL; - - table = rom_buffer_pointer(buffer, - ptr_to_offset(offset_helper, buffer, *fit_pointer)); - if (!fit_table_verified(table)) - return NULL; - else - return table; -} - +/* + * Update the FIT checksum. + * To be called after modifiying the table. + */ static void update_fit_checksum(struct fit_table *fit) { int size_bytes; @@ -163,6 +234,9 @@ uint8_t result; int i; + if (!fit) + return; + fit->header.checksum = 0; size_bytes = fit_entry_size_bytes(&fit->header); result = 0; @@ -172,24 +246,504 @@ fit->header.checksum = -result; } +/* + * Return a pointer to the next free entry. + * Caller must take care if enough space is available. + */ +static struct fit_entry *get_next_free_entry(struct fit_table *fit) +{ + return &fit->entries[fit_table_entries(fit)]; +} + +static void fit_location_from_cbfs_header(uint32_t *current_offset, + uint32_t *file_length, void *ptr) +{ + struct buffer buf; + struct cbfs_file header; + memset(&buf, 0, sizeof(buf)); + + buf.data = ptr; + buf.size = sizeof(header); + + bgets(&buf, header.magic, sizeof(header.magic)); + header.len = xdr_be.get32(&buf); + header.type = xdr_be.get32(&buf); + header.attributes_offset = xdr_be.get32(&buf); + header.offset = xdr_be.get32(&buf); + + *current_offset = header.offset; + *file_length = header.len; +} + +static int +parse_microcode_blob(struct cbfs_image *image, + const char *blob_name, + size_t *mcus_found, + struct microcode_entry *mcus, + const size_t max_fit_entries) +{ + size_t num_mcus; + uint32_t current_offset; + uint32_t file_length; + struct cbfs_file *mcode_file; + + mcode_file = cbfs_get_entry(image, blob_name); + if (!mcode_file) + return 1; + + fit_location_from_cbfs_header(&current_offset, &file_length, + mcode_file); + current_offset += cbfs_get_entry_addr(image, mcode_file); + + num_mcus = 0; + while (file_length > sizeof(struct microcode_header)) { + const struct microcode_header *mcu_header; + + mcu_header = rom_buffer_pointer(&image->buffer, current_offset); + if (!mcu_header) { + ERROR("Couldn't parse microcode header.\n"); + return 1; + } + + /* Newer microcode updates include a size field, whereas older + * containers set it at 0 and are exactly 2048 bytes long */ + uint32_t total_size = mcu_header->total_size ?: 2048; + + /* Quickly sanity check a prospective microcode update. */ + if (total_size < sizeof(*mcu_header)) + break; + + /* FIXME: Should the checksum be validated? */ + mcus[num_mcus].offset = current_offset; + mcus[num_mcus].size = total_size; + + /* Proceed to next payload. */ + current_offset += mcus[num_mcus].size; + file_length -= mcus[num_mcus].size; + num_mcus++; + /* Reached limit of FIT entries. */ + if (num_mcus == max_fit_entries) + break; + if (file_length < sizeof(struct microcode_header)) + break; + } + + /* Update how many microcode updates we found. */ + *mcus_found = num_mcus; + + return 0; +} + +/* There can be zero or more FIT_TYPE_MICROCODE entries */ static void update_fit_ucode_entry(struct fit_table *fit, - struct fit_entry *entry, uint64_t mcu_addr) + struct fit_entry *entry, + const uint64_t mcu_addr) { entry->address = mcu_addr; /* * While loading MCU, its size is not referred from FIT and - * rather from the MCU header, hence we can assign zero here + * rather from the MCU header, hence we can assign zero here. */ - entry->size_reserved = 0x0000; + entry->size_reserved = 0; entry->type_checksum_valid = FIT_TYPE_MICROCODE; entry->version = FIT_MICROCODE_VERSION; entry->checksum = 0; fit_entry_add_size(&fit->header, sizeof(struct fit_entry)); } +/* + * There can be zero or one FIT_TYPE_BIOS_ACM entry per table. + * In case there's a FIT_TYPE_BIOS_ACM entry, at least one + * FIT_TYPE_BIOS_STARTUP entry must exist. + * + * The caller has to provide valid arguments as those aren't verfied. + */ +static void update_fit_bios_acm_entry(struct fit_table *fit, + struct fit_entry *entry, + const uint64_t acm_addr) +{ + entry->address = acm_addr; + /* + * The Address field points to a BIOS ACM. The Address field points to + * the first byte of the AC module header. When BIOS ACM is loaded in + * Authenticated Code RAM, one MTRR base/limit pair is used to map it. + */ + entry->size_reserved = 0; + entry->type_checksum_valid = FIT_TYPE_BIOS_ACM; + entry->version = FIT_TXT_VERSION; + entry->checksum = 0; + fit_entry_add_size(&fit->header, sizeof(struct fit_entry)); +} + +/* + * In case there's a FIT_TYPE_BIOS_ACM entry, at least one + * FIT_TYPE_BIOS_STARTUP entry must exist. + * + * The caller has to provide valid arguments as those aren't verfied. + */ +static void update_fit_bios_startup_entry(struct fit_table *fit, + struct fit_entry *entry, + const uint64_t sm_addr, + const uint32_t sm_size) +{ + entry->address = sm_addr; + assert(sm_size % 16 == 0); + /* + * BIOS Startup code is defined as the code that gets control at the + * reset vector and continues the chain of trust in TCG-compliant + * fashion. In addition, this code may also configure memory and SMRAM. + */ + fit_entry_update_size(entry, sm_size); + entry->type_checksum_valid = FIT_TYPE_BIOS_STARTUP; + entry->version = FIT_TXT_VERSION; + entry->checksum = 0; + fit_entry_add_size(&fit->header, sizeof(struct fit_entry)); +} + +/* + * There can be zero or one FIT_TYPE_BIOS_POLICY Record in the FIT. + * If the platform uses the hash comparison method and employs a + * failsafe bootblock, one FIT_TYPE_BIOS_POLICY entry is needed to + * contain the failsafe hash. + * If the platform uses the Signature verification method, one + * FIT_TYPE_BIOS_POLICY entry is needed. In this case, the entry + * contains the OEM key, hash of the BIOS and signature over the hash + * using the OEM key. + * In all other cases, the FIT_TYPE_BIOS_POLICY record is not required. + * + * The caller has to provide valid arguments as those aren't verfied. + */ +static void update_fit_bios_policy_entry(struct fit_table *fit, + struct fit_entry *entry, + const uint64_t lcp_policy_addr, + const uint32_t lcp_policy_size) +{ + entry->address = lcp_policy_addr; + fit_entry_update_size(entry, lcp_policy_size); + entry->type_checksum_valid = FIT_TYPE_BIOS_POLICY; + entry->version = FIT_TXT_VERSION; + entry->checksum = 0; + fit_entry_add_size(&fit->header, sizeof(struct fit_entry)); +} + +/* + * There can be zero or one FIT_TYPE_TXT_POLICY entries + * + * The caller has to provide valid arguments as those aren't verfied. + */ +static void update_fit_txt_policy_entry(struct fit_table *fit, + struct fit_entry *entry, + uint64_t txt_policy_addr) +{ + entry->address = txt_policy_addr; + /* + * Points to the flag indicating if TXT is enabled on this platform. + * If not present, TXT is not disabled by FIT. + */ + entry->size_reserved = 0; + entry->type_checksum_valid = FIT_TYPE_TXT_POLICY; + entry->version = 0x1; + entry->checksum = 0; + fit_entry_add_size(&fit->header, sizeof(struct fit_entry)); +} + +/* Special case for ucode CBFS file, as it might contain more than one ucode */ +int fit_add_microcode_file(struct fit_table *fit, + struct cbfs_image *image, + const char *blob_name, + fit_offset_converter_t offset_helper, + const size_t max_fit_entries) +{ + struct microcode_entry *mcus; + + size_t i; + size_t mcus_found; + + mcus = malloc(sizeof(*mcus) * max_fit_entries); + if (!mcus) { + ERROR("Couldn't allocate memory for microcode entries.\n"); + return 1; + } + + if (parse_microcode_blob(image, blob_name, &mcus_found, mcus, + max_fit_entries)) { + ERROR("Couldn't parse microcode blob.\n"); + free(mcus); + return 1; + } + + if (mcus_found > fit_free_space(fit, max_fit_entries)) { + ERROR("Maximum of FIT entries reached.\n"); + free(mcus); + return 1; + } + + for (i = 0; i < mcus_found; i++) { + if (fit_add_entry(fit, + offset_to_ptr(offset_helper, &image->buffer, + mcus[i].offset), + 0, + FIT_TYPE_MICROCODE, + max_fit_entries)) { + + free(mcus); + return 1; + } + } + + free(mcus); + return 0; +} + +/* + * Return a pointer to the active FIT. + */ +struct fit_table *fit_get_table(struct buffer *bootblock, + fit_offset_converter_t offset_fn, + uint32_t topswap_size) +{ + struct fit_table *fit; + uint32_t *fit_pointer; + + fit_pointer = rom_buffer_pointer(bootblock, + ptr_to_offset(offset_fn, bootblock, + FIT_POINTER_LOCATION)); + + /* Ensure pointer is below 4GiB and within 16MiB of 4GiB */ + if (fit_pointer[1] != 0 || fit_pointer[0] < FIT_TABLE_LOWEST_ADDRESS) { + ERROR("FIT not found.\n"); + return NULL; + } + + fit = rom_buffer_pointer(bootblock, + ptr_to_offset(offset_fn, bootblock, *fit_pointer)); + if (!fit_table_verified(fit)) { + ERROR("FIT not found.\n"); + return NULL; + } + + if (topswap_size) { + struct fit_table *fit2 = (struct fit_table *)((uintptr_t)fit - + topswap_size); + if (!fit_table_verified(fit2)) { + ERROR("second FIT is invalid\n"); + return NULL; + } + fit = fit2; + } + + DEBUG("Operating on table (0x%x)\n", *fit_pointer - topswap_size); + + return fit; +} + +/* + * Dump the current FIT in human readable format to stdout. + */ +int fit_dump(struct fit_table *fit) +{ + size_t i; + + if (!fit) + return 1; + + printf("\n"); + printf(" FIT table:\n"); + + if (fit_table_entries(fit) < 1) { + printf(" empty\n\n"); + return 0; + } + + printf(" %-6s %-20s %-16s %-8s\n", "Index", "Type", "Addr", "Size"); + + for (i = 0; i < fit_table_entries(fit); i++) { + const char *name; + + switch (fit->entries[i].type_checksum_valid) { + case FIT_TYPE_MICROCODE: + name = "Microcode"; + break; + case FIT_TYPE_BIOS_ACM: + name = "BIOS ACM"; + break; + case FIT_TYPE_BIOS_STARTUP: + name = "BIOS Startup Module"; + break; + case FIT_TYPE_TPM_POLICY: + name = "TPM Policy"; + break; + case FIT_TYPE_BIOS_POLICY: + name = "BIOS Policy"; + break; + case FIT_TYPE_TXT_POLICY: + name = "TXT Policy"; + break; + case FIT_TYPE_KEY_MANIFEST: + name = "Key Manifest"; + break; + case FIT_TYPE_BOOT_POLICY: + name = "Boot Policy"; + break; + case FIT_TYPE_CSE_SECURE_BOOT: + name = "CSE SecureBoot"; + break; + case FIT_TYPE_TXTSX_POLICY: + name = "TXTSX policy"; + break; + case FIT_TYPE_JMP_DEBUG_POLICY: + name = "JMP debug policy"; + break; + case FIT_TYPE_UNUSED: + name = "unused"; + break; + default: + name = "unknown"; + } + + printf(" %6zd %-20s 0x%08"PRIx64" 0x%08zx\n", i, name, + fit->entries[i].address, + fit_entry_size_bytes(&fit->entries[i])); + } + printf("\n"); + return 0; +} + +/* + * Remove all entries from table. + */ +int fit_clear_table(struct fit_table *fit) +{ + if (!fit) + return 1; + + memset(fit->entries, 0, + sizeof(struct fit_entry) * fit_table_entries(fit)); + + /* Reset entry counter in header */ + fit_entry_update_size(&fit->header, sizeof(fit->header)); + + update_fit_checksum(fit); + + return 0; +} + +/* + * Returns true if the FIT type is know and can be added to the table. + */ +int fit_is_supported_type(const enum fit_type type) +{ + switch (type) { + case FIT_TYPE_MICROCODE: + case FIT_TYPE_BIOS_ACM: + case FIT_TYPE_BIOS_STARTUP: + case FIT_TYPE_BIOS_POLICY: + case FIT_TYPE_TXT_POLICY: + return 1; + case FIT_TYPE_TPM_POLICY: + case FIT_TYPE_KEY_MANIFEST: + case FIT_TYPE_BOOT_POLICY: + default: + return 0; + } +} + +/* + * Adds an known entry to the FIT. + * len is optional for same types and might be zero. + * offset is an absolute address in 32-bit protected mode address space. + */ +int fit_add_entry(struct fit_table *fit, + const uint32_t offset, + const uint32_t len, + const enum fit_type type, + const size_t max_fit_entries) +{ + struct fit_entry *entry; + + if (!fit) { + ERROR("Internal error."); + return 1; + } + + if (fit_free_space(fit, max_fit_entries) < 1) { + ERROR("No space left in FIT."); + return 1; + } + + if (!fit_is_supported_type(type)) { + ERROR("Unsupported FIT type %u\n", type); + return 1; + } + + DEBUG("Adding new entry type %u at offset %zd\n", type, + fit_table_entries(fit)); + + entry = get_next_free_entry(fit); + + switch (type) { + case FIT_TYPE_MICROCODE: + update_fit_ucode_entry(fit, entry, offset); + break; + case FIT_TYPE_BIOS_ACM: + update_fit_bios_acm_entry(fit, entry, offset); + break; + case FIT_TYPE_BIOS_STARTUP: + update_fit_bios_startup_entry(fit, entry, offset, len); + break; + case FIT_TYPE_BIOS_POLICY: + update_fit_bios_policy_entry(fit, entry, offset, len); + break; + case FIT_TYPE_TXT_POLICY: + update_fit_txt_policy_entry(fit, entry, offset); + break; + default: + return 1; + } + + sort_fit_table(fit); + + update_fit_checksum(fit); + + return 0; +} + +/* + * Delete one entry from table. + */ +int fit_delete_entry(struct fit_table *fit, + const size_t idx) +{ + if (!fit) { + ERROR("Internal error."); + return 1; + } + + if (idx >= fit_table_entries(fit)) { + ERROR("Index out of range."); + return 1; + } + + memset(&fit->entries[idx], 0, sizeof(struct fit_entry)); + + fit->entries[idx].type_checksum_valid = FIT_TYPE_UNUSED; + + sort_fit_table(fit); + + /* The unused entry is now the last one */ + fit_entry_add_size(&fit->header, -(int)sizeof(struct fit_entry)); + + update_fit_checksum(fit); + + return 0; +} + +/* Legacy code. TODO: Remove once ifittool is merged. */ + static void add_microcodde_entries(struct fit_table *fit, const struct cbfs_image *image, - int num_mcus, struct microcode_entry *mcus, + ssize_t num_mcus, + struct microcode_entry *mcus, fit_offset_converter_t offset_helper, uint32_t first_mcu_addr) { @@ -214,113 +768,32 @@ } } -static void cbfs_file_get_header(struct buffer *buf, struct cbfs_file *file) -{ - bgets(buf, &file->magic, sizeof(file->magic)); - file->len = xdr_be.get32(buf); - file->type = xdr_be.get32(buf); - file->attributes_offset = xdr_be.get32(buf); - file->offset = xdr_be.get32(buf); -} - -static int fit_header(void *ptr, uint32_t *current_offset, uint32_t *file_length) -{ - struct buffer buf; - struct cbfs_file header; - buf.data = ptr; - buf.size = sizeof(header); - cbfs_file_get_header(&buf, &header); - *current_offset = header.offset; - *file_length = header.len; - return 0; -} - -static int parse_microcode_blob(struct cbfs_image *image, - struct cbfs_file *mcode_file, - struct microcode_entry *mcus, - int total_entries, int *mcus_found) -{ - int num_mcus; - uint32_t current_offset; - uint32_t file_length; - - fit_header(mcode_file, &current_offset, &file_length); - current_offset += (int)((char *)mcode_file - image->buffer.data); - - num_mcus = 0; - while (file_length > sizeof(struct microcode_header)) - { - const struct microcode_header *mcu_header; - - mcu_header = rom_buffer_pointer(&image->buffer, current_offset); - - /* Newer microcode updates include a size field, whereas older - * containers set it at 0 and are exactly 2048 bytes long */ - uint32_t total_size = mcu_header->total_size - ? mcu_header->total_size : 2048; - - /* Quickly sanity check a prospective microcode update. */ - if (total_size < sizeof(*mcu_header)) - break; - - /* FIXME: Should the checksum be validated? */ - mcus[num_mcus].offset = current_offset; - mcus[num_mcus].size = total_size; - - /* Proceed to next payload. */ - current_offset += mcus[num_mcus].size; - file_length -= mcus[num_mcus].size; - num_mcus++; - - /* Reached limit of FIT entries. */ - if (num_mcus == total_entries) - break; - if (file_length < sizeof(struct microcode_header)) - break; - } - - /* Update how many microcode updates we found. */ - *mcus_found = num_mcus; - - return 0; -} - int fit_update_table(struct buffer *bootblock, struct cbfs_image *image, - const char *microcode_blob_name, int empty_entries, + const char *microcode_blob_name, + unsigned int empty_entries, fit_offset_converter_t offset_fn, uint32_t topswap_size, - uint32_t first_mcu_addr) + uint32_t first_mcu_addr) { struct fit_table *fit, *fit2; - struct cbfs_file *mcode_file; struct microcode_entry *mcus; - int mcus_found; + size_t mcus_found; int ret = 0; - // struct rom_image image = { .rom = rom, .size = romsize, }; - fit = locate_fit_table(offset_fn, bootblock); - + fit = fit_get_table(bootblock, offset_fn, 0); if (!fit) { ERROR("FIT not found.\n"); return 1; } - mcode_file = cbfs_get_entry(image, microcode_blob_name); - if (!mcode_file) { - ERROR("File '%s' not found in CBFS.\n", - microcode_blob_name); - return 1; - } - mcus = malloc(sizeof(*mcus) * empty_entries); - if (!mcus) { - ERROR("Couldn't allocate memory for microcode update entries.\n"); + ERROR("Couldn't allocate memory for microcode entries.\n"); return 1; } - if (parse_microcode_blob(image, mcode_file, mcus, empty_entries, - &mcus_found)) { + if (parse_microcode_blob(image, microcode_blob_name, &mcus_found, + mcus, empty_entries)) { ERROR("Couldn't parse microcode blob.\n"); ret = 1; goto out; @@ -333,7 +806,7 @@ /* A second fit is exactly topswap size away from the bottom one */ if (topswap_size) { - fit2 = (struct fit_table *)((uintptr_t)fit - topswap_size); + fit2 = fit_get_table(bootblock, offset_fn, topswap_size); if (!fit_table_verified(fit2)) { ERROR("second FIT is invalid\n"); @@ -343,8 +816,8 @@ /* Check if we have room for first entry */ if (first_mcu_addr) { if (mcus_found >= empty_entries) { - ERROR("No room, blob mcus = %d, total entries = %d\n", - mcus_found, empty_entries); + ERROR("No room, blob mcus = %zd, total entries" + " = %d\n", mcus_found, empty_entries); ret = 1; goto out; } diff --git a/util/cbfstool/fit.h b/util/cbfstool/fit.h index 42b3b47..e5872ab 100644 --- a/util/cbfstool/fit.h +++ b/util/cbfstool/fit.h @@ -2,6 +2,8 @@ * Firmware Interface Table support. * * Copyright (C) 2012 Google Inc. + * Copyright (C) 2019 9elements Agency GmbH + * Copyright (C) 2019 Facebook Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -19,6 +21,26 @@ #include "cbfs_image.h" #include "common.h" +/** + * Based on "Intel Trusted Execution Technology (Intel TXT) LAB Handout" and + * https://github.com/slimbootloader/slimbootloader/ + */ +enum fit_type { + FIT_TYPE_HEADER = 0, + FIT_TYPE_MICROCODE = 1, + FIT_TYPE_BIOS_ACM = 2, + FIT_TYPE_BIOS_STARTUP = 7, + FIT_TYPE_TPM_POLICY = 8, + FIT_TYPE_BIOS_POLICY = 9, + FIT_TYPE_TXT_POLICY = 0xa, + FIT_TYPE_KEY_MANIFEST = 0xb, + FIT_TYPE_BOOT_POLICY = 0xc, + FIT_TYPE_CSE_SECURE_BOOT = 0x10, + FIT_TYPE_TXTSX_POLICY = 0x2d, + FIT_TYPE_JMP_DEBUG_POLICY = 0x2f, + FIT_TYPE_UNUSED = 127, +}; + /* * Converts between offsets from the start of the specified image region and * "top-aligned" offsets from the top of the entire flash image. Should work in @@ -28,15 +50,33 @@ typedef unsigned (*fit_offset_converter_t)(const struct buffer *region, unsigned offset); -/* - * populate FIT with the MCUs prepsent in the blob provided. - * - * first_mcu_addr is an address (in ROM) that will point to a - * microcode patch. When provided, it will be forced as the first - * MCU entry into the FIT located in the topswap bootblock. - */ +struct fit_table; + +struct fit_table *fit_get_table(struct buffer *bootblock, + fit_offset_converter_t offset_fn, + uint32_t topswap_size); +int fit_dump(struct fit_table *fit); +int fit_clear_table(struct fit_table *fit); +int fit_is_supported_type(const enum fit_type type); +int fit_add_entry(struct fit_table *fit, + const uint32_t offset, + const uint32_t len, + const enum fit_type type, + const size_t max_fit_entries); +int fit_delete_entry(struct fit_table *fit, + const size_t idx); + +int fit_add_microcode_file(struct fit_table *fit, + struct cbfs_image *image, + const char *blob_name, + fit_offset_converter_t offset_helper, + const size_t max_fit_entries); + +/* Legacy code */ int fit_update_table(struct buffer *bootblock, struct cbfs_image *image, - const char *microcode_blob_name, int empty_entries, - fit_offset_converter_t offset_fn, - uint32_t topswap_size, uint32_t first_mcu_addr); + const char *microcode_blob_name, + unsigned int empty_entries, + fit_offset_converter_t offset_fn, uint32_t topswap_size, + uint32_t first_mcu_addr); + #endif diff --git a/util/cbfstool/ifittool.c b/util/cbfstool/ifittool.c new file mode 100644 index 0000000..a83fd96 --- /dev/null +++ b/util/cbfstool/ifittool.c @@ -0,0 +1,431 @@ +/* + * cbfstool, CLI utility for creating rmodules + * + * Copyright (C) 2019 9elements Agency GmbH + * Copyright (C) 2019 Facebook Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> +#include <getopt.h> + +#include "common.h" +#include "cbfs_image.h" +#include "partitioned_file.h" +#include "fit.h" + +/* Global variables */ +partitioned_file_t *image_file; + +static const char *optstring = "H:j:f:r:d:t:n:s:caDvh?"; +static struct option long_options[] = { + {"file", required_argument, 0, 'f' }, + {"region", required_argument, 0, 'r' }, + {"add-cbfs-entry", no_argument, 0, 'a' }, + {"add-region", no_argument, 0, 'A' }, + {"del-entry", required_argument, 0, 'd' }, + {"clear-table", no_argument, 0, 'c' }, + {"fit-type", required_argument, 0, 't' }, + {"cbfs-filename", required_argument, 0, 'n' }, + {"max-table-size", required_argument, 0, 's' }, + {"topswap-size", required_argument, 0, 'j' }, + {"dump", no_argument, 0, 'D' }, + {"verbose", no_argument, 0, 'v' }, + {"help", no_argument, 0, 'h' }, + {"header-offset", required_argument, 0, 'H' }, + {NULL, 0, 0, 0 } +}; + +static void usage(const char *name) +{ + printf( + "ifittool: utility for modifying Intel Firmware Interface Table\n\n" + "USAGE: %s [-h] [-H] [-v] [-D] [-c] <-f|--file name> <-s|--max-table-size size> <-r|--region fmap region> OPERATION\n" + "\tOPERATION:\n" + "\t\t-a|--add-entry : Add a CBFS file as new entry to FIT\n" + "\t\t-A|--add-region : Add region as new entry to FIT (for microcodes)\n" + "\t\t-d|--del-entry number : Delete existing <number> entry\n" + "\t\t-t|--fit-type : Type of new entry\n" + "\t\t-n|--name : The CBFS filename or region to add to table\n" + "\tOPTIONAL ARGUMENTS:\n" + "\t\t-h|--help : Display this text\n" + "\t\t-H|--header-offset : Do not search for header, use this offset\n" + "\t\t-v|--verbose : Be verbose\n" + "\t\t-D|--dump : Dump FIT table (at end of operation)\n" + "\t\t-c|--clear-table : Remove all existing entries (do not update)\n" + "\t\t-j|--topswap-size : Use second FIT table if non zero\n" + "\tREQUIRED ARGUMENTS:\n" + "\t\t-f|--file name : The file containing the CBFS\n" + "\t\t-s|--max-table-size : The number of possible FIT entries in table\n" + "\t\t-r|--region : The FMAP region to operate on\n" + , name); +} + +static int is_valid_topswap(size_t topswap_size) +{ + switch (topswap_size) { + case (64 * KiB): + case (128 * KiB): + case (256 * KiB): + case (512 * KiB): + case (1 * MiB): + break; + default: + ERROR("Invalid topswap_size %zd\n", topswap_size); + ERROR("topswap can be 64K|128K|256K|512K|1M\n"); + return 0; + } + return 1; +} + +/* + * Converts between offsets from the start of the specified image region and + * "top-aligned" offsets from the top of the entire boot media. See comment + * below for convert_to_from_top_aligned() about forming addresses. + */ +static unsigned int convert_to_from_absolute_top_aligned( + const struct buffer *region, unsigned int offset) +{ + assert(region); + + size_t image_size = partitioned_file_total_size(image_file); + + return image_size - region->offset - offset; +} + +/* + * Converts between offsets from the start of the specified image region and + * "top-aligned" offsets from the top of the image region. Works in either + * direction: pass in one type of offset and receive the other type. + * N.B. A top-aligned offset is always a positive number, and should not be + * confused with a top-aligned *address*, which is its arithmetic inverse. */ +static unsigned int convert_to_from_top_aligned(const struct buffer *region, + unsigned int offset) +{ + assert(region); + + /* Cover the situation where a negative base address is given by the + * user. Callers of this function negate it, so it'll be a positive + * number smaller than the region. + */ + if ((offset > 0) && (offset < region->size)) + return region->size - offset; + + return convert_to_from_absolute_top_aligned(region, offset); +} + +/* + * Get a pointer from an offset. This function assumes the ROM is located + * in the host address space at [4G - romsize -> 4G). It also assume all + * pointers have values within this address range. + */ +static inline uint32_t offset_to_ptr(fit_offset_converter_t helper, + const struct buffer *region, int offset) +{ + return -helper(region, offset); +} + +enum fit_operation { + NO_OP = 0, + ADD_CBFS_OP, + ADD_REGI_OP, + ADD_ADDR_OP, + DEL_OP +}; + +int main(int argc, char *argv[]) +{ + int c; + const char *input_file = NULL; + const char *name = NULL; + const char *region_name = NULL; + enum fit_operation op = NO_OP; + bool dump = false, clear_table = false; + size_t max_table_size = 0; + size_t table_entry = 0; + uint32_t addr = 0; + size_t topswap_size = 0; + enum fit_type fit_type = 0; + uint32_t headeroffset = ~0u; + + verbose = 0; + + if (argc < 4) { + usage(argv[0]); + return 1; + } + + while (1) { + int optindex = 0; + char *suffix = NULL; + + c = getopt_long(argc, argv, optstring, long_options, &optindex); + + if (c == -1) + break; + + switch (c) { + case 'h': + usage(argv[0]); + return 1; + case 'a': + if (op != NO_OP) { + ERROR("specified multiple actions at once\n"); + usage(argv[0]); + return 1; + } + op = ADD_CBFS_OP; + break; + case 'A': + if (op != NO_OP) { + ERROR("specified multiple actions at once\n"); + usage(argv[0]); + return 1; + } + op = ADD_REGI_OP; + break; + case 'x': + if (op != NO_OP) { + ERROR("specified multiple actions at once\n"); + usage(argv[0]); + return 1; + } + op = ADD_ADDR_OP; + addr = atoll(optarg); + break; + case 'c': + clear_table = true; + break; + case 'd': + if (op != NO_OP) { + ERROR("specified multiple actions at once\n"); + usage(argv[0]); + return 1; + } + op = DEL_OP; + table_entry = atoi(optarg); + break; + case 'D': + dump = true; + break; + case 'f': + input_file = optarg; + break; + case 'H': + headeroffset = strtoul(optarg, &suffix, 0); + if (!*optarg || (suffix && *suffix)) { + ERROR("Invalid header offset '%s'.\n", optarg); + return 1; + } + break; + case 'j': + topswap_size = atoi(optarg); + if (!is_valid_topswap(topswap_size)) + return 1; + break; + case 'n': + name = optarg; + break; + case 'r': + region_name = optarg; + break; + case 's': + max_table_size = atoi(optarg); + break; + case 't': + fit_type = atoi(optarg); + break; + case 'v': + verbose++; + break; + default: + break; + } + } + + if (input_file == NULL) { + ERROR("No input file given\n"); + usage(argv[0]); + return 1; + } + + if (op == ADD_CBFS_OP || op == ADD_REGI_OP) { + if (fit_type == 0) { + ERROR("Adding FIT entry, but no type given\n"); + usage(argv[0]); + return 1; + } else if (name == NULL) { + ERROR("Adding FIT entry, but no name set\n"); + usage(argv[0]); + return 1; + } else if (max_table_size == 0) { + ERROR("Maximum table size not given\n"); + usage(argv[0]); + return 1; + } + } + if (op == ADD_ADDR_OP) { + if (fit_type == 0) { + ERROR("Adding FIT entry, but no type given\n"); + usage(argv[0]); + return 1; + } else if (max_table_size == 0) { + ERROR("Maximum table size not given\n"); + usage(argv[0]); + return 1; + } + } + + if (!region_name) { + ERROR("Region not given\n"); + usage(argv[0]); + return 1; + } + + image_file = partitioned_file_reopen(input_file, + op != NO_OP || clear_table); + + struct buffer image_region; + + if (!partitioned_file_read_region(&image_region, image_file, + region_name)) { + partitioned_file_close(image_file); + ERROR("The image will be left unmodified.\n"); + return 1; + } + + struct buffer bootblock; + // The bootblock is part of the CBFS on x86 + buffer_clone(&bootblock, &image_region); + + struct cbfs_image image; + if (cbfs_image_from_buffer(&image, &image_region, headeroffset)) { + partitioned_file_close(image_file); + return 1; + } + + struct fit_table *fit = fit_get_table(&bootblock, + convert_to_from_top_aligned, + topswap_size); + if (!fit) { + partitioned_file_close(image_file); + ERROR("FIT not found.\n"); + return 1; + } + + if (clear_table) { + if (fit_clear_table(fit)) { + partitioned_file_close(image_file); + ERROR("Failed to clear table.\n"); + return 1; + } + } + + switch (op) { + case ADD_REGI_OP: + { + struct buffer region; + addr = 0; + + if (partitioned_file_read_region(&region, image_file, name)) { + addr = -convert_to_from_top_aligned(&region, 0); + } else { + partitioned_file_close(image_file); + return 1; + } + + if (fit_add_entry(fit, addr, 0, fit_type, max_table_size)) { + partitioned_file_close(image_file); + ERROR("Adding type %u FIT entry\n", fit_type); + return 1; + } + break; + } + case ADD_CBFS_OP: + { + if (fit_type == FIT_TYPE_MICROCODE) { + if (fit_add_microcode_file(fit, &image, name, + convert_to_from_top_aligned, + max_table_size)) { + return 1; + } + } else { + uint32_t offset, len; + struct cbfs_file *cbfs_file; + + cbfs_file = cbfs_get_entry(&image, name); + if (!cbfs_file) { + partitioned_file_close(image_file); + ERROR("%s not found in CBFS.\n", name); + return 1; + } + + len = ntohl(cbfs_file->len); + offset = offset_to_ptr(convert_to_from_top_aligned, + &image.buffer, + cbfs_get_entry_addr(&image, cbfs_file) + + ntohl(cbfs_file->offset)); + + + if (fit_add_entry(fit, offset, len, fit_type, + max_table_size)) { + partitioned_file_close(image_file); + ERROR("Adding type %u FIT entry\n", fit_type); + return 1; + } + } + break; + } + case ADD_ADDR_OP: + { + if (fit_add_entry(fit, addr, 0, fit_type, max_table_size)) { + partitioned_file_close(image_file); + ERROR("Adding type %u FIT entry\n", fit_type); + return 1; + } + } + break; + case DEL_OP: + { + if (fit_delete_entry(fit, table_entry)) { + partitioned_file_close(image_file); + ERROR("Deleting FIT entry %zu failed\n", table_entry); + return 1; + } + break; + } + case NO_OP: + default: + break; + } + + if (op != NO_OP || clear_table) { + if (!partitioned_file_write_region(image_file, &bootblock)) { + ERROR("Failed to write changes to disk.\n"); + partitioned_file_close(image_file); + return 1; + } + } + + if (dump) { + if (fit_dump(fit)) { + partitioned_file_close(image_file); + return 1; + } + } + + partitioned_file_close(image_file); + + return 0; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/31493 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0fe8cd70611d58823aca1147d5b830722ed72bd5 Gerrit-Change-Number: 31493 Gerrit-PatchSet: 15 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Amol N Sukerkar <amol.n.sukerkar(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kai Michaelis <kai.michaelis(a)9elements.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Christian Walter <christian.walter(a)9elements.com> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in ...coreboot[master]: Remove FSP 1.1 support
by Frans Hendriks (Code Review) 24 Jun '19

24 Jun '19

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/18930 ) Change subject: Remove FSP 1.1 support ...................................................................... Patch Set 3: Code-Review-1 Braswell is using FSP1.1 -- To view, visit https://review.coreboot.org/c/coreboot/+/18930 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I55a4127ccff3fcc8e211437d5db767d94a6cf864 Gerrit-Change-Number: 18930 Gerrit-PatchSet: 3 Gerrit-Owner: Adurb Akhbar Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Mon, 24 Jun 2019 09:40:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: mainboard/facebook/fbg1701: Configure TC358860 eDP to MIPI controller
by Frans Hendriks (Code Review) 24 Jun '19

24 Jun '19

Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33433 Change subject: mainboard/facebook/fbg1701: Configure TC358860 eDP to MIPI controller ...................................................................... mainboard/facebook/fbg1701: Configure TC358860 eDP to MIPI controller FBG1701 contains a TC358860 eDP to MIPI Bridge controller which needs to be configured. Add mainboard_configure_edp_bridge() to program the controller. CPLD version is used to determine which table must be programmed. The eDP is an i2c slave which expects the next i2c bus data for block write: <Slave Addr> <Reg Addr [15:8]> <Reg Addr[7:0]> < Data[7:0]> [Data[15:8], Data[23:16], Data{31:24] BUG=N/A TEST=Config eDP and verify that LCD panels are working on Facebook FBG-1701 rev 0-2 Change-Id: I262cb4376b86db94e3bb9522c556b5cc3ff38335 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/mainboard/facebook/fbg1701/mainboard.c M src/mainboard/facebook/fbg1701/mainboard.h M src/mainboard/facebook/fbg1701/ramstage.c 3 files changed, 328 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/33433/1 diff --git a/src/mainboard/facebook/fbg1701/mainboard.c b/src/mainboard/facebook/fbg1701/mainboard.c index ff2564d..40054d8 100644 --- a/src/mainboard/facebook/fbg1701/mainboard.c +++ b/src/mainboard/facebook/fbg1701/mainboard.c @@ -16,10 +16,34 @@ * GNU General Public License for more details. */ +#include <arch/io.h> #include <device/device.h> +#include <soc/smbus.h> #include "onboard.h" #include "mainboard.h" +void mainboard_configure_edp_bridge(void) +{ + edp_data_t *edptable; + + if (((inb(CPLD_PCB_VERSION_PORT) & CPLD_PCB_VERSION_MASK) >> + CPLD_PCB_VERSION_BIT) < 7) + edptable = (edp_data_t *)mainboard_TC348860_InitTable; + else + edptable = (edp_data_t *)mainboard_B101UAN08_InitTable; + + /* reset bridge */ + outb(CPLD_CMD_RESET_DSI_BRIDGE_ACTIVE, CPLD_RESET_PORT); + outb(CPLD_CMD_RESET_DSI_BRIDGE_INACTIVE, CPLD_RESET_PORT); + + /* set eDP bridge to eDP 1920 */ + while (edptable->address) { + smbus_i2c_block_write(edptable->address, edptable->offset, + edptable->number_of_databytes, &edptable->data[0]); + edptable++; + }; +} + /* * Declare the resources we are using */ diff --git a/src/mainboard/facebook/fbg1701/mainboard.h b/src/mainboard/facebook/fbg1701/mainboard.h index e161da0..870b02e 100644 --- a/src/mainboard/facebook/fbg1701/mainboard.h +++ b/src/mainboard/facebook/fbg1701/mainboard.h @@ -1,7 +1,8 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2018 Eltan B.V. + * Copyright (C) 2018-2019 Facebook, Inc + * Copyright (C) 2018-2019 Eltan B.V. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -16,6 +17,305 @@ #ifndef MAINBOARD_H #define MAINBOARD_H +typedef struct { + u8 number_of_databytes; + u8 address; + u8 offset; /* register address [15:8] */ + u8 data[5]; /* First byte is register address [7:0] */ +} edp_data_t; + +static const edp_data_t mainboard_TC348860_InitTable[] = { + /* set eDP bridge to eDP 1920 */ + /* IO */ + { 5, 0x68, 0x08, {0x00, 0x01, 0x00, 0x00, 0x00 } }, + /* Boot */ + { 5, 0x68, 0x10, {0x00, 0x78, 0x69, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x04, 0x02, 0x08, 0x02, 0x00 } }, + { 5, 0x68, 0x10, {0x08, 0x23, 0x00, 0x87, 0x02 } }, + { 5, 0x68, 0x10, {0x0C, 0x19, 0x04, 0x00, 0x23 } }, + { 5, 0x68, 0x10, {0x10, 0x06, 0x00, 0x67, 0x00 } }, + { 5, 0x68, 0x10, {0x14, 0x01, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x18, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* Internal */ + { 2, 0x68, 0xB0, {0x05, 0x0A, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x06, 0x03, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x07, 0x16, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x08, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x09, 0x21, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x0A, 0x07, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x14, 0x03, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x18, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* eDP */ + { 2, 0x68, 0x80, {0x03, 0x41, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB4, {0x00, 0x0D, 0x00, 0x00, 0x00 } }, + /* DPRX */ + { 2, 0x68, 0xB8, {0x8E, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8F, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x9A, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x9B, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x00, 0x0E, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x26, 0x02, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x01, 0x20, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC0, 0xF1, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC1, 0xF1, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC2, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC3, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC4, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC5, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC6, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC7, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x0B, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x33, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x5B, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x10, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x38, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x60, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x15, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x3D, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x65, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x1A, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x42, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x6A, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x1F, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x47, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x6F, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x24, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x4C, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x74, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x29, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x51, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x79, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x2E, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x56, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x7E, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x90, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x91, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x92, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x93, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x94, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x95, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x96, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x97, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x98, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x99, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x9A, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x9B, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8A, 0x03, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x96, 0x03, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0xD1, 0x07, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0xB0, 0x07, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8B, 0x04, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8C, 0x45, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8D, 0x05, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x97, 0x04, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x98, 0xE0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x99, 0x2E, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x80, {0x0E, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x14, 0x07, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x18, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* Video size */ + { 5, 0x68, 0x01, {0x48, 0xB0, 0x04, 0x00, 0x00 } }, + { 5, 0x68, 0x29, {0x20, 0x10, 0x0E, 0x0B, 0x3E } }, + /* eDP */ + { 2, 0x68, 0xB6, {0x31, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x80, {0x01, 0x14, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x80, {0x02, 0x02, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB6, {0x08, 0x0B, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x00, 0x1E, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x87, {0x00, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x50, {0x10, 0x00, 0x00, 0x9D, 0x00 } }, + { 5, 0x68, 0x00, {0x8C, 0x40, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x80, 0x02, 0x00, 0x00, 0x00 } }, + /* Link Training */ + { 2, 0x68, 0x82, {0x02, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x82, {0x03, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x82, {0x04, 0xFF, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x21, {0x58, 0x09, 0x00, 0x28, 0x00 } }, + { 5, 0x68, 0x21, {0x60, 0x07, 0x00, 0x0F, 0x00 } }, + { 5, 0x68, 0x21, {0x64, 0x28, 0x23, 0x00, 0x00 } }, + { 5, 0x68, 0x21, {0x68, 0x0E, 0x00, 0x00, 0x00 } }, + /* DSI */ + { 5, 0x68, 0x20, {0x7C, 0x81, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x20, {0x50, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x20, {0x1C, 0x01, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x20, {0x60, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* GPIO */ + { 5, 0x68, 0x08, {0x04, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x80, 0x0F, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x84, 0x0F, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x84, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x84, 0x0F, 0x00, 0x00, 0x00 } }, + /* DSI clock */ + { 5, 0x68, 0x20, {0x50, 0x20, 0x00, 0x00, 0x00 } }, + /* LCD init */ + { 5, 0x68, 0x22, {0xFC, 0x15, 0x01, 0x00, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x8C, 0x80, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0xC7, 0x50, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0xC5, 0x50, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x85, 0x04, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x86, 0x08, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x83, 0xAA, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x84, 0x11, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x9C, 0x10, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0xA9, 0x4B, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x05, 0x11, 0x00, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x05, 0x29, 0x00, 0x81 } }, + { 5, 0x68, 0x2A, {0x10, 0x10, 0x00, 0x04, 0x80 } }, + { 5, 0x68, 0x2A, {0x04, 0x01, 0x00, 0x00, 0x00 } }, + /* Check Video */ + { 5, 0x68, 0x01, {0x54, 0x01, 0x00, 0x00, 0x00 } }, + { 5, 0x00, 0x00, {0x00, 0x00, 0x00, 0x00, 0x00 } }, +}; + +static const edp_data_t mainboard_B101UAN08_InitTable[] = { + /* set eDP bridge to eDP 1920 */ + /* IO Voltage Setting */ + { 5, 0x68, 0x08, {0x00, 0x01, 0x00, 0x00, 0x00 } }, + /* Boot Settings */ + { 5, 0x68, 0x10, {0x00, 0x78, 0x69, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x04, 0x02, 0x08, 0x02, 0x00 } }, + { 5, 0x68, 0x10, {0x08, 0x22, 0x00, 0xA0, 0x02 } }, + { 5, 0x68, 0x10, {0x0C, 0x50, 0x04, 0x00, 0x03 } }, + { 5, 0x68, 0x10, {0x10, 0x10, 0x0D, 0x06, 0x01 } }, + { 5, 0x68, 0x10, {0x14, 0x01, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x18, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* Internal PCLK settings for Non Present or REFCLK=26MHz */ + { 2, 0x68, 0xB0, {0x05, 0x0A, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x06, 0x03, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x07, 0x16, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x08, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x09, 0x21, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x0A, 0x07, 0x00, 0x00, 0x00 } }, + /* DSI Clock setting for Non Preset or REFCLK=26MHz */ + { 5, 0x68, 0x41, {0xB0, 0xC1, 0x22, 0x04, 0x00 } }, + { 5, 0x68, 0x41, {0xBC, 0x01, 0x0E, 0x00, 0x00 } }, + { 5, 0x68, 0x41, {0xC0, 0x30, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x14, 0x03, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x18, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* Additional Settng for eDP */ + { 2, 0x68, 0x80, {0x03, 0x41, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB4, {0x00, 0x0D, 0x00, 0x00, 0x00 } }, + /* DPRX CAD Register Setting */ + { 2, 0x68, 0xB8, {0x8E, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8F, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x9A, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x9B, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x00, 0x0E, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x26, 0x02, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x01, 0x20, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC0, 0xF1, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC1, 0xF1, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC2, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC3, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC4, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC5, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC6, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC7, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x0B, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x33, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x5B, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x10, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x38, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x60, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x15, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x3D, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x65, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x1A, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x42, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x6A, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x1F, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x47, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x6F, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x24, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x4C, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x74, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x29, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x51, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x79, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x2E, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x56, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x7E, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x90, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x91, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x92, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x93, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x94, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x95, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x96, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x97, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x98, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x99, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x9A, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x9B, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8A, 0x03, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x96, 0x03, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0xD1, 0x07, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0xB0, 0x07, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8B, 0x04, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8C, 0x45, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8D, 0x05, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x97, 0x04, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x98, 0xE0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x99, 0x2E, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x80, {0x0E, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x14, 0x07, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x18, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* Video size Related Settings for Non Present */ + { 5, 0x68, 0x01, {0x48, 0xB0, 0x04, 0x00, 0x00 } }, + { 5, 0x68, 0x29, {0x20, 0x10, 0x0E, 0x0B, 0x3E } }, + /* eDP Settings for Link Training*/ + { 2, 0x68, 0xB6, {0x31, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x80, {0x01, 0x14, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x80, {0x02, 0x02, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB6, {0x08, 0x0B, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x00, 0x1E, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x87, {0x00, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x50, {0x10, 0x00, 0x00, 0x9D, 0x00 } }, + { 5, 0x68, 0x00, {0x8C, 0x40, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x80, 0x02, 0x00, 0x00, 0x00 } }, + /* Link Training */ + { 2, 0x68, 0x82, {0x02, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x82, {0x03, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x82, {0x04, 0xFF, 0x00, 0x00, 0x00 } }, + /* DSI Transition Time Setting for Non Preset */ + { 5, 0x68, 0x21, {0x54, 0x0D, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x21, {0x58, 0x06, 0x00, 0x2A, 0x00 } }, + { 5, 0x68, 0x21, {0x5C, 0x07, 0x00, 0x0E, 0x00 } }, + { 5, 0x68, 0x21, {0x60, 0x07, 0x00, 0x10, 0x00 } }, + { 5, 0x68, 0x21, {0x64, 0x10, 0x27, 0x00, 0x00 } }, + { 5, 0x68, 0x21, {0x68, 0x0E, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x21, {0x6C, 0x0A, 0x00, 0x0E, 0x00 } }, + { 5, 0x68, 0x21, {0x78, 0x0E, 0x00, 0x0D, 0x00 } }, + /* DSI Start */ + { 5, 0x68, 0x20, {0x7C, 0x81, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x20, {0x50, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x20, {0x1C, 0x01, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x20, {0x60, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* GPIO for LCD control*/ + { 5, 0x68, 0x08, {0x04, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x80, 0x0F, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x84, 0x0F, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x84, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x84, 0x0F, 0x00, 0x00, 0x00 } }, + /* DSI Hs Clock Mode */ + { 5, 0x68, 0x20, {0x50, 0x20, 0x00, 0x00, 0x00 } }, + /* LCD Initialization */ + { 5, 0x68, 0x22, {0xFC, 0x15, 0xBF, 0xA5, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x01, 0x00, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x8F, 0xA5, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x83, 0xAA, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x84, 0x11, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0xA9, 0x48, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x83, 0x00, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x84, 0x00, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x8F, 0x00, 0x81 } }, + { 5, 0x68, 0x2A, {0x10, 0x10, 0x00, 0x04, 0x80 } }, + { 5, 0x68, 0x2A, {0x04, 0x01, 0x00, 0x00, 0x00 } }, + /* Check if eDP video is coming */ + { 5, 0x68, 0x01, {0x54, 0x01, 0x00, 0x00, 0x00 } }, +}; + +void mainboard_configure_edp_bridge(void); void *load_logo(size_t *logo_size); #endif diff --git a/src/mainboard/facebook/fbg1701/ramstage.c b/src/mainboard/facebook/fbg1701/ramstage.c index 91dfe3b..b600361 100644 --- a/src/mainboard/facebook/fbg1701/ramstage.c +++ b/src/mainboard/facebook/fbg1701/ramstage.c @@ -18,6 +18,9 @@ void mainboard_silicon_init_params(SILICON_INIT_UPD *params) { + /* Configure the eDP bridge to eDP 1920 */ + mainboard_configure_edp_bridge(); + if (CONFIG(FSP1_1_DISPLAY_LOGO)) { size_t logo_len; void *logo = NULL; -- To view, visit https://review.coreboot.org/c/coreboot/+/33433 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I262cb4376b86db94e3bb9522c556b5cc3ff38335 Gerrit-Change-Number: 33433 Gerrit-PatchSet: 1 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: newchange

4 29

Change in ...coreboot[master]: arch/x86: Make X86 specific options depend on ARCH_X86
by HAOUAS Elyes (Code Review) 24 Jun '19

24 Jun '19

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31316 ) Change subject: arch/x86: Make X86 specific options depend on ARCH_X86 ...................................................................... Patch Set 5: (1 comment) https://review.coreboot.org/#/c/31316/5/src/mainboard/packardbell/ms2290/Kc… File src/mainboard/packardbell/ms2290/Kconfig: https://review.coreboot.org/#/c/31316/5/src/mainboard/packardbell/ms2290/Kc… PS5, Line 6: select ARCH_X86 : select ARCH_BOOTBLOCK_X86_32 : select ARCH_ROMSTAGE_X86_32 : select ARCH_RAMSTAGE_X86_32 > There is a lot of stuff that needs to get out of this and thinkpad/x201[WIP] dir. Thx for noticing. already done, isn't it? needs a rebase on master -- To view, visit https://review.coreboot.org/c/coreboot/+/31316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic77b696f493d7648f317f0ba0a27fdee5212961e Gerrit-Change-Number: 31316 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Guckian Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Vanny E <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 24 Jun 2019 06:59:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: arch/x86: Make X86 specific options depend on ARCH_X86
by HAOUAS Elyes (Code Review) 24 Jun '19

24 Jun '19

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31316 ) Change subject: arch/x86: Make X86 specific options depend on ARCH_X86 ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/31316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic77b696f493d7648f317f0ba0a27fdee5212961e Gerrit-Change-Number: 31316 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Guckian Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Vanny E <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 24 Jun 2019 06:56:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit June 2019