Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32853
Change subject: soc/intel/cannonlake: Fill DIMM serial number from SPD
......................................................................
soc/intel/cannonlake: Fill DIMM serial number from SPD
Fill the DIMM serial number field for SMBIOS from the saved SPD
data that is returned by FSP.
BUG=b:132970635
TEST=This was tested on sarien to ensure that SMBIOS type 17
filled the serial number from the DIMM:
Handle 0x000B, DMI type 17, 40 bytes
Memory Device
Locator: DIMM-A
Serial Number: 41164beb
Change-Id: I85438bd1d581095ea3482dcf077a7f3389f1cd47
Signed-off-by: Duncan Laurie <dlaurie(a)google.com>
---
M src/soc/intel/cannonlake/romstage/romstage.c
1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/32853/1
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index 661c98a..8dd9d4b 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -37,6 +37,8 @@
0x8d, 0x09, 0x11, 0xcf, 0x8b, 0x9f, 0x03, 0x23 \
}
+#define SPD_SAVE_SERIAL_OFFSET 5
+
void __weak mainboard_get_dram_part_num(const char **part_num, size_t *len)
{
/* Default weak implementation, no need to override part number. */
@@ -113,6 +115,11 @@
dram_part_num_len,
memory_info_hob->DataWidth);
index++;
+
+ /* Extract serial number from SPD */
+ memcpy(dest_dimm->serial,
+ src_dimm->SpdSave + SPD_SAVE_SERIAL_OFFSET,
+ DIMM_INFO_SERIAL_SIZE);
}
}
mem_info->dimm_cnt = index;
--
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Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32851
Change subject: mb/google/sarien: Set serial number in SMBIOS
......................................................................
mb/google/sarien: Set serial number in SMBIOS
Set the system serial number from the VPD key "serial_number" and
the mainboard serial number from the VPD key "mlb_serial_number".
BUG=b:132970635
TEST=check serial number is set in SMBIOS based on VPD, and if there
is no VPD key found then it is empty.
Change-Id: Ia8f1486dcb1edc968b8eb1e6d989b10c05913aca
Signed-off-by: Duncan Laurie <dlaurie(a)google.com>
---
M src/mainboard/google/sarien/ramstage.c
1 file changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/32851/1
diff --git a/src/mainboard/google/sarien/ramstage.c b/src/mainboard/google/sarien/ramstage.c
index d8d1c9d..1d22046 100644
--- a/src/mainboard/google/sarien/ramstage.c
+++ b/src/mainboard/google/sarien/ramstage.c
@@ -14,6 +14,7 @@
*/
#include <arch/acpi.h>
+#include <drivers/vpd/vpd.h>
#include <smbios.h>
#include <soc/gpio.h>
#include <soc/ramstage.h>
@@ -21,6 +22,26 @@
#include <vendorcode/google/chromeos/chromeos.h>
#if CONFIG(GENERATE_SMBIOS_TABLES)
+#define VPD_KEY_SYSTEM_SERIAL "serial_number"
+#define VPD_KEY_MAINBOARD_SERIAL "mlb_serial_number"
+#define VPD_SERIAL_LEN 64
+
+const char *smbios_system_serial_number(void)
+{
+ static char serial[VPD_SERIAL_LEN];
+ if (vpd_gets(VPD_KEY_SYSTEM_SERIAL, serial, VPD_SERIAL_LEN, VPD_RO))
+ return serial;
+ return "";
+}
+
+const char *smbios_mainboard_serial_number(void)
+{
+ static char serial[VPD_SERIAL_LEN];
+ if (vpd_gets(VPD_KEY_MAINBOARD_SERIAL, serial, VPD_SERIAL_LEN, VPD_RO))
+ return serial;
+ return "";
+}
+
/* mainboard silk screen shows DIMM-A and DIMM-B */
void smbios_fill_dimm_locator(const struct dimm_info *dimm,
struct smbios_type17 *t)
--
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Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/21107 )
Change subject: sb,soc/intel: Fix flashconsole on older platforms
......................................................................
Patch Set 16:
(1 comment)
https://review.coreboot.org/#/c/21107/16//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/21107/16//COMMIT_MSG@17
PS16, Line 17: - soc/fsp_{baytrail,broadwell_de}: select NO_CAR_GLOBAL_MIGRATION
> Ok got it. […]
ok, I'll revert back to the state of patch set 15, and break up into more manageable chunks
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Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/21107 )
Change subject: sb,soc/intel: Fix flashconsole on older platforms
......................................................................
Patch Set 16:
(1 comment)
https://review.coreboot.org/#/c/21107/16//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/21107/16//COMMIT_MSG@17
PS16, Line 17: - soc/fsp_{baytrail,broadwell_de}: select NO_CAR_GLOBAL_MIGRATION
> If you return into romstage execution after CAR teardown, you are not allowed to select NO_CAR_GLOBA […]
Ok got it.
Looks like adding back CAR_GLOBAL is required for FSP1.0.
--
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Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/21107 )
Change subject: sb,soc/intel: Fix flashconsole on older platforms
......................................................................
Patch Set 16:
(1 comment)
https://review.coreboot.org/#/c/21107/16//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/21107/16//COMMIT_MSG@17
PS16, Line 17: - soc/fsp_{baytrail,broadwell_de}: select NO_CAR_GLOBAL_MIGRATION
> which global variables? […]
If you return into romstage execution after CAR teardown, you are not allowed to select NO_CAR_GLOBAL_MIGRATION.
Subsystems like consoles (CBMEM, usbdebug) and timestamps and possibly even udelay() break otherwise. It's not strictly variables tagged with CAR_GLOBAL that break.
FSP1.0 takes special handling in cpu/x86/car.c to have consoles and timestamps survive over the teardown.
--
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Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/21107 )
Change subject: sb,soc/intel: Fix flashconsole on older platforms
......................................................................
Patch Set 16:
(1 comment)
https://review.coreboot.org/#/c/21107/16//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/21107/16//COMMIT_MSG@17
PS16, Line 17: - soc/fsp_{baytrail,broadwell_de}: select NO_CAR_GLOBAL_MIGRATION
> This will break access to global variables after CAR teardown, […]
which global variables?
FSP1.0 will never use postcar stage as cache is torn down in FSP-M.
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Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/21107 )
Change subject: sb,soc/intel: Fix flashconsole on older platforms
......................................................................
Patch Set 16:
> Patch Set 16:
>
> (2 comments)
>
> > > Fsp_broadwell_de already uses sb/Intel/common/spi
> >
> > but it doesn't compile with flashconsole enabled since CB:30506 :
>
> Then revert it. It was merged way too early.
Something we discussed with Werner Zeh earlier, it's not a big deal to put back CAR_GLOBAL where it's needed. During the CAR_GLOBAL removal reviews, we / I did not notice FSP1.0 platforms living in src/soc also used code from src/southbridge. And flashconsole happens to be a feature that did not get abuild testing at the time.
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/21107 )
Change subject: sb,soc/intel: Fix flashconsole on older platforms
......................................................................
Patch Set 16:
(2 comments)
> > Fsp_broadwell_de already uses sb/Intel/common/spi
>
> but it doesn't compile with flashconsole enabled since CB:30506 :
Then revert it. It was merged way too early.
https://review.coreboot.org/#/c/21107/16//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/21107/16//COMMIT_MSG@11
PS16, Line 11: - sb/i82801ix: select SOUTHBRIDGE_INTEL_COMMON_SPI
: - emulation/qemu-q35: select TSC_MONOTONIC_TIMER, needed as a result
: of adding SOUTHBRIDGE_INTEL_COMMON_SPI to sb/i82801ix
: - soc/{baytrail,braswell}: include spi.c in romstage and postcar
: - soc/broadwell: include spi.c and monotonic_timer.c in bootblock,
: romstage, and postcar
Maybe split it up. Having a bullet list of independent changes
is a sign that it should be.
https://review.coreboot.org/#/c/21107/16//COMMIT_MSG@17
PS16, Line 17: - soc/fsp_{baytrail,broadwell_de}: select NO_CAR_GLOBAL_MIGRATION
This will break access to global variables after CAR teardown,
i.e. needs postcar stage.
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Matt DeVillier has uploaded a new patch set (#16) to the change originally created by Nicola Corna. ( https://review.coreboot.org/c/coreboot/+/21107 )
Change subject: sb,soc/intel: Fix flashconsole on older platforms
......................................................................
sb,soc/intel: Fix flashconsole on older platforms
Fix building with flashconsole enabled on older platforms:
- sb/i82801ix: select SOUTHBRIDGE_INTEL_COMMON_SPI
- emulation/qemu-q35: select TSC_MONOTONIC_TIMER, needed as a result
of adding SOUTHBRIDGE_INTEL_COMMON_SPI to sb/i82801ix
- soc/{baytrail,braswell}: include spi.c in romstage and postcar
- soc/broadwell: include spi.c and monotonic_timer.c in bootblock,
romstage, and postcar
- soc/fsp_{baytrail,broadwell_de}: select NO_CAR_GLOBAL_MIGRATION
Change-Id: Ifd3e8621fa4cb349b7e0e07118cab0380f24ff55
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
---
M src/mainboard/emulation/qemu-q35/Kconfig
M src/soc/intel/baytrail/Makefile.inc
M src/soc/intel/braswell/Makefile.inc
M src/soc/intel/broadwell/Makefile.inc
M src/soc/intel/fsp_baytrail/Kconfig
M src/soc/intel/fsp_baytrail/Makefile.inc
M src/soc/intel/fsp_broadwell_de/Kconfig
M src/southbridge/intel/i82801ix/Kconfig
8 files changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/21107/16
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