coreboot-gerrit April 2019

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: mainboard/facebook/fbg1701: Do initial mainboard commit
by Frans Hendriks (Code Review) 17 Apr '19

17 Apr '19

Hello Patrick Rudolph, build bot (Jenkins), Michał Żygowski, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30414 to look at the new patch set (#19). Change subject: mainboard/facebook/fbg1701: Do initial mainboard commit ...................................................................... mainboard/facebook/fbg1701: Do initial mainboard commit Initial support for Facebook FBG-1701 system. coreboot implementation is prepared for VENDORCODE_ELTAN measured boot and verified boot support. These features are default disabled. Code based on Intel Strago mainboard. BUG=N/A TEST=booting Linux 4.20 kernel on Facebook FBG-1701 Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- A Documentation/mainboard/facebook/fbg1701.md M Documentation/mainboard/index.md A src/mainboard/facebook/fbg1701/Kconfig A src/mainboard/facebook/fbg1701/Kconfig.name A src/mainboard/facebook/fbg1701/Makefile.inc A src/mainboard/facebook/fbg1701/acpi/dptf.asl A src/mainboard/facebook/fbg1701/acpi/ec.asl A src/mainboard/facebook/fbg1701/acpi/mainboard.asl A src/mainboard/facebook/fbg1701/acpi/sleepstates.asl A src/mainboard/facebook/fbg1701/acpi/superio.asl A src/mainboard/facebook/fbg1701/acpi_tables.c A src/mainboard/facebook/fbg1701/board_info.txt A src/mainboard/facebook/fbg1701/board_mboot.c A src/mainboard/facebook/fbg1701/board_verified_boot.c A src/mainboard/facebook/fbg1701/board_verified_boot.h A src/mainboard/facebook/fbg1701/bootblock.c A src/mainboard/facebook/fbg1701/cmos.layout A src/mainboard/facebook/fbg1701/com_init.c A src/mainboard/facebook/fbg1701/devicetree.cb A src/mainboard/facebook/fbg1701/dsdt.asl A src/mainboard/facebook/fbg1701/fadt.c A src/mainboard/facebook/fbg1701/fmap.fmd A src/mainboard/facebook/fbg1701/gpio.c A src/mainboard/facebook/fbg1701/hda_verb.c A src/mainboard/facebook/fbg1701/irqroute.c A src/mainboard/facebook/fbg1701/irqroute.h A src/mainboard/facebook/fbg1701/logo.c A src/mainboard/facebook/fbg1701/mainboard.c A src/mainboard/facebook/fbg1701/mainboard.h A src/mainboard/facebook/fbg1701/manifest.h A src/mainboard/facebook/fbg1701/onboard.h A src/mainboard/facebook/fbg1701/ramstage.c A src/mainboard/facebook/fbg1701/romstage.c A src/mainboard/facebook/fbg1701/smihandler.c A src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex A src/mainboard/facebook/fbg1701/w25q64.c 36 files changed, 2,226 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/30414/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/30414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Gerrit-Change-Number: 30414 Gerrit-PatchSet: 19 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mainboard/facebook/fbg1701: Do initial mainboard commit
by Frans Hendriks (Code Review) 17 Apr '19

17 Apr '19

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30414 ) Change subject: mainboard/facebook/fbg1701: Do initial mainboard commit ...................................................................... Patch Set 18: (1 comment) https://review.coreboot.org/#/c/30414/18/src/mainboard/facebook/fbg1701/mai… File src/mainboard/facebook/fbg1701/mainboard.h: https://review.coreboot.org/#/c/30414/18/src/mainboard/facebook/fbg1701/mai… PS18, Line 25: : static const edp_data_t mainboard_TC348860InitTable[] = { > looks unused You're right, it's unused in this patch. Will be used when when patch (https://review.coreboot.org/c/coreboot/+/30800) with i2c_block_write() is merged. Will remove this data in new patchset. -- To view, visit https://review.coreboot.org/c/coreboot/+/30414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Gerrit-Change-Number: 30414 Gerrit-PatchSet: 18 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Wed, 17 Apr 2019 07:21:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: comment

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Change in ...coreboot[master]: mediatek: Using a 64 bits timer
by Tristan Hsieh (Code Review) 17 Apr '19

17 Apr '19

Tristan Hsieh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32245 Change subject: mediatek: Using a 64 bits timer ...................................................................... mediatek: Using a 64 bits timer GPT4 is a 32 bits timer and the counter of GPT4 will be overflow about 330 seconds (0xffffffff / 13MHz). With the GPT4 version, timer and delay functions will not work when the counter is overflow. Now we use a 64 bits timer, GPT6, to fix the overflow issue. BUG=b:80501386 BRANCH=none Test=emerge-elm coreboot; emerge-kukui coreboot Change-Id: I9f080e47253a1b1bab4636a45cb86c8666a25302 Signed-off-by: Tristan Shieh <tristan.shieh(a)mediatek.com> --- M src/soc/mediatek/common/include/soc/timer.h M src/soc/mediatek/common/timer.c M src/soc/mediatek/mt8173/timer.c 3 files changed, 31 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/32245/1 diff --git a/src/soc/mediatek/common/include/soc/timer.h b/src/soc/mediatek/common/include/soc/timer.h index babcbba..b58d4d3 100644 --- a/src/soc/mediatek/common/include/soc/timer.h +++ b/src/soc/mediatek/common/include/soc/timer.h @@ -19,18 +19,21 @@ #include <soc/addressmap.h> #include <types.h> -#define GPT4_MHZ 13 +#define GPT_MHZ 13 struct mtk_gpt_regs { - u32 reserved[16]; - u32 gpt4_con; - u32 gpt4_clk; - u32 gpt4_cnt; + u32 reserved1[24]; + u32 gpt6_con; + u32 gpt6_clk; + u32 gpt6_cnt_l; + u32 reserved2[3]; + u32 gpt6_cnt_h; }; -check_member(mtk_gpt_regs, gpt4_con, 0x0040); -check_member(mtk_gpt_regs, gpt4_clk, 0x0044); -check_member(mtk_gpt_regs, gpt4_cnt, 0x0048); +check_member(mtk_gpt_regs, gpt6_con, 0x0060); +check_member(mtk_gpt_regs, gpt6_clk, 0x0064); +check_member(mtk_gpt_regs, gpt6_cnt_l, 0x0068); +check_member(mtk_gpt_regs, gpt6_cnt_h, 0x0078); enum { GPT_CON_EN = 0x01, diff --git a/src/soc/mediatek/common/timer.c b/src/soc/mediatek/common/timer.c index 0762c2b..bc0577c 100644 --- a/src/soc/mediatek/common/timer.c +++ b/src/soc/mediatek/common/timer.c @@ -25,21 +25,33 @@ __weak void timer_prepare(void) { /* do nothing */ } +static uint64_t timer_raw_value(void) +{ + uint32_t low, high; + + do { + high = read32(&mtk_gpt->gpt6_cnt_h); + low = read32(&mtk_gpt->gpt6_cnt_l); + } while (high != read32(&mtk_gpt->gpt6_cnt_h)); + + return (uint64_t)low | ((uint64_t)high) << 32; +} + void timer_monotonic_get(struct mono_time *mt) { - mono_time_set_usecs(mt, read32(&mtk_gpt->gpt4_cnt) / GPT4_MHZ); + mono_time_set_usecs(mt, timer_raw_value() / GPT_MHZ); } void init_timer(void) { timer_prepare(); - /* Disable GPT4 and clear the counter */ - clrbits_le32(&mtk_gpt->gpt4_con, GPT_CON_EN); - setbits_le32(&mtk_gpt->gpt4_con, GPT_CON_CLR); + /* Disable timer and clear the counter */ + clrbits_le32(&mtk_gpt->gpt6_con, GPT_CON_EN); + setbits_le32(&mtk_gpt->gpt6_con, GPT_CON_CLR); /* Set clock source to system clock and set clock divider to 1 */ - write32(&mtk_gpt->gpt4_clk, GPT_SYS_CLK | GPT_CLK_DIV1); - /* Set operation mode to FREERUN mode and enable GTP4 */ - write32(&mtk_gpt->gpt4_con, GPT_CON_EN | GPT_MODE_FREERUN); + write32(&mtk_gpt->gpt6_clk, GPT_SYS_CLK | GPT_CLK_DIV1); + /* Set operation mode to FREERUN mode and enable timer */ + write32(&mtk_gpt->gpt6_con, GPT_CON_EN | GPT_MODE_FREERUN); } diff --git a/src/soc/mediatek/mt8173/timer.c b/src/soc/mediatek/mt8173/timer.c index 2c9995a..eb2a142 100644 --- a/src/soc/mediatek/mt8173/timer.c +++ b/src/soc/mediatek/mt8173/timer.c @@ -31,5 +31,5 @@ */ write32(&mt8173_mcucfg->xgpt_idx, 0); /* Set clock mode to 13Mhz and enable XGPT */ - write32(&mt8173_mcucfg->xgpt_ctl, (0x1 | ((26 / GPT4_MHZ) << 8))); + write32(&mt8173_mcucfg->xgpt_ctl, (0x1 | ((26 / GPT_MHZ) << 8))); } -- To view, visit https://review.coreboot.org/c/coreboot/+/32245 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f080e47253a1b1bab4636a45cb86c8666a25302 Gerrit-Change-Number: 32245 Gerrit-PatchSet: 1 Gerrit-Owner: Tristan Hsieh <tristan.shieh(a)mediatek.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/google/octopus: Add wifi_default_sar.hex for other sku DUT
by Peichao Li (Code Review) 17 Apr '19

17 Apr '19

Peichao Li has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32332 Change subject: mb/google/octopus: Add wifi_default_sar.hex for other sku DUT ...................................................................... mb/google/octopus: Add wifi_default_sar.hex for other sku DUT Laser would prefer to use different SAR values. Since Laser sku id is 5. But other sku DUT will apply for default file BUG=b:130381493 BRANCH=octopus TEST=build Signed-off-by: peichao.wang <peichao.wang(a)bitland.corp-partner.google.com> Change-Id: Ia0041a97a35de71f1aad0b07465605435ead598c --- M src/mainboard/google/octopus/variants/phaser/mainboard.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/32332/1 diff --git a/src/mainboard/google/octopus/variants/phaser/mainboard.c b/src/mainboard/google/octopus/variants/phaser/mainboard.c index 2d44830..8d47580 100644 --- a/src/mainboard/google/octopus/variants/phaser/mainboard.c +++ b/src/mainboard/google/octopus/variants/phaser/mainboard.c @@ -27,6 +27,8 @@ if (sku_id == 5) filename = "wifi_sar-laser.hex"; + else + filename = "wifi_default_sar.hex"; return filename; } -- To view, visit https://review.coreboot.org/c/coreboot/+/32332 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia0041a97a35de71f1aad0b07465605435ead598c Gerrit-Change-Number: 32332 Gerrit-PatchSet: 1 Gerrit-Owner: Peichao Li <peichao.wang(a)bitland.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: TEMP: NOT FOR REVIEW: qcs405: memlayout: Make bootblock 64k aligned
by Julius Werner (Code Review) 16 Apr '19

16 Apr '19

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29969 ) Change subject: TEMP: NOT FOR REVIEW: qcs405: memlayout: Make bootblock 64k aligned ...................................................................... Patch Set 21: > qc-sec while jumping from 32bit<->64bit using rmr, maps 0x8c30000 <-> 0x0 address and jumps How does this mapping work? Are you talking about page tables? Or some special mapping mechanism? Can you point to some documentation? > So 0x8c30000 gets mapped to 0x0 and bootblock starts executing from 0x0 address. Why does the CPU start executing from 0x0 after reset? Can't you just make it execute from 0x8c30000 directly? Isn't that what RVBAR (or is it MVBAR?) is for? If that's not possible, can you just change QC-SEC so the first 64-bit instruction is in there (just needs to be a single jump)? -- To view, visit https://review.coreboot.org/c/coreboot/+/29969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1599242bb5158477318867508c72dc14f1244b00 Gerrit-Change-Number: 29969 Gerrit-PatchSet: 21 Gerrit-Owner: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Tue, 16 Apr 2019 18:29:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: TEMP: NOT FOR REVIEW: qcs405: Clear bss for bootblock
by Sricharan Ramabadhran (Code Review) 16 Apr '19

16 Apr '19

Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29971 ) Change subject: TEMP: NOT FOR REVIEW: qcs405: Clear bss for bootblock ...................................................................... Patch Set 21: > Patch Set 13: > > > I was considering whether this should be hidden behind a kconfig flag, but I doubt that there will be bootblocks on arm64 with "huge" bss sections where it would matter. Julius, any opinion on that? > > This is not needed. The bootblock is linked treated as a binary image where all the .bss is already included in the .data section, so it does not need to be initialized separately. I assume this patch was just cherry-picked from an early version of Cheza code before I told them the same thing -- if you follow the Makefile stuff from more recent Cheza patches, this shouldn't be necessary anymore. > > As a separate problem to the immediate question of how to get Mistral to work, I'd be open to discussing whether we want to generally switch to self-cleared bootblock .bss (and not including it in the BootROM-loaded binary) on all Arm devices. There are some advantages to that although I don't think it's a big problem in general (especially if you're using COMPRESS_BOOTBLOCK). However, if we want to do that it needs to be done in a way that works on and benefits all platforms. Hi Julius/Patrick, This patch will be dropped. Not needed. Regards, Sricharan -- To view, visit https://review.coreboot.org/c/coreboot/+/29971 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1b751ced2c948f45a7b365b695eb95869dfcdc29 Gerrit-Change-Number: 29971 Gerrit-PatchSet: 21 Gerrit-Owner: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Tue, 16 Apr 2019 17:30:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: TEMP: NOT FOR REVIEW: qcs405: memlayout: Make bootblock 64k aligned
by Sricharan Ramabadhran (Code Review) 16 Apr '19

16 Apr '19

Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29969 ) Change subject: TEMP: NOT FOR REVIEW: qcs405: memlayout: Make bootblock 64k aligned ...................................................................... Patch Set 21: > Patch Set 21: > > (1 comment) Hi Julius, Apologies for coming back late on this. To explain the issue a bit again, BOOTBLOCK is compiled to run from SRAM -> 0x8c300000 absolute address qc-sec while jumping from 32bit<->64bit using rmr, maps 0x8c30000 <-> 0x0 address and jumps So 0x8c30000 gets mapped to 0x0 and bootblock starts executing from 0x0 address. But the hardware is so that it maps only 128KB (that's the max) from 0x8c30000<->0x0 But bootblock starts to reference address which is beyond this 128KB, like bootmem_console, timestamp etc. Even if you try to pull these items inside the 128KB, the code still references few items based on REGION macros, which works based on adrp instruction that uses pc based relative addressing. For eg, execution fails when _ttb and _ettb variables are referenced. Because _ettb gets mapped to 0x20000 (based on 0x0 relative), where as _ttb is fixed at 0x8c3..... , end address is less than start, things fail. -- To view, visit https://review.coreboot.org/c/coreboot/+/29969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1599242bb5158477318867508c72dc14f1244b00 Gerrit-Change-Number: 29969 Gerrit-PatchSet: 21 Gerrit-Owner: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Tue, 16 Apr 2019 17:28:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: Kconfig: Remove unused MAINBOARD_PCI_SUBSYSTEM_{DEVICE_ID,VENDOR_ID}
by HAOUAS Elyes (Code Review) 16 Apr '19

16 Apr '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32101 Change subject: Kconfig: Remove unused MAINBOARD_PCI_SUBSYSTEM_{DEVICE_ID,VENDOR_ID} ...................................................................... Kconfig: Remove unused MAINBOARD_PCI_SUBSYSTEM_{DEVICE_ID,VENDOR_ID} Change-Id: I6ad986c69c51aff8e7e49e31ffa130ff14e9a50e Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/aopen/dxplplusu/Kconfig M src/mainboard/apple/macbookair4_2/Kconfig M src/mainboard/asrock/b75pro3-m/Kconfig M src/mainboard/asrock/h81m-hds/Kconfig M src/mainboard/asus/h61m-cs/Kconfig M src/mainboard/asus/maximus_iv_gene-z/Kconfig M src/mainboard/asus/p8h61-m_lx/Kconfig M src/mainboard/asus/p8h61-m_pro/Kconfig M src/mainboard/compulab/intense_pc/Kconfig M src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig M src/mainboard/google/butterfly/Kconfig M src/mainboard/google/parrot/Kconfig M src/mainboard/google/stout/Kconfig M src/mainboard/hp/2570p/Kconfig M src/mainboard/hp/2760p/Kconfig M src/mainboard/hp/8460p/Kconfig M src/mainboard/hp/8470p/Kconfig M src/mainboard/hp/8770w/Kconfig M src/mainboard/hp/compaq_8200_elite_sff/Kconfig M src/mainboard/hp/folio_9470m/Kconfig M src/mainboard/hp/revolve_810_g1/Kconfig M src/mainboard/intel/dcp847ske/Kconfig M src/mainboard/kontron/ktqm77/Kconfig M src/mainboard/lenovo/l520/Kconfig M src/mainboard/lenovo/s230u/Kconfig M src/mainboard/lenovo/t420/Kconfig M src/mainboard/lenovo/t420s/Kconfig M src/mainboard/lenovo/t430/Kconfig M src/mainboard/lenovo/t430s/Kconfig M src/mainboard/lenovo/t520/Kconfig M src/mainboard/lenovo/t530/Kconfig M src/mainboard/lenovo/x131e/Kconfig M src/mainboard/lenovo/x1_carbon_gen1/Kconfig M src/mainboard/lenovo/x220/Kconfig M src/mainboard/lenovo/x230/Kconfig M src/mainboard/sapphire/pureplatinumh61/Kconfig M src/mainboard/supermicro/x10slm-f/Kconfig M util/autoport/bd82x6x.go 38 files changed, 0 insertions(+), 304 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/32101/1 diff --git a/src/mainboard/aopen/dxplplusu/Kconfig b/src/mainboard/aopen/dxplplusu/Kconfig index 3a729ce..905ddd5 100644 --- a/src/mainboard/aopen/dxplplusu/Kconfig +++ b/src/mainboard/aopen/dxplplusu/Kconfig @@ -33,12 +33,4 @@ hex default 0x4000 -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x0 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x0 - endif # BOARD_AOPEN_DXPLPLUSU diff --git a/src/mainboard/apple/macbookair4_2/Kconfig b/src/mainboard/apple/macbookair4_2/Kconfig index 9d4047d..82f120a 100644 --- a/src/mainboard/apple/macbookair4_2/Kconfig +++ b/src/mainboard/apple/macbookair4_2/Kconfig @@ -31,14 +31,6 @@ string default "8086,0116" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x7270 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x8086 - config DRAM_RESET_GATE_GPIO int default 60 diff --git a/src/mainboard/asrock/b75pro3-m/Kconfig b/src/mainboard/asrock/b75pro3-m/Kconfig index 5fc3c5e..8db0eba 100644 --- a/src/mainboard/asrock/b75pro3-m/Kconfig +++ b/src/mainboard/asrock/b75pro3-m/Kconfig @@ -37,14 +37,6 @@ string default "B75 Pro3-M" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x1e49 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1849 - config MAX_CPUS int default 8 diff --git a/src/mainboard/asrock/h81m-hds/Kconfig b/src/mainboard/asrock/h81m-hds/Kconfig index 55f1637..db2768d 100644 --- a/src/mainboard/asrock/h81m-hds/Kconfig +++ b/src/mainboard/asrock/h81m-hds/Kconfig @@ -56,14 +56,6 @@ string default "H81M-HDS" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x8c5c - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1849 - config MAX_CPUS int default 8 diff --git a/src/mainboard/asus/h61m-cs/Kconfig b/src/mainboard/asus/h61m-cs/Kconfig index d21c761..60dafda 100644 --- a/src/mainboard/asus/h61m-cs/Kconfig +++ b/src/mainboard/asus/h61m-cs/Kconfig @@ -25,14 +25,6 @@ string default "H61M-CS" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x844d - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1043 - config MAX_CPUS int default 8 diff --git a/src/mainboard/asus/maximus_iv_gene-z/Kconfig b/src/mainboard/asus/maximus_iv_gene-z/Kconfig index 92d7840..a0bc318 100644 --- a/src/mainboard/asus/maximus_iv_gene-z/Kconfig +++ b/src/mainboard/asus/maximus_iv_gene-z/Kconfig @@ -46,14 +46,6 @@ string default "8086,0112" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x844d - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1043 - config MAX_CPUS int default 8 diff --git a/src/mainboard/asus/p8h61-m_lx/Kconfig b/src/mainboard/asus/p8h61-m_lx/Kconfig index cc2f8a9..010641a 100644 --- a/src/mainboard/asus/p8h61-m_lx/Kconfig +++ b/src/mainboard/asus/p8h61-m_lx/Kconfig @@ -43,14 +43,6 @@ string default "P8H61-M LX" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x844d - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1043 - config MAX_CPUS int default 8 diff --git a/src/mainboard/asus/p8h61-m_pro/Kconfig b/src/mainboard/asus/p8h61-m_pro/Kconfig index 4d24187..cdd70d0 100644 --- a/src/mainboard/asus/p8h61-m_pro/Kconfig +++ b/src/mainboard/asus/p8h61-m_pro/Kconfig @@ -47,14 +47,6 @@ string default "8086,0152" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x844d - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1043 - config MAX_CPUS int default 8 diff --git a/src/mainboard/compulab/intense_pc/Kconfig b/src/mainboard/compulab/intense_pc/Kconfig index 0bfde49..ff697b9 100644 --- a/src/mainboard/compulab/intense_pc/Kconfig +++ b/src/mainboard/compulab/intense_pc/Kconfig @@ -28,14 +28,6 @@ string default "8086,0166" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x7270 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x8086 - config DRAM_RESET_GATE_GPIO # FIXME: check this int default 60 diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig b/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig index 5fba47a..5e46365 100644 --- a/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig +++ b/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig @@ -40,14 +40,6 @@ string default "GA-H61M-S2PV" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x5001 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1458 - config MAX_CPUS int default 8 diff --git a/src/mainboard/google/butterfly/Kconfig b/src/mainboard/google/butterfly/Kconfig index 570a1b3..24797be 100644 --- a/src/mainboard/google/butterfly/Kconfig +++ b/src/mainboard/google/butterfly/Kconfig @@ -40,14 +40,6 @@ string default "pci8086,0106.rom" -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1ae0 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0xc000 - config MAINBOARD_VENDOR string default "Hewlett-Packard" diff --git a/src/mainboard/google/parrot/Kconfig b/src/mainboard/google/parrot/Kconfig index f2c9b20..1a31da7 100644 --- a/src/mainboard/google/parrot/Kconfig +++ b/src/mainboard/google/parrot/Kconfig @@ -41,12 +41,4 @@ string default "pci8086,0106.rom" -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1ae0 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0xc000 - endif # BOARD_GOOGLE_PARROT diff --git a/src/mainboard/google/stout/Kconfig b/src/mainboard/google/stout/Kconfig index c9b67cc..8b3eb0f 100644 --- a/src/mainboard/google/stout/Kconfig +++ b/src/mainboard/google/stout/Kconfig @@ -43,12 +43,4 @@ string default "8086,0156" -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1ae0 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0xc000 - endif # BOARD_GOOGLE_STOUT diff --git a/src/mainboard/hp/2570p/Kconfig b/src/mainboard/hp/2570p/Kconfig index f9da619..ff91e4d 100644 --- a/src/mainboard/hp/2570p/Kconfig +++ b/src/mainboard/hp/2570p/Kconfig @@ -49,14 +49,6 @@ string default "8086,0166" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x17df - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x103c - config MAX_CPUS int default 8 diff --git a/src/mainboard/hp/2760p/Kconfig b/src/mainboard/hp/2760p/Kconfig index af3e31b..ab29836 100644 --- a/src/mainboard/hp/2760p/Kconfig +++ b/src/mainboard/hp/2760p/Kconfig @@ -49,14 +49,6 @@ string default "8086,0116" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x162a - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x103c - config MAX_CPUS int default 8 diff --git a/src/mainboard/hp/8460p/Kconfig b/src/mainboard/hp/8460p/Kconfig index ca737ea..ca97cd6 100644 --- a/src/mainboard/hp/8460p/Kconfig +++ b/src/mainboard/hp/8460p/Kconfig @@ -52,14 +52,6 @@ string default "8086,0116" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x161c - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x103c - config MAX_CPUS int default 8 diff --git a/src/mainboard/hp/8470p/Kconfig b/src/mainboard/hp/8470p/Kconfig index d8bf5ec..f23c02f 100644 --- a/src/mainboard/hp/8470p/Kconfig +++ b/src/mainboard/hp/8470p/Kconfig @@ -50,14 +50,6 @@ string default "8086,0166" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x179b - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x103c - config MAX_CPUS int default 8 diff --git a/src/mainboard/hp/8770w/Kconfig b/src/mainboard/hp/8770w/Kconfig index c60283d..6752085 100644 --- a/src/mainboard/hp/8770w/Kconfig +++ b/src/mainboard/hp/8770w/Kconfig @@ -41,14 +41,6 @@ string default "EliteBook 8770w" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x176c - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x103c - config MAX_CPUS int default 8 diff --git a/src/mainboard/hp/compaq_8200_elite_sff/Kconfig b/src/mainboard/hp/compaq_8200_elite_sff/Kconfig index c4b9d6d..cbfb0ed 100644 --- a/src/mainboard/hp/compaq_8200_elite_sff/Kconfig +++ b/src/mainboard/hp/compaq_8200_elite_sff/Kconfig @@ -35,14 +35,6 @@ string default "8086,0102" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x1495 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x103c - config DRAM_RESET_GATE_GPIO int default 60 diff --git a/src/mainboard/hp/folio_9470m/Kconfig b/src/mainboard/hp/folio_9470m/Kconfig index f65aeed..06ca793 100644 --- a/src/mainboard/hp/folio_9470m/Kconfig +++ b/src/mainboard/hp/folio_9470m/Kconfig @@ -35,14 +35,6 @@ string default "8086,0166" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x18df - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x103c - config MAX_CPUS int default 8 diff --git a/src/mainboard/hp/revolve_810_g1/Kconfig b/src/mainboard/hp/revolve_810_g1/Kconfig index a08a9e5..475e978 100644 --- a/src/mainboard/hp/revolve_810_g1/Kconfig +++ b/src/mainboard/hp/revolve_810_g1/Kconfig @@ -37,14 +37,6 @@ string default "8086,0166" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x18f8 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x103c - config DRAM_RESET_GATE_GPIO # FIXME: check this int default 60 diff --git a/src/mainboard/intel/dcp847ske/Kconfig b/src/mainboard/intel/dcp847ske/Kconfig index dd7f1ca..b1c7bab 100644 --- a/src/mainboard/intel/dcp847ske/Kconfig +++ b/src/mainboard/intel/dcp847ske/Kconfig @@ -41,14 +41,6 @@ string default "8086,0106" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2044 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x8086 - config MAX_CPUS int default 2 diff --git a/src/mainboard/kontron/ktqm77/Kconfig b/src/mainboard/kontron/ktqm77/Kconfig index b85d938..043eb01 100644 --- a/src/mainboard/kontron/ktqm77/Kconfig +++ b/src/mainboard/kontron/ktqm77/Kconfig @@ -31,14 +31,6 @@ string default "pci8086,0166.rom" -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x0000 # TODO - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x0000 # TODO - config MAINBOARD_VENDOR string default "Kontron" diff --git a/src/mainboard/lenovo/l520/Kconfig b/src/mainboard/lenovo/l520/Kconfig index a807316..4495d79 100644 --- a/src/mainboard/lenovo/l520/Kconfig +++ b/src/mainboard/lenovo/l520/Kconfig @@ -34,14 +34,6 @@ string default "8086,0126" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x21dd - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x17aa - config DRAM_RESET_GATE_GPIO int default 10 diff --git a/src/mainboard/lenovo/s230u/Kconfig b/src/mainboard/lenovo/s230u/Kconfig index 714f13f..9200ad5 100644 --- a/src/mainboard/lenovo/s230u/Kconfig +++ b/src/mainboard/lenovo/s230u/Kconfig @@ -52,12 +52,4 @@ string default "8086,0166" -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x17aa - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2205 - endif # BOARD_LENOVO_S230U diff --git a/src/mainboard/lenovo/t420/Kconfig b/src/mainboard/lenovo/t420/Kconfig index f40e9c0..ce81907 100644 --- a/src/mainboard/lenovo/t420/Kconfig +++ b/src/mainboard/lenovo/t420/Kconfig @@ -56,14 +56,6 @@ string default "8086,0126" -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x17aa - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x21ce - config ONBOARD_VGA_IS_PRIMARY bool default y diff --git a/src/mainboard/lenovo/t420s/Kconfig b/src/mainboard/lenovo/t420s/Kconfig index 71b94af..c5efb55 100644 --- a/src/mainboard/lenovo/t420s/Kconfig +++ b/src/mainboard/lenovo/t420s/Kconfig @@ -55,14 +55,6 @@ string default "8086,0126" -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x17aa - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x21d2 - config ONBOARD_VGA_IS_PRIMARY bool default y diff --git a/src/mainboard/lenovo/t430/Kconfig b/src/mainboard/lenovo/t430/Kconfig index 687edea..dbeaadb 100644 --- a/src/mainboard/lenovo/t430/Kconfig +++ b/src/mainboard/lenovo/t430/Kconfig @@ -38,14 +38,6 @@ string default "8086,0166" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x21f3 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x17aa - config DRAM_RESET_GATE_GPIO int default 10 diff --git a/src/mainboard/lenovo/t430s/Kconfig b/src/mainboard/lenovo/t430s/Kconfig index 47ff441..bad1837 100644 --- a/src/mainboard/lenovo/t430s/Kconfig +++ b/src/mainboard/lenovo/t430s/Kconfig @@ -60,15 +60,6 @@ string default "pci8086,0166.rom" -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x17aa - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x21fb if BOARD_LENOVO_T430S - default 0x2208 if BOARD_LENOVO_T431S - config ONBOARD_VGA_IS_PRIMARY bool default y diff --git a/src/mainboard/lenovo/t520/Kconfig b/src/mainboard/lenovo/t520/Kconfig index c414083..06f296b 100644 --- a/src/mainboard/lenovo/t520/Kconfig +++ b/src/mainboard/lenovo/t520/Kconfig @@ -65,14 +65,6 @@ string default "pci8086,0126.rom" -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x17aa - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x21cf - config ONBOARD_VGA_IS_PRIMARY bool default y diff --git a/src/mainboard/lenovo/t530/Kconfig b/src/mainboard/lenovo/t530/Kconfig index 14f9fb2..b36460d 100644 --- a/src/mainboard/lenovo/t530/Kconfig +++ b/src/mainboard/lenovo/t530/Kconfig @@ -62,14 +62,6 @@ default "pci8086,0106.rom" if BOARD_LENOVO_T530 default "pci8086,0166.rom" if BOARD_LENOVO_W530 -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x17aa - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x21fa - config ONBOARD_VGA_IS_PRIMARY bool default y diff --git a/src/mainboard/lenovo/x131e/Kconfig b/src/mainboard/lenovo/x131e/Kconfig index 2f936a9..e7da8d0 100644 --- a/src/mainboard/lenovo/x131e/Kconfig +++ b/src/mainboard/lenovo/x131e/Kconfig @@ -37,12 +37,4 @@ int default 2 -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x17aa - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x21fe - endif # BOARD_LENOVO_X131E diff --git a/src/mainboard/lenovo/x1_carbon_gen1/Kconfig b/src/mainboard/lenovo/x1_carbon_gen1/Kconfig index 202fabd..520853c 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/Kconfig +++ b/src/mainboard/lenovo/x1_carbon_gen1/Kconfig @@ -54,12 +54,4 @@ string default "8086,0166" -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x17aa - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x21fa - endif # BOARD_LENOVO_X1_CARBON_GEN1 diff --git a/src/mainboard/lenovo/x220/Kconfig b/src/mainboard/lenovo/x220/Kconfig index 70245d2..16f42e8 100644 --- a/src/mainboard/lenovo/x220/Kconfig +++ b/src/mainboard/lenovo/x220/Kconfig @@ -69,13 +69,4 @@ default "8086,0116" if BOARD_LENOVO_X220I default "8086,0126" -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x17aa - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x21db if BOARD_LENOVO_X220 || BOARD_LENOVO_X220I - default 0x21e8 if BOARD_LENOVO_X1 - endif # BOARD_LENOVO_X220 || BOARD_LENOVO_X220I || BOARD_LENOVO_X1 diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig index 3ec537a..5b34b83 100644 --- a/src/mainboard/lenovo/x230/Kconfig +++ b/src/mainboard/lenovo/x230/Kconfig @@ -55,12 +55,4 @@ string default "8086,0166" -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x17aa - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x21fa - endif # BOARD_LENOVO_X230 diff --git a/src/mainboard/sapphire/pureplatinumh61/Kconfig b/src/mainboard/sapphire/pureplatinumh61/Kconfig index 85b2f36..13a93c5 100644 --- a/src/mainboard/sapphire/pureplatinumh61/Kconfig +++ b/src/mainboard/sapphire/pureplatinumh61/Kconfig @@ -32,14 +32,6 @@ string default "8086,0162" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x1007 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x174b - config DRAM_RESET_GATE_GPIO int default 60 diff --git a/src/mainboard/supermicro/x10slm-f/Kconfig b/src/mainboard/supermicro/x10slm-f/Kconfig index 6bf0b2a..430bed3 100644 --- a/src/mainboard/supermicro/x10slm-f/Kconfig +++ b/src/mainboard/supermicro/x10slm-f/Kconfig @@ -44,14 +44,6 @@ string default "X10SLM+-F" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x0803 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x15d9 - config MAX_CPUS int default 8 diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go index 265cb6f..a97ff1d 100644 --- a/util/autoport/bd82x6x.go +++ b/util/autoport/bd82x6x.go @@ -181,12 +181,6 @@ } KconfigComment["DRAM_RESET_GATE_GPIO"] = "FIXME: check this" - /* Not strictly speaking correct. These subsys/subvendor referer to PCI devices. - But most systems don't have any of those. But the config needs to be set - nevertheless. So set it to southbridge subsys/subvendor. */ - KconfigHex["MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID"] = uint32(GetLE16(addr.ConfigDump[0x2c:0x2e])) - KconfigHex["MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID"] = uint32(GetLE16(addr.ConfigDump[0x2e:0x30])) - ich9GetFlashSize(ctx) DSDTDefines = append(DSDTDefines, -- To view, visit https://review.coreboot.org/c/coreboot/+/32101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ad986c69c51aff8e7e49e31ffa130ff14e9a50e Gerrit-Change-Number: 32101 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 14

Change in ...coreboot[master]: cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCK
by Kyösti Mälkki (Code Review) 16 Apr '19

16 Apr '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26859 ) Change subject: cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCK ...................................................................... Patch Set 53: Code-Review+1 (2 comments) https://review.coreboot.org/#/c/26859/53//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/26859/53//COMMIT_MSG@9 PS53, Line 9: This puts the cache as ram in the bootblock. Perhaps 'cache-as-ram init'. https://review.coreboot.org/#/c/26859/53//COMMIT_MSG@16 PS53, Line 16: result between stages. No longer does this? -- To view, visit https://review.coreboot.org/c/coreboot/+/26859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia96499a9d478127f6b9d880883ac41397b58dbea Gerrit-Change-Number: 26859 Gerrit-PatchSet: 53 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Comment-Date: Tue, 16 Apr 2019 15:45:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCK
by Patrick Rudolph (Code Review) 16 Apr '19

16 Apr '19

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26859 ) Change subject: cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCK ...................................................................... Patch Set 53: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/26859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia96499a9d478127f6b9d880883ac41397b58dbea Gerrit-Change-Number: 26859 Gerrit-PatchSet: 53 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Comment-Date: Tue, 16 Apr 2019 15:13:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit April 2019