coreboot-gerrit March 2019

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Change in ...coreboot[master]: G505S AtomBIOS ROMs: known good binaries with a script to check their...
by mikeb mikeb (Code Review) 17 Mar '19

17 Mar '19

Hello Mike Banon, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/31942 to review the following change. Change subject: G505S AtomBIOS ROMs: known good binaries with a script to check their SHA256 ...................................................................... G505S AtomBIOS ROMs: known good binaries with a script to check their SHA256 This change is a mirror for the known good AMD Lenovo G505S AtomBIOS ROMs from this repository - https://github.com/g505s-opensource-researcher/g505s-atombios AtomBIOS ROMs are required to enable the integrated and discrete VGA adapters, however to add the discrete GPU support you will also need to apply these patches: https://review.coreboot.org/c/coreboot/+/31929 G505S dGPU support: scripts for applying the unofficial (not-merged-yet) patches Here are the SHA256 checksums for these AtomBIOS ROMs: 6104e6989ea3f494d7bfa30573bf38e830f1068bab9980caec5e890e0ccbfced ./pci1002,990b.rom - for integrated GPU (iGPU) HD-8650G 6052b5def3fda2a93f6c4d55ec91b819429e212e26cdb8e0fcca54599c9c92ed ./pci1002,6663.rom - for discrete GPU (dGPU) HD-8570M 15d74515332bc512de66e0dc910d8600aeb134bf715bbc34a4faac0257f4a0dc ./pci1002,6665.rom - for discrete GPU (dGPU) R5-M230 Save to ./coreboot/ then run ./check_atombios_roms.sh . They could be analyzed with AtomDis https://cgit.freedesktop.org/~mhopf/AtomDis/ and some other tools. pci1002,990b.rom (for iGPU HD-8650G) has been taken from G505S with R5-M230, and despite the tiny voltage difference - it's working great for all G505S versions. https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/thread/ GZNWISLFHUTYN6C7RTWSQUMJIFOUHMED/ Signed-off-by: Mike Banon <mikebdp2(a)gmail.com> Change-Id: Ia57bc63ef27698a0f16bfdf35e2dd1414094aded --- A check_atombios_roms.sh A pci1002,6663.rom A pci1002,6665.rom A pci1002,990b.rom A sha256sums_atombios_correct.txt 5 files changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/31942/1 diff --git a/check_atombios_roms.sh b/check_atombios_roms.sh new file mode 100755 index 0000000..650c211 --- /dev/null +++ b/check_atombios_roms.sh @@ -0,0 +1,14 @@ +#!/bin/sh +rm -f ./sha256sums_atombios_my.txt +sha256sum ./pci1002,990b.rom > ./sha256sums_atombios_my.txt +sha256sum ./pci1002,6663.rom >> ./sha256sums_atombios_my.txt +sha256sum ./pci1002,6665.rom >> ./sha256sums_atombios_my.txt +if cmp -s "./sha256sums_atombios_my.txt" "./sha256sums_atombios_correct.txt" +then + echo "SHA256 checksums are correct. Use these AtomBIOS roms at your coreboot .config :" + echo "*990b.rom = iGPU HD-8650G | *6663.rom = dGPU HD-8570M / *6665.rom = dGPU R5-M230" + exit 0 +else + echo "! MISMATCH ! See ./sha256sums_atombios_my.txt and ./sha256sums_atombios_correct.txt" + exit 1 +fi diff --git a/pci1002,6663.rom b/pci1002,6663.rom new file mode 100755 index 0000000..2b3ecf5 --- /dev/null +++ b/pci1002,6663.rom Binary files differ diff --git a/pci1002,6665.rom b/pci1002,6665.rom new file mode 100755 index 0000000..87cb001 --- /dev/null +++ b/pci1002,6665.rom Binary files differ diff --git a/pci1002,990b.rom b/pci1002,990b.rom new file mode 100755 index 0000000..c56058e --- /dev/null +++ b/pci1002,990b.rom Binary files differ diff --git a/sha256sums_atombios_correct.txt b/sha256sums_atombios_correct.txt new file mode 100644 index 0000000..eb14192 --- /dev/null +++ b/sha256sums_atombios_correct.txt @@ -0,0 +1,3 @@ +6104e6989ea3f494d7bfa30573bf38e830f1068bab9980caec5e890e0ccbfced ./pci1002,990b.rom +6052b5def3fda2a93f6c4d55ec91b819429e212e26cdb8e0fcca54599c9c92ed ./pci1002,6663.rom +15d74515332bc512de66e0dc910d8600aeb134bf715bbc34a4faac0257f4a0dc ./pci1002,6665.rom -- To view, visit https://review.coreboot.org/c/coreboot/+/31942 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia57bc63ef27698a0f16bfdf35e2dd1414094aded Gerrit-Change-Number: 31942 Gerrit-PatchSet: 1 Gerrit-Owner: mikeb mikeb <mikebdp2(a)gmail.com> Gerrit-Reviewer: Mike Banon <mikebdp2(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: Remove void* cast.
by Asami Doi (Code Review) 17 Mar '19

17 Mar '19

Asami Doi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31940 Change subject: Remove void* cast. ...................................................................... Remove void* cast. Change-Id: I6f00d4069c930f0e49fec3520453002de98309c9 Signed-off-by: Asami Doi <d0iasm.pub(a)gmail.com> --- M src/arch/mips/boot.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/31940/1 diff --git a/src/arch/mips/boot.c b/src/arch/mips/boot.c index 3857036..56d5a42 100644 --- a/src/arch/mips/boot.c +++ b/src/arch/mips/boot.c @@ -19,7 +19,7 @@ void arch_prog_run(struct prog *prog) { void *cb_tables = prog_entry_arg(prog); - void *doit = (void *)prog_entry(prog); + void *doit = prog_entry(prog); doit(cb_tables); } -- To view, visit https://review.coreboot.org/c/coreboot/+/31940 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f00d4069c930f0e49fec3520453002de98309c9 Gerrit-Change-Number: 31940 Gerrit-PatchSet: 1 Gerrit-Owner: Asami Doi <d0iasm.pub(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/*/chromeos.c: Be explicit about code for ramstage
by Kyösti Mälkki (Code Review) 17 Mar '19

17 Mar '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31930 ) Change subject: mb/*/chromeos.c: Be explicit about code for ramstage ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/31930 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1f96bb8c055a3da63274e1ab7f7d4bc70867cbf1 Gerrit-Change-Number: 31930 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 17 Mar 2019 08:21:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: util/autoport: fix default headers
by HAOUAS Elyes (Code Review) 17 Mar '19

17 Mar '19

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31927 ) Change subject: util/autoport: fix default headers ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/#/c/31927/3/util/autoport/bd82x6x.go File util/autoport/bd82x6x.go: https://review.coreboot.org/#/c/31927/3/util/autoport/bd82x6x.go@309 PS3, Line 309: #include <lib.h> oops, maybe this one is not needed -- To view, visit https://review.coreboot.org/c/coreboot/+/31927 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1b46d76a86f5db02ebc452d43472b51f0414ad96 Gerrit-Change-Number: 31927 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 17 Mar 2019 07:59:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: util/autoport: fix default headers
by HAOUAS Elyes (Code Review) 17 Mar '19

17 Mar '19

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31927 ) Change subject: util/autoport: fix default headers ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/31927 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1b46d76a86f5db02ebc452d43472b51f0414ad96 Gerrit-Change-Number: 31927 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 17 Mar 2019 07:58:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: util/autoport: fix default headers
by Angel Pons (Code Review) 17 Mar '19

17 Mar '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31927 ) Change subject: util/autoport: fix default headers ...................................................................... Patch Set 3: (3 comments) https://review.coreboot.org/#/c/31927/2/util/autoport/bd82x6x.go File util/autoport/bd82x6x.go: https://review.coreboot.org/#/c/31927/2/util/autoport/bd82x6x.go@309 PS2, Line 309: #include <lib.h> : #include <timestamp.h> : #include <arch/byteorder.h> > Maybe I'm wrong, but I would drop this... […] It will not complain if these headers are included via some other headers, though. https://review.coreboot.org/#/c/31927/2/util/autoport/bd82x6x.go@316 PS2, Line 316: #include <cpu/x86/lapic.h> : #include <arch/acpi.h> > also I would drop Done https://review.coreboot.org/#/c/31927/2/util/autoport/bd82x6x.go@323 PS2, Line 323: #include <arch/cpu.h> : #include <cpu/x86/msr.h> > and this. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/31927 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1b46d76a86f5db02ebc452d43472b51f0414ad96 Gerrit-Change-Number: 31927 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sun, 17 Mar 2019 07:40:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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Change in ...coreboot[master]: util/autoport: fix default headers
by Angel Pons (Code Review) 17 Mar '19

17 Mar '19

Hello Kyösti Mälkki, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/31927 to look at the new patch set (#3). Change subject: util/autoport: fix default headers ...................................................................... util/autoport: fix default headers Change-Id: I1b46d76a86f5db02ebc452d43472b51f0414ad96 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M util/autoport/bd82x6x.go 1 file changed, 6 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/31927/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/31927 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1b46d76a86f5db02ebc452d43472b51f0414ad96 Gerrit-Change-Number: 31927 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/foxconn/g41m: Fix overridetree
by Angel Pons (Code Review) 17 Mar '19

17 Mar '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31935 ) Change subject: mb/foxconn/g41m: Fix overridetree ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/31935 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If507c8ea9c865ff86e127226b93a8579bcf39d8d Gerrit-Change-Number: 31935 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 17 Mar 2019 07:26:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: Remove unused a brace.
by Asami Doi (Code Review) 17 Mar '19

17 Mar '19

Asami Doi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31939 Change subject: Remove unused a brace. ...................................................................... Remove unused a brace. Change-Id: Id8667f1e993b2498b87254205f6a43b47edb0407 Signed-off-by: Asami Doi <d0iasm.pub(a)gmail.com> --- M src/arch/mips/bootblock_simple.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/31939/1 diff --git a/src/arch/mips/bootblock_simple.c b/src/arch/mips/bootblock_simple.c index 367dd6c..84029eb 100644 --- a/src/arch/mips/bootblock_simple.c +++ b/src/arch/mips/bootblock_simple.c @@ -32,7 +32,7 @@ bootblock_mmu_init(); - if (init_extra_hardware()) { + if (init_extra_hardware()) printk(BIOS_ERR, "bootblock_simple: failed to init HW.\n"); else run_romstage(); -- To view, visit https://review.coreboot.org/c/coreboot/+/31939 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id8667f1e993b2498b87254205f6a43b47edb0407 Gerrit-Change-Number: 31939 Gerrit-PatchSet: 1 Gerrit-Owner: Asami Doi <d0iasm.pub(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: resources: introduce io_resource()
by Subrata Banik (Code Review) 17 Mar '19

17 Mar '19

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31911 Change subject: resources: introduce io_resource() ...................................................................... resources: introduce io_resource() This patch creates new resource function to perform allocation of IO resource, similar to mmio_resource() function does for MMIO. Change-Id: I3fdcabb14302537d6074bfd6a362690c06b66bb5 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/device/device_util.c M src/include/device/device.h 2 files changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/31911/1 diff --git a/src/device/device_util.c b/src/device/device_util.c index 38207eb..4593898 100644 --- a/src/device/device_util.c +++ b/src/device/device_util.c @@ -801,6 +801,22 @@ resource->flags |= type; } +void fixed_io_resource(struct device *dev, unsigned long index, + unsigned long basek, unsigned long sizek, + unsigned long type) +{ + struct resource *resource; + + resource = new_resource(dev, index); + resource->base = (resource_t)basek; + resource->size = (resource_t)sizek; + resource->limit = resource->base + resource->size - 1; + resource->flags = IORESOURCE_IO | IORESOURCE_FIXED | + IORESOURCE_STORED | IORESOURCE_ASSIGNED; + + resource->flags |= type; +} + void mmconf_resource_init(struct resource *resource, resource_t base, int buses) { diff --git a/src/include/device/device.h b/src/include/device/device.h index 2e2cda9..efc04fa 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -260,6 +260,9 @@ #define mmio_resource(dev, idx, basek, sizek) \ fixed_mem_resource(dev, idx, basek, sizek, IORESOURCE_RESERVE) +#define io_resource(dev, idx, basek, sizek) \ + fixed_io_resource(dev, idx, basek, sizek, IORESOURCE_RESERVE) + void tolm_test(void *gp, struct device *dev, struct resource *new); u32 find_pci_tolm(struct bus *bus); -- To view, visit https://review.coreboot.org/c/coreboot/+/31911 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3fdcabb14302537d6074bfd6a362690c06b66bb5 Gerrit-Change-Number: 31911 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

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coreboot-gerrit March 2019