Piotr Król has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29547 )
Change subject: security/vboot: Add measured boot mode
......................................................................
Patch Set 60:
(2 comments)
Hi Philipp,
did you validated Bay Trail or Braswell? If yes, then how?
https://review.coreboot.org/#/c/29547/60/Documentation/security/vboot/measu…
File Documentation/security/vboot/measured_boot.md:
https://review.coreboot.org/#/c/29547/60/Documentation/security/vboot/measu…
PS60, Line 10: by a metatdata tag. This makes it possible to have platform specific IBB
Redundant spaces at end of line.
https://review.coreboot.org/#/c/29547/60/Documentation/security/vboot/measu…
PS60, Line 31: Normally PCR 0-7 are reserved for firmwar usage. In coreboot we use just 4 PCR
firmware
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Peichao Li has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31428
Change subject: mb/google/laser: Disable touch screen device that according to SKU ID
......................................................................
mb/google/laser: Disable touch screen device that according to SKU ID
We need disable touch screen device on laser SKU ID 5 and 6.
BUG=none
TEST=according to sku_id (Laser(convertible): 5, Laser14(clamshell):
6, Laser14(clamshell + touch):7) distinguish whether disable touch
screen device.
Signed-off-by: peichao.wang <peichao.wang(a)bitland.corp-partner.google.com>
Change-Id: I6953c35a5e8c93d88fe63362156faa351e8ee71f
---
M src/mainboard/google/octopus/variants/phaser/gpio.c
M src/mainboard/google/octopus/variants/phaser/variant.c
2 files changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/31428/1
diff --git a/src/mainboard/google/octopus/variants/phaser/gpio.c b/src/mainboard/google/octopus/variants/phaser/gpio.c
index 322b44b..6687fba 100644
--- a/src/mainboard/google/octopus/variants/phaser/gpio.c
+++ b/src/mainboard/google/octopus/variants/phaser/gpio.c
@@ -74,7 +74,7 @@
uint32_t sku_id = SKU_UNKNOWN;
google_chromeec_cbi_get_sku_id(&sku_id);
- if (sku_id == 1) {
+ if ((sku_id == 1) || (sku_id == 5) || (sku_id == 6)) {
c = sku1_default_override_table;
*num = ARRAY_SIZE(sku1_default_override_table);
} else {
diff --git a/src/mainboard/google/octopus/variants/phaser/variant.c b/src/mainboard/google/octopus/variants/phaser/variant.c
index 22f4f71..990c864f 100644
--- a/src/mainboard/google/octopus/variants/phaser/variant.c
+++ b/src/mainboard/google/octopus/variants/phaser/variant.c
@@ -30,8 +30,8 @@
if (touchscreen_i2c_host == NULL)
return;
- /* SKU ID 1 does not have a touchscreen device, hence disable it. */
+ /* SKU ID 1, 5 and 6 does not have a touchscreen device, hence disable it. */
google_chromeec_cbi_get_sku_id(&sku_id);
- if (sku_id == 1)
+ if ((sku_id == 1) || (sku_id == 5) || (sku_id == 6))
touchscreen_i2c_host->enabled = 0;
}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I6953c35a5e8c93d88fe63362156faa351e8ee71f
Gerrit-Change-Number: 31428
Gerrit-PatchSet: 1
Gerrit-Owner: Peichao Li <peichao.wang(a)bitland.corp-partner.google.com>
Gerrit-MessageType: newchange
Hello Patrick Rudolph, Aaron Durbin, Piotr Król, Julius Werner, Krystian Hebel, Patrick Rudolph, Stefan Reinauer, Paul Menzel, build bot (Jenkins), Patrick Georgi, Werner Zeh, Huang Jin, York Yang, David Hendricks, Martin Roth, Michał Żygowski,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29547
to look at the new patch set (#60).
Change subject: security/vboot: Add measured boot mode
......................................................................
security/vboot: Add measured boot mode
* Introduce a measured boot mode into vboot.
* Add hook for stage measurements in prog_loader and cbfs.
* Implement and hook-up CRTM in vboot and check for suspend.
Change-Id: I339a2f1051e44f36aba9f99828f130592a09355e
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
M Documentation/index.md
A Documentation/security.md
A Documentation/security/index.md
A Documentation/security/vboot/measured_boot.md
A Documentation/security/vboot/srtm.png
M src/cpu/intel/haswell/Makefile.inc
M src/cpu/intel/model_2065x/Makefile.inc
M src/cpu/intel/model_206ax/Makefile.inc
M src/lib/cbfs.c
M src/lib/prog_loaders.c
M src/security/tpm/tspi/tspi.c
M src/security/vboot/Kconfig
M src/security/vboot/Makefile.inc
A src/security/vboot/vboot_crtm.c
A src/security/vboot/vboot_crtm.h
M src/security/vboot/vboot_logic.c
M src/soc/amd/stoneyridge/Makefile.inc
M src/soc/intel/baytrail/Makefile.inc
M src/soc/intel/braswell/Makefile.inc
M src/soc/intel/broadwell/Makefile.inc
M src/soc/intel/fsp_baytrail/Makefile.inc
M src/soc/intel/fsp_broadwell_de/Makefile.inc
M src/soc/mediatek/mt8183/include/soc/memlayout.ld
M src/soc/rockchip/rk3288/include/soc/memlayout.ld
M util/abuild/abuild
25 files changed, 363 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/29547/60
--
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Gerrit-MessageType: newpatchset
Hello Patrick Rudolph, Aaron Durbin, Piotr Król, Julius Werner, Krystian Hebel, Patrick Rudolph, Stefan Reinauer, Paul Menzel, build bot (Jenkins), Patrick Georgi, Werner Zeh, Huang Jin, York Yang, David Hendricks, Martin Roth, Michał Żygowski,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29547
to look at the new patch set (#59).
Change subject: security/vboot: Add measured boot mode
......................................................................
security/vboot: Add measured boot mode
* Introduce a measured boot mode into vboot.
* Add hook for stage measurements in prog_ops.
* Implement and hook-up CRTM in vboot and check for suspend.
* Documentation will be done in a follow up
Change-Id: I339a2f1051e44f36aba9f99828f130592a09355e
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
M Documentation/index.md
A Documentation/security.md
A Documentation/security/index.md
A Documentation/security/vboot/measured_boot.md
A Documentation/security/vboot/srtm.png
M src/cpu/intel/haswell/Makefile.inc
M src/cpu/intel/model_2065x/Makefile.inc
M src/cpu/intel/model_206ax/Makefile.inc
M src/lib/cbfs.c
M src/lib/prog_loaders.c
M src/security/tpm/tspi/tspi.c
M src/security/vboot/Kconfig
M src/security/vboot/Makefile.inc
A src/security/vboot/vboot_crtm.c
A src/security/vboot/vboot_crtm.h
M src/security/vboot/vboot_logic.c
M src/soc/amd/stoneyridge/Makefile.inc
M src/soc/intel/baytrail/Makefile.inc
M src/soc/intel/braswell/Makefile.inc
M src/soc/intel/broadwell/Makefile.inc
M src/soc/intel/fsp_baytrail/Makefile.inc
M src/soc/intel/fsp_broadwell_de/Makefile.inc
M src/soc/mediatek/mt8183/include/soc/memlayout.ld
M src/soc/rockchip/rk3288/include/soc/memlayout.ld
M util/abuild/abuild
25 files changed, 363 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/29547/59
--
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Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Hello Patrick Rudolph, Aaron Durbin, Piotr Król, Julius Werner, Krystian Hebel, Patrick Rudolph, Stefan Reinauer, Paul Menzel, build bot (Jenkins), Patrick Georgi, Werner Zeh, Huang Jin, York Yang, David Hendricks, Martin Roth, Michał Żygowski,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29547
to look at the new patch set (#58).
Change subject: security/vboot: Add measured boot mode
......................................................................
security/vboot: Add measured boot mode
* Introduce a measured boot mode into vboot.
* Add hook for stage measurements in prog_ops.
* Implement and hook-up CRTM in vboot and check for suspend.
* Documentation will be done in a follow up
Change-Id: I339a2f1051e44f36aba9f99828f130592a09355e
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
M Documentation/index.md
A Documentation/security.md
A Documentation/security/index.md
A Documentation/security/vboot/measured_boot.md
A Documentation/security/vboot/srtm.png
M src/cpu/intel/haswell/Makefile.inc
M src/cpu/intel/model_2065x/Makefile.inc
M src/cpu/intel/model_206ax/Makefile.inc
M src/lib/cbfs.c
M src/lib/prog_loaders.c
M src/security/tpm/tspi/tspi.c
M src/security/vboot/Kconfig
M src/security/vboot/Makefile.inc
A src/security/vboot/vboot_crtm.c
A src/security/vboot/vboot_crtm.h
M src/security/vboot/vboot_logic.c
M src/soc/amd/stoneyridge/Makefile.inc
M src/soc/intel/baytrail/Makefile.inc
M src/soc/intel/braswell/Makefile.inc
M src/soc/intel/broadwell/Makefile.inc
M src/soc/intel/fsp_baytrail/Makefile.inc
M src/soc/intel/fsp_broadwell_de/Makefile.inc
M src/soc/mediatek/mt8183/include/soc/memlayout.ld
M src/soc/rockchip/rk3288/include/soc/memlayout.ld
M util/abuild/abuild
25 files changed, 363 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/29547/58
--
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Gerrit-MessageType: newpatchset
Hello Patrick Rudolph, Aaron Durbin, Piotr Król, Julius Werner, Krystian Hebel, Patrick Rudolph, Stefan Reinauer, Paul Menzel, build bot (Jenkins), Patrick Georgi, Werner Zeh, Huang Jin, York Yang, David Hendricks, Martin Roth, Michał Żygowski,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29547
to look at the new patch set (#57).
Change subject: security/vboot: Add measured boot mode
......................................................................
security/vboot: Add measured boot mode
* Introduce a measured boot mode into vboot.
* Add hook for stage measurements in prog_ops.
* Implement and hook-up CRTM in vboot and check for suspend.
* Documentation will be done in a follow up
Change-Id: I339a2f1051e44f36aba9f99828f130592a09355e
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
M Documentation/index.md
A Documentation/security.md
A Documentation/security/index.md
A Documentation/security/vboot/measured_boot.md
A Documentation/security/vboot/srtm.png
M src/cpu/intel/haswell/Makefile.inc
M src/cpu/intel/model_2065x/Makefile.inc
M src/cpu/intel/model_206ax/Makefile.inc
M src/lib/cbfs.c
M src/lib/fmap.c
M src/lib/prog_loaders.c
M src/lib/prog_ops.c
M src/security/tpm/tspi/tspi.c
M src/security/vboot/Kconfig
M src/security/vboot/Makefile.inc
A src/security/vboot/vboot_crtm.c
A src/security/vboot/vboot_crtm.h
M src/security/vboot/vboot_logic.c
M src/soc/amd/stoneyridge/Makefile.inc
M src/soc/intel/baytrail/Makefile.inc
M src/soc/intel/braswell/Makefile.inc
M src/soc/intel/broadwell/Makefile.inc
M src/soc/intel/fsp_baytrail/Makefile.inc
M src/soc/intel/fsp_broadwell_de/Makefile.inc
M src/soc/mediatek/mt8183/include/soc/memlayout.ld
M src/soc/rockchip/rk3288/include/soc/memlayout.ld
M util/abuild/abuild
27 files changed, 370 insertions(+), 60 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/29547/57
--
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