coreboot-gerrit February 2019

coreboot-gerrit@coreboot.org

1 participants
1249 discussions

Change in ...coreboot[master]: soc/qualcomm/qcs405: Support for new SoC
by Julius Werner (Code Review) 27 Feb '19

27 Feb '19

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29948 ) Change subject: soc/qualcomm/qcs405: Support for new SoC ...................................................................... Patch Set 11: (1 comment) https://review.coreboot.org/#/c/29948/2/src/soc/qualcomm/qcs405/timer.c File src/soc/qualcomm/qcs405/timer.c: https://review.coreboot.org/#/c/29948/2/src/soc/qualcomm/qcs405/timer.c@18 PS2, Line 18: > Hi Julius, […] Thanks, sounds good. I don't really mind what order you do things in as long as duplicate code does not get landed, but keep in mind that you may end up duplicating work if you try to polish WIP mistral patches too much before aligning them to what Cheza had (especially because a lot of additional work had already been done on those Cheza patches). -- To view, visit https://review.coreboot.org/c/coreboot/+/29948 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia379cf375e4459ed55cc36cb8a0a92cab18b705e Gerrit-Change-Number: 29948 Gerrit-PatchSet: 11 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Wed, 27 Feb 2019 21:42:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: cpu/intel/speedstep: Add Netburst
by Kyösti Mälkki (Code Review) 27 Feb '19

27 Feb '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/22604 ) Change subject: cpu/intel/speedstep: Add Netburst ...................................................................... Patch Set 71: (1 comment) https://review.coreboot.org/#/c/22604/71/src/cpu/intel/speedstep/speedstep.c File src/cpu/intel/speedstep/speedstep.c: https://review.coreboot.org/#/c/22604/71/src/cpu/intel/speedstep/speedstep.… PS71, Line 110: default: Families other than 0x06 will no longer have these set. Is that intentional? -- To view, visit https://review.coreboot.org/c/coreboot/+/22604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I06e162d3260dedeb3b16583460633507fbcbd52a Gerrit-Change-Number: 22604 Gerrit-PatchSet: 71 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 27 Feb 2019 21:05:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: util/abuild: Set fatal asserts when running scanbuild
by Martin Roth (Code Review) 27 Feb '19

27 Feb '19

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31650 Change subject: util/abuild: Set fatal asserts when running scanbuild ...................................................................... util/abuild: Set fatal asserts when running scanbuild Because coreboot's asserts aren't fatal by default, scan-build finds problems in code that is actually protected by an assert. This change fixes that and allows us to add asserts to protect against other failures. Change-Id: I9fa605d6309bb40a9cef33b434c9256bf731f457 Signed-off-by: Martin Roth <martinroth(a)google.com> --- M util/abuild/abuild 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/31650/1 diff --git a/util/abuild/abuild b/util/abuild/abuild index d32b16d..abfedba 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -675,6 +675,7 @@ scanbuild=true customizing="${customizing}, scan-build" SCANBUILD_ARGS=${SCANBUILD_ARGS:-'-k'} + configoptions="${configoptions}CONFIG_FATAL_ASSERTS=y\n" ;; -y|--ccache) shift customizing="${customizing}, ccache" -- To view, visit https://review.coreboot.org/c/coreboot/+/31650 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9fa605d6309bb40a9cef33b434c9256bf731f457 Gerrit-Change-Number: 31650 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: security/tpm: Fix TCPA log feature
by Patrick Georgi (Code Review) 27 Feb '19

27 Feb '19

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29563 ) Change subject: security/tpm: Fix TCPA log feature ...................................................................... Patch Set 55: (2 comments) https://review.coreboot.org/#/c/29563/55/src/include/memlayout.h File src/include/memlayout.h: PS55: this, plus the .ld files could be a separate commit https://review.coreboot.org/#/c/29563/55/util/cbmem/cbmem.c File util/cbmem/cbmem.c: PS55: that can be a separate commit, right? -- To view, visit https://review.coreboot.org/c/coreboot/+/29563 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic93133531b84318f48940d34bded48cbae739c44 Gerrit-Change-Number: 29563 Gerrit-PatchSet: 55 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 27 Feb 2019 18:39:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: qcs405: memlayout: Make bootblock 64k aligned
by Patrick Georgi (Code Review) 27 Feb '19

27 Feb '19

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29969 ) Change subject: qcs405: memlayout: Make bootblock 64k aligned ...................................................................... Patch Set 13: (5 comments) https://review.coreboot.org/#/c/29969/13//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/29969/13//COMMIT_MSG@9 PS13, Line 9: excepts that expects https://review.coreboot.org/#/c/29969/13/src/arch/arm64/armv8/bootblock.S File src/arch/arm64/armv8/bootblock.S: https://review.coreboot.org/#/c/29969/13/src/arch/arm64/armv8/bootblock.S@26 PS13, Line 26: ldr x15, =arm64_init_cpu while this change shouldn't hurt, it's also not explained by the commit message. what is it for? https://review.coreboot.org/#/c/29969/13/src/soc/qualcomm/qcs405/include/so… File src/soc/qualcomm/qcs405/include/soc/memlayout.ld: https://review.coreboot.org/#/c/29969/13/src/soc/qualcomm/qcs405/include/so… PS13, Line 35: BOOTBLOCK(0x8C30000, 40K) maybe add an _bogus = ASSERT(bootblock & 0xffff == 0, "bootblock must be 64K aligned"); somewhere? https://review.coreboot.org/#/c/29969/13/src/soc/qualcomm/qcs405/include/so… PS13, Line 36: x8C3a coreboot prefers hex values in lower case, but whatever you do, please don't mix them :-) https://review.coreboot.org/#/c/29969/13/src/soc/qualcomm/qcs405/include/so… PS13, Line 44: //REGION(dcb, 0x8CEa000, 0x4000, 4096) that change is unexplained -- To view, visit https://review.coreboot.org/c/coreboot/+/29969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1599242bb5158477318867508c72dc14f1244b00 Gerrit-Change-Number: 29969 Gerrit-PatchSet: 13 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-Comment-Date: Wed, 27 Feb 2019 17:25:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: vendorcode/intel/fsp/fsp2_0/cml: Add FSP header files for Cometlake
by Subrata Banik (Code Review) 27 Feb '19

27 Feb '19

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31529 ) Change subject: vendorcode/intel/fsp/fsp2_0/cml: Add FSP header files for Cometlake ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/#/c/31529/3/src/vendorcode/intel/fsp/fsp2_0/com… File src/vendorcode/intel/fsp/fsp2_0/cometlake/FspUpd.h: https://review.coreboot.org/#/c/31529/3/src/vendorcode/intel/fsp/fsp2_0/com… PS3, Line 3: Copyright (c) 2019, Intel Corporation. All rights reserved.<BR> > Ok, but this file proves that part of the CMT FSP release were > already > published earlier. Then the copyright notice should state each year > when parts of it were originally published, IMO. > > Also, I thought quite the opposite is common practice: that for > each > file, we track individually when parts of it were published. > > To make the scope of Intel's copyright notice clear, it would be > nice > if you could put a line about that above the notice in every file, > e.g.: > > This file is part of the Comet Lake FSP release. > > Copyright (c) ... > i will feed this input and hopefully help to address ur concern > Subrata, I hope you don't mind this discussion. Yes, its absolutely okay to have such discussion. but sometime we have project milestone hence little hurry to make some CL merged ASAP. :) > I already learned > a lot, so I actually appreciate it :) -- To view, visit https://review.coreboot.org/c/coreboot/+/31529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I734316445dda5b1feb4098ce3c58b6dd8ce2d272 Gerrit-Change-Number: 31529 Gerrit-PatchSet: 3 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 27 Feb 2019 16:20:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in ...coreboot[master]: include/efi/efi_datatype: Convert EFI datatypes as per coreboot speci...
by build bot (Jenkins) (Code Review) 27 Feb '19

27 Feb '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31648 ) Change subject: include/efi/efi_datatype: Convert EFI datatypes as per coreboot specification ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/#/c/31648/3/src/include/efi/efi_datatype.h File src/include/efi/efi_datatype.h: https://review.coreboot.org/#/c/31648/3/src/include/efi/efi_datatype.h@85 PS3, Line 85: (EFIAPI *efi_ap_procedure)(void *buffer); need consistent spacing around '*' (ctx:WxV) -- To view, visit https://review.coreboot.org/c/coreboot/+/31648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79cdaaa1dd63d248692989d943a15ad178c46369 Gerrit-Change-Number: 31648 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 27 Feb 2019 16:18:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: include/efi/efi_datatype: Convert EFI datatypes as per coreboot speci...
by Subrata Banik (Code Review) 27 Feb '19

27 Feb '19

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/31648 to look at the new patch set (#3). Change subject: include/efi/efi_datatype: Convert EFI datatypes as per coreboot specification ...................................................................... include/efi/efi_datatype: Convert EFI datatypes as per coreboot specification This patch replaces commonly used EFI datatypes and structures into coreboot compatible datatypes as below: typedef UINTN efi_uintn_t Change-Id: I79cdaaa1dd63d248692989d943a15ad178c46369 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- A src/include/efi/efi_datatype.h 1 file changed, 87 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/31648/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/31648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79cdaaa1dd63d248692989d943a15ad178c46369 Gerrit-Change-Number: 31648 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: include/efi/efi_datatype: Convert EFI datatypes as per coreboot speci...
by build bot (Jenkins) (Code Review) 27 Feb '19

27 Feb '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31648 ) Change subject: include/efi/efi_datatype: Convert EFI datatypes as per coreboot specification ...................................................................... Patch Set 2: (3 comments) https://review.coreboot.org/#/c/31648/2/src/include/efi/efi_datatype.h File src/include/efi/efi_datatype.h: https://review.coreboot.org/#/c/31648/2/src/include/efi/efi_datatype.h@85 PS2, Line 85: (EFIAPI *efi_ap_procedure)( need consistent spacing around '*' (ctx:WxV) https://review.coreboot.org/#/c/31648/2/src/include/efi/efi_datatype.h@86 PS2, Line 86: void *buffer please, no spaces at the start of a line https://review.coreboot.org/#/c/31648/2/src/include/efi/efi_datatype.h@87 PS2, Line 87: ); please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/31648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79cdaaa1dd63d248692989d943a15ad178c46369 Gerrit-Change-Number: 31648 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 27 Feb 2019 16:04:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/common: Implement EFI_MP_SERVICES_PPI structure APIs
by Subrata Banik (Code Review) 27 Feb '19

27 Feb '19

Hello Patrick Rudolph, dhaval v sharma, Balaji Manigandan, Vincent Zimmer, Paul Menzel, build bot (Jenkins), Patrick Georgi, ron minnich, Idwer Vollering, Philipp Deppenwiese, Nico Huber, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/25634 to look at the new patch set (#50). Change subject: soc/intel/common: Implement EFI_MP_SERVICES_PPI structure APIs ...................................................................... soc/intel/common: Implement EFI_MP_SERVICES_PPI structure APIs This patch ensures to have below listed features: 1. All required APIs to create MP service structure. 2. Function to get MP service PPI status MP specification here: http://github.com/tianocore/edk2/blob/master/MdePkg/Include/Ppi/MpServices.h coreboot design document here: ../Documentation/soc/intel/icelake/MultiProcessorInit.md Supported platform will call fill mp_services structure so that FSP can install the required PPI based on coreboot published structure. BRANCH=none BUG=b:74436746 TEST=Able to publish MP service PPI in coreboot. Change-Id: Ie844e3f15f759ea09a8f3fd24825ee740151c956 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/common/block/cpu/Kconfig M src/soc/intel/common/block/cpu/Makefile.inc A src/soc/intel/common/block/cpu/mp_service_ppi.c A src/soc/intel/common/block/include/intelblocks/mp_service_ppi.h 4 files changed, 211 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/25634/50 -- To view, visit https://review.coreboot.org/c/coreboot/+/25634 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie844e3f15f759ea09a8f3fd24825ee740151c956 Gerrit-Change-Number: 25634 Gerrit-PatchSet: 50 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Vincent Zimmer <vincent.zimmer(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Nathaniel L Desimone <nathaniel.l.desimone(a)intel.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit February 2019