coreboot-gerrit October 2019

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Change in coreboot[master]: soc/intel/tigerlake: Do initial SoC commit
by Philipp Deppenwiese (Code Review) 31 Oct '19

31 Oct '19

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36087 ) Change subject: soc/intel/tigerlake: Do initial SoC commit ...................................................................... Patch Set 8: Code-Review-2 If there is so much code that is identical. Just move it to the common code base and do a fresh implementation. This also helps to find dead code etc... -- To view, visit https://review.coreboot.org/c/coreboot/+/36087 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id95e2fa9b7a7c6b3b9233d2c438b25a6c4904bbb Gerrit-Change-Number: 36087 Gerrit-PatchSet: 8 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Thu, 31 Oct 2019 06:33:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/intel/fsp/tigerlake: Add tigerlake FSP header file template
by Subrata Banik (Code Review) 31 Oct '19

31 Oct '19

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36243 ) Change subject: vendorcode/intel/fsp/tigerlake: Add tigerlake FSP header file template ...................................................................... Patch Set 4: > Patch Set 4: > > What Patrick wants to tell you is that we have to fix and update old headers your team committed all the time. I would be great if we had one intel representative really doing maintenance for the copied headers in the vendorcode directory >> What Patrick wants to tell you is that we have to fix and update old headers your team committed all the time >> this part i'm unable to understand, i only see intel.com account pushing those vendor code changes and we have own from intel who can push open source fsp headers at git. Do you mean after FSP headers been released at public, can we ditch the vendorcode directory for the same SOC ? if thats the concern, its valid. we will find someone to do that. -- To view, visit https://review.coreboot.org/c/coreboot/+/36243 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1d064ea60e3b7c2d1114771b07cf7ec7f0e2b37 Gerrit-Change-Number: 36243 Gerrit-PatchSet: 4 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Thu, 31 Oct 2019 06:29:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/ifdtool: Add Tigerlake platform support under IFDv2
by Subrata Banik (Code Review) 31 Oct '19

31 Oct '19

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36242 ) Change subject: util/ifdtool: Add Tigerlake platform support under IFDv2 ...................................................................... Patch Set 6: > Patch Set 6: > > @Subrata what about IFDv3. Can Intel finally implement it... Hi Philip, I believe there is a talk going on FIT linux based implementation so we can use that directly across all intel team rather creating IFD new verison and how we are seeing flash layout we still think IFD existing version still holds good for booting from SPI solutions -- To view, visit https://review.coreboot.org/c/coreboot/+/36242 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3f9672053dcf0a4462ef6ab718af4f18fcfa7e14 Gerrit-Change-Number: 36242 Gerrit-PatchSet: 6 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Thu, 31 Oct 2019 06:26:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard/intel/tigerlake_rvp:Add flash layout file
by Ravishankar Sarawadi (Code Review) 31 Oct '19

31 Oct '19

Ravishankar Sarawadi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36246 ) Change subject: mainboard/intel/tigerlake_rvp:Add flash layout file ...................................................................... Patch Set 3: > Patch Set 3: > > (4 comments) > > This fmap is unused. > > Try to specify base and size the least amount possible. It makes it a lot less errorprone. Is this new spec? We have always followed the base+size approach. -- To view, visit https://review.coreboot.org/c/coreboot/+/36246 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f23ef0506add779bd010db6b3b374df80c0f223 Gerrit-Change-Number: 36246 Gerrit-PatchSet: 3 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 31 Oct 2019 06:26:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/intel/fsp/tigerlake: Add tigerlake FSP header file template
by Philipp Deppenwiese (Code Review) 31 Oct '19

31 Oct '19

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36243 ) Change subject: vendorcode/intel/fsp/tigerlake: Add tigerlake FSP header file template ...................................................................... Patch Set 4: What Patrick wants to tell you is that we have to fix and update old headers your team committed all the time. I would be great if we had one intel representative really doing maintenance for the copied headers in the vendorcode directory -- To view, visit https://review.coreboot.org/c/coreboot/+/36243 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1d064ea60e3b7c2d1114771b07cf7ec7f0e2b37 Gerrit-Change-Number: 36243 Gerrit-PatchSet: 4 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Thu, 31 Oct 2019 06:25:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/ifdtool: Add Tigerlake platform support under IFDv2
by Philipp Deppenwiese (Code Review) 31 Oct '19

31 Oct '19

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36242 ) Change subject: util/ifdtool: Add Tigerlake platform support under IFDv2 ...................................................................... Patch Set 6: @Subrata what about IFDv3. Can Intel finally implement it... -- To view, visit https://review.coreboot.org/c/coreboot/+/36242 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3f9672053dcf0a4462ef6ab718af4f18fcfa7e14 Gerrit-Change-Number: 36242 Gerrit-PatchSet: 6 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Thu, 31 Oct 2019 06:24:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: sdm845: Add SPI QUP driver
by Akash Asthana (Code Review) 31 Oct '19

31 Oct '19

Akash Asthana has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27483 ) Change subject: sdm845: Add SPI QUP driver ...................................................................... Patch Set 58: (3 comments) Thanks for reviewing. https://review.coreboot.org/c/coreboot/+/27483/42/src/soc/qualcomm/sdm845/s… File src/soc/qualcomm/sdm845/spi_qup.c: https://review.coreboot.org/c/coreboot/+/27483/42/src/soc/qualcomm/sdm845/s… PS42, Line 229: write32(&qup[se_bus].regs->geni_m_irq_clear, m_irq); > Done Made changes in this driver to clear interrupt only after handling it, because recently we ran into an issue while doing loopback test on the driver with 100 bytes [More than a FIFO buffer size] as part of unit testing. The test was failing because we were clearing RX interrupt before handling it, this somehow gives a signal to HW that current RX_FIFO data is handled properly and HW can copy fresh data to RX_FIFO buffer, because of this RX_FIFO buffer was overwritten before we handle it. You have mentioned a (very unlikely) race condition. Can you please share some details over it. https://review.coreboot.org/c/coreboot/+/27483/53/src/soc/qualcomm/sdm845/s… File src/soc/qualcomm/sdm845/spi_qup.c: https://review.coreboot.org/c/coreboot/+/27483/53/src/soc/qualcomm/sdm845/s… PS53, Line 105: m_cmd = SPI_RX_ONLY; > Since we're only using din/dout to communicate the direction to qup_handle_transfer() now, we need t […] Done https://review.coreboot.org/c/coreboot/+/27483/53/src/soc/qualcomm/sdm845/s… PS53, Line 129: dout + size > ... […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/27483 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I35061727d5ccc550eaeb06caef4524bc4cf25b54 Gerrit-Change-Number: 27483 Gerrit-PatchSet: 58 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Vin Kamath <vink(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Thu, 31 Oct 2019 06:18:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/intel/fsp/tigerlake: Add tigerlake FSP header file template
by Subrata Banik (Code Review) 31 Oct '19

31 Oct '19

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36243 ) Change subject: vendorcode/intel/fsp/tigerlake: Add tigerlake FSP header file template ...................................................................... Patch Set 4: > Patch Set 4: Code-Review-1 > > As Intel doesn't clean up vendorcode once the development ended and files are available, Intel shouldn't be allowed to add more code here. Not sure what you mean by clean up vendor code ? don't we have option to pick FSP header from open source git like WHL? we might only need to keep headers in vendorcode till the time we are in non released SOC in market. -- To view, visit https://review.coreboot.org/c/coreboot/+/36243 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1d064ea60e3b7c2d1114771b07cf7ec7f0e2b37 Gerrit-Change-Number: 36243 Gerrit-PatchSet: 4 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Thu, 31 Oct 2019 05:54:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/ifdtool: Add Tigerlake platform support under IFDv2
by Subrata Banik (Code Review) 31 Oct '19

31 Oct '19

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36242 ) Change subject: util/ifdtool: Add Tigerlake platform support under IFDv2 ...................................................................... util/ifdtool: Add Tigerlake platform support under IFDv2 Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com> Change-Id: I3f9672053dcf0a4462ef6ab718af4f18fcfa7e14 Reviewed-on: https://review.coreboot.org/c/coreboot/+/36242 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subrata.banik(a)intel.com> --- M util/ifdtool/ifdtool.c M util/ifdtool/ifdtool.h 2 files changed, 5 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index 0e8f76d..a6d0ffa 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -216,6 +216,7 @@ PLATFORM_GLK, PLATFORM_CNL, PLATFORM_ICL, + PLATFORM_TGL, }; unsigned int i; @@ -1026,6 +1027,7 @@ case PLATFORM_CNL: case PLATFORM_ICL: case PLATFORM_SKLKBL: + case PLATFORM_TGL: /* CPU/BIOS can read descriptor and BIOS. */ fmba->flmstr1 |= (1 << REGION_DESC) << rd_shift; fmba->flmstr1 |= (1 << REGION_BIOS) << rd_shift; @@ -1637,6 +1639,8 @@ platform = PLATFORM_ICL; } else if (!strcmp(optarg, "sklkbl")) { platform = PLATFORM_SKLKBL; + } else if (!strcmp(optarg, "tgl")) { + platform = PLATFORM_TGL; } else { fprintf(stderr, "Unknown platform: %s\n", optarg); exit(EXIT_FAILURE); diff --git a/util/ifdtool/ifdtool.h b/util/ifdtool/ifdtool.h index 195a09c..2f5b3c3 100644 --- a/util/ifdtool/ifdtool.h +++ b/util/ifdtool/ifdtool.h @@ -58,6 +58,7 @@ PLATFORM_GLK, PLATFORM_ICL, PLATFORM_SKLKBL, + PLATFORM_TGL, }; #define LAYOUT_LINELEN 80 -- To view, visit https://review.coreboot.org/c/coreboot/+/36242 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3f9672053dcf0a4462ef6ab718af4f18fcfa7e14 Gerrit-Change-Number: 36242 Gerrit-PatchSet: 6 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: [TESTME]soc/intel/icelake: Properly select PCIEX_LENGTH_64MB
by Subrata Banik (Code Review) 31 Oct '19

31 Oct '19

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35886 ) Change subject: [TESTME]soc/intel/icelake: Properly select PCIEX_LENGTH_64MB ...................................................................... Patch Set 2: > Patch Set 2: > > Arthur, > > In ICL and CNL we are having CONFIG_SA_PCIEX_LENGTH=0x10000000 (256MB) > > this is as per CNL programming guide we need to set PCIEX to 256MB if you can select PCIEX_LENGTH_256MB from CNL/ICL then we are good as i could see you are planning to remove the default value as 256MB -- To view, visit https://review.coreboot.org/c/coreboot/+/35886 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I203059ed606fb56b069a382bed449abf311b81c1 Gerrit-Change-Number: 35886 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 31 Oct 2019 05:31:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit October 2019